Elements of computing

Lab sheet -2

Peeta Devaraj
NC.AI.U4AID24059
AI & DS

1. Write a HDL code to implement the 8-Bit Multiplexer and 16-Bit

Multiplexer 8-Bit Multiplexer Input: 2 , each 8-bit wide Output:1, 8-bit
wide Based on the sel the input is connected with the output. 16-Bit
Multiplexer Input: 2 , each 16-bit wide Output:1, 16-bit wide Based on
the sel the input is connected with the output

16-bit Multiplexor:

CHIP Mux16 {
IN a[16], b[16], sel;
OUT out[16];

PARTS:
Mux(a=a[0], b=b[0], sel=sel, out=out[0]);
Mux(a=a[1], b=b[1], sel=sel, out=out[1]);
Mux(a=a[2], b=b[2], sel=sel, out=out[2]);
Mux(a=a[3], b=b[3], sel=sel, out=out[3]);
Mux(a=a[4], b=b[4], sel=sel, out=out[4]);
Mux(a=a[5], b=b[5], sel=sel, out=out[5]);
Mux(a=a[6], b=b[6], sel=sel, out=out[6]);
Mux(a=a[7], b=b[7], sel=sel, out=out[7]);
Mux(a=a[8], b=b[8], sel=sel, out=out[8]);
 Mux(a=a[9], b=b[9], sel=sel, out=out[9]);
Mux(a=a[10], b=b[10], sel=sel, out=out[10]);
Mux(a=a[11], b=b[11], sel=sel, out=out[11]);
Mux(a=a[12], b=b[12], sel=sel, out=out[12]);
Mux(a=a[13], b=b[13], sel=sel, out=out[13]);
Mux(a=a[14], b=b[14], sel=sel, out=out[14]);
Mux(a=a[15], b=b[15], sel=sel, out=out[15]);
}

8-bit Multiplexor:

CHIP Mux16{
IN a[8], b[8], sel;
OUT out[8];

PARTS:
Mux(a=a[0], b=b[0], sel=sel, out=out[0]);
Mux(a=a[1], b=b[1], sel=sel, out=out[1]);
Mux(a=a[2], b=b[2], sel=sel, out=out[2]);
Mux(a=a[3], b=b[3], sel=sel, out=out[3]);
Mux(a=a[4], b=b[4], sel=sel, out=out[4]);
Mux(a=a[5], b=b[5], sel=sel, out=out[5]);
Mux(a=a[6], b=b[6], sel=sel, out=out[6]);
Mux(a=a[7], b=b[7], sel=sel, out=out[7]);
}
2. Write a HDL code to implement the 8-Bit Multiplexer and 16-Bit
Demultiplexer
8-bit Multiplexer:

CHIP Mux16{
IN a[8], b[8], sel;
OUT out[8];

PARTS:
Mux(a=a[0], b=b[0], sel=sel, out=out[0]);
Mux(a=a[1], b=b[1], sel=sel, out=out[1]);
Mux(a=a[2], b=b[2], sel=sel, out=out[2]);
Mux(a=a[3], b=b[3], sel=sel, out=out[3]);
Mux(a=a[4], b=b[4], sel=sel, out=out[4]);
Mux(a=a[5], b=b[5], sel=sel, out=out[5]);
Mux(a=a[6], b=b[6], sel=sel, out=out[6]);
Mux(a=a[7], b=b[7], sel=sel, out=out[7]);
}
16-bit Demultiplexer:

CHIP DEMUX {
IN in[16], sel;
OUT a[16], b[16];
PARTS:
NOT(a=sel, out=notsel);
MUX16(a[0..15]=false, b=in, sel=notsel, out=a);
MUX16(a[0..15]=false, b=in, sel=sel, out=b);
}

3.Write a HDL code to implement the 8-Bit and 16-Bit AND gate.

And16:
CHIP And16 {
IN a[16], b[16];
 OUT out[16];

PARTS:
And(a=a[0],b=b[0],out=out[0]);
And(a=a[1],b=b[1],out=out[1]);
And(a=a[2],b=b[2],out=out[2]);
And(a=a[3],b=b[3],out=out[3]);
And(a=a[4],b=b[4],out=out[4]);
And(a=a[5],b=b[5],out=out[5]);
And(a=a[6],b=b[6],out=out[6]);
And(a=a[7],b=b[7],out=out[7]);
And(a=a[8],b=b[8],out=out[8]);
And(a=a[9],b=b[9],out=out[9]);
And(a=a[10],b=b[10],out=out[10]);
And(a=a[11],b=b[11],out=out[11]);
And(a=a[12],b=b[12],out=out[12]);
And(a=a[13],b=b[13],out=out[13]);
And(a=a[14],b=b[14],out=out[14]);
And(a=a[15],b=b[15],out=out[15]);
}

And8:

CHIP And8 {
IN a[8], b[8];
OUT out[8];

PARTS:
And(a=a[0],b=b[0],out=out[0]);
And(a=a[1],b=b[1],out=out[1]);
 And(a=a[2],b=b[2],out=out[2]);
And(a=a[3],b=b[3],out=out[3]);
And(a=a[4],b=b[4],out=out[4]);
And(a=a[5],b=b[5],out=out[5]);
And(a=a[6],b=b[6],out=out[6]);
And(a=a[7],b=b[7],out=out);
}
4. Write a HDL code to implement the 8-Bit and 16-Bit OR gate.

Or16:

CHIP Or16 {
IN a[16], b[16];
OUT out[16];

PARTS:
Or(a=a[0], b=b[0], out=out[0]);
Or(a=a[1], b=b[1], out=out[1]);
Or(a=a[2], b=b[2], out=out[2]);
Or(a=a[3], b=b[3], out=out[3]);
Or(a=a[4], b=b[4], out=out[4]);
Or(a=a[5], b=b[5], out=out[5]);
Or(a=a[6], b=b[6], out=out[6]);
Or(a=a[7], b=b[7], out=out[7]);
Or(a=a[8], b=b[8], out=out[8]);
Or(a=a[9], b=b[9], out=out[9]);
Or(a=a[10], b=b[10], out=out[10]);
Or(a=a[11], b=b[11], out=out[11]);
Or(a=a[12], b=b[12], out=out[12]);
Or(a=a[13], b=b[13], out=out[13]);
Or(a=a[14], b=b[14], out=out[14]);
Or(a=a[15], b=b[15], out=out[15]);
}
Or8:

CHIP Or8 {
IN a[8], b[8];
OUT out[8];

PARTS:
Or(a=a[0], b=b[0], out=out[0]);
Or(a=a[1], b=b[1], out=out[1]);
Or(a=a[2], b=b[2], out=out[2]);
Or(a=a[3], b=b[3], out=out[3]);
Or(a=a[4], b=b[4], out=out[4]);
Or(a=a[5], b=b[5], out=out[5]);
Or(a=a[6], b=b[6], out=out[6]);
Or(a=a[7], b=b[7], out=out);
}

5. Write a HDL code to implement the 8-Bit and 16-Bit NOR gate.

Nor8:

CHIP Nor8 {
IN a[8], b[8];
OUT out[8];

PARTS:
Nand(a=a[0], b=b[0], out=not_a0);
Nand(a=not_a0, b=not_a0, out=or_a0_b0);
Nand(a=a[1], b=b[1], out=not_a1);
 Nand(a=not_a1, b=not_a1, out=or_a1_b1);
Nand(a=a[2], b=b[2], out=not_a2);
Nand(a=not_a2, b=not_a2, out=or_a2_b2);
Nand(a=a[3], b=b[3], out=not_a3);
Nand(a=not_a3, b=not_a3, out=or_a3_b3);
Nand(a=a[4], b=b[4], out=not_a4);
Nand(a=not_a4, b=not_a4, out=or_a4_b4);
Nand(a=a[5], b=b[5], out=not_a5);
Nand(a=not_a5, b=not_a5, out=or_a5_b5);
Nand(a=a[6], b=b[6], out=not_a6);
Nand(a=not_a6, b=not_a6, out=or_a6_b6);
Nand(a=a[7], b=b[7], out=not_a7);
Nand(a=not_a7, b=not_a7, out=or_a7_b7);

Not(in=or_a0_b0, out=out[0]);
Not(in=or_a1_b1, out=out[1]);
Not(in=or_a2_b2, out=out[2]);
Not(in=or_a3_b3, out=out[3]);
Not(in=or_a4_b4, out=out[4]);
Not(in=or_a5_b5, out=out[5]);
Not(in=or_a6_b6, out=out[6]);
Not(in=or_a7_b7, out=out[7]);
}

Nor16:

CHIP Nor16 {
IN a[16], b[16];
OUT out[16];

PARTS:
Nand(a=a[0], b=b[0], out=not_a0);
Nand(a=not_a0, b=not_a0, out=or_a0_b0);
Not(in=or_a0_b0, out=out[0]);

Nand(a=a[1], b=b[1], out=not_a1);

Nand(a=not_a1, b=not_a1, out=or_a1_b1);
Not(in=or_a1_b1, out=out[1]);

Nand(a=a[2], b=b[2], out=not_a2);

Nand(a=not_a2, b=not_a2, out=or_a2_b2);
Not(in=or_a2_b2, out=out[2]);

Nand(a=a[3], b=b[3], out=not_a3);

Nand(a=not_a3, b=not_a3, out=or_a3_b3);
Not(in=or_a3_b3, out=out[3]);

Nand(a=a[4], b=b[4], out=not_a4);

Nand(a=not_a4, b=not_a4, out=or_a4_b4);
Not(in=or_a4_b4, out=out[4]);

Nand(a=a[5], b=b[5], out=not_a5);

Nand(a=not_a5, b=not_a5, out=or_a5_b5);
Not(in=or_a5_b5, out=out[5]);

Nand(a=a[6], b=b[6], out=not_a6);

Nand(a=not_a6, b=not_a6, out=or_a6_b6);
Not(in=or_a6_b6, out=out[6]);

Nand(a=a[7], b=b[7], out=not_a7);

Nand(a=not_a7, b=not_a7, out=or_a7_b7);
Not(in=or_a7_b7, out=out[7]);

Nand(a=a[8], b=b[8], out=not_a8);

Nand(a=not_a8, b=not_a8, out=or_a8_b8);
Not(in=or_a8_b8, out=out[8]);

Nand(a=a[9], b=b[9], out=not_a9);

Nand(a=not_a9, b=not_a9, out=or_a9_b9);
Not(in=or_a9_b9, out=out[9]);

Nand(a=a[10], b=b[10], out=not_a10);

Nand(a=not_a10, b=not_a10, out=or_a10_b10);
Not(in=or_a10_b10, out=out[10]);
 Nand(a=a[11], b=b[11], out=not_a11);
Nand(a=not_a11, b=not_a11, out=or_a11_b11);
Not(in=or_a11_b11, out=out[11]);

Nand(a=a[12], b=b[12], out=not_a12);

Nand(a=not_a12, b=not_a12, out=or_a12_b12);
Not(in=or_a12_b12, out=out[12]);

Nand(a=a[13], b=b[13], out=not_a13);

Nand(a=not_a13, b=not_a13, out=or_a13_b13);
Not(in=or_a13_b13, out=out[13]);

Nand(a=a[14], b=b[14], out=not_a14);

Nand(a=not_a14, b=not_a14, out=or_a14_b14);
Not(in=or_a14_b14, out=out[14]);

Nand(a=a[15], b=b[15], out=not_a15);

Nand(a=not_a15, b=not_a15, out=or_a15_b15);
Not(in=or_a15_b15, out=out[15]);
}

6. Write a HDL code to implement the Half adder.

CHIP HalfAdder {
IN a, b; // 1-bit inputs
OUT sum, // Right bit of a + b
carry; // Left bit of a + b

PARTS:
Xor(a=a, b=b, out=sum);
And(a=a, b=b, out=carry);
}
7. Write a HDL code to implement a Full adder using Half adder.
CHIP FullAdder {
IN a, b, carryIn; // Two input bits and carry input
OUT sum, carryOut; // Sum and carry output

PARTS:
// First Half Adder
HalfAdder(a=a, b=b, sum=halfSum, carry=carry1);

// Second Half Adder

HalfAdder(a=halfSum, b=carryIn, sum=sum, carry=carry2);

// OR gate to combine carry outputs

Or(a=carry1, b=carry2, out=carryOut);
}