IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO.

3, MARCH 2014 1269

A Z-Source Half-Bridge Converter

Guidong Zhang, Zhong Li, Bo Zhang, Member, IEEE,
Dongyuan Qiu, Member, IEEE, Wenxun Xiao, and Wolfgang A. Halang

Abstract—Applying an LC network into a half-bridge con-

verter, a novel Z-source half-bridge converter is presented, in
which less LC components are needed compared to the conven-
tional one. This Z-source half-bridge converter can solve not only
the problems of the shoot-through and limited voltage but also the
problem of imbalance at the midpoint voltage of input capacitors.
Furthermore, it can generate a broader range of output voltage
values and much more kinds of waveforms, such as the varied
positive or negative output voltages and the varied time ratio
between positive and negative voltages, which are particularly
desirable for some special power supplies, like the electrochemical
power supply. Finally, the proposed converter is implemented in a
Fig. 1. Conventional half-bridge converter.
prototype, and the experimental results can verify the effectiveness
of the proposed converter.
Win et al. and Tanaka et al. proposed a half-bridge-converter-
Index Terms—Half-bridge converter, reduced number, based active power quality compensator with a dc voltage
shoot-through, Z-source. balancer to balance voltages of two dc capacitors [6], [7].
I. I NTRODUCTION To solve the limited voltage problem, adding a boost circuit
instead of the source or adding a step-up transformer in parallel

C ONVENTIONAL half-bridge converters have their

switches in series, as shown in Fig. 1, with which the
shoot-through can occur [1], which means that the strong
with the output part has been proposed [8], where the output
voltage is fixed due to the fixed turn ratio of the transformer.
In order to solve the shoot-through problem, a shoot-through
current flowing through the switches makes them break down.
protection scheme has been proposed [9], but it is only applica-
Moreover, the ac output voltage is limited below the dc voltage,
ble to specially designed switches. In addition, a novel control
which is named the limited voltage problem, because, in prac-
strategy based on a digital signal processor [10] has also been
tice, ac output voltage is sometimes desirable to be higher than
proposed, which is like traditional methods focusing on control
the dc voltage. Furthermore, an unbalanced midpoint of input
design instead of redesigning the main circuit. Redesigning the
capacitors in conventional half-bridge converters leads to large
ripples [2], [3], making the system unstable. main circuit not only can reduce the complexity and cost but
To solve the unbalanced midpoint problem, Eloy-Garcia also can enhance the stability of the system.
et al. proposed an extended direct power control algorithm To solve the limited voltage problem and the shoot-through
to balance the midpoint voltage in multilevel neutral-point- problem better, Peng has first used an LC network, which is
clamped (NPC) inverters [4], [5]. Although the method is named a Z-network as shown in Fig. 2, to couple with the dc
designed for three-phase inverters and multilevel NPC, it is also source in the converters and, thus, proposed a novel source,
applicable to a single-phase half-bridge converter. Additionally, which is different from the voltage source and the current
source and is named as a Z-source (see Fig. 2) [11]. Since then,
Manuscript received August 20, 2012; revised November 21, 2012 and
the Z-source technology has greatly advanced. For example,
February 3, 2013; accepted March 20, 2013. Date of publication April 5, 2013; Peng et al. have proposed some novel Z-source circuits [12],
date of current version August 23, 2013. This work was supported in part by [13] and corresponding control methods [14], [15]. Following
the Key Program of the National Natural Science Foundation of China under
Grant 50937001.
Peng’s work, new Z-source circuits and control methods have
G. Zhang is with the School of Electric Power, South China University also been proposed, such as the algorithms for controlling both
of Technology, Guangzhou 510640, China, and also with the Faculty of the dc boost and ac output voltage of Z-source inverters [16] and
Mathematics and Computer Science, FernUniversität in Hagen, 58084 Hagen,
Germany (e-mail: zgdscut@gmail.com).
dual-input–dual-output Z-source inverters [17]; moreover, the
Z. Li was with the Faculty of Mathematics and Computer Science, Z-source technology has been applied in practice, for instance,
FernUniversität in Hagen, 58084 Hagen, Germany. He is now with the Faculty in fuel cell systems [18], motor drives [19], distributed power
of Engineering, University of Duisburg–Essen, 47057 Duisburg, Germany
(e-mail: zhong.li@fernuni-hagen.de).
generations [20], photovoltaic systems [21], and battery hybrid
B. Zhang, D. Qiu, and W. Xiao are with the School of Electric Power, electric vehicles [22]. The Z-source converter can work in
South China University of Technology, Guangzhou 510640, China (e-mail: the shoot-through mode, and its output voltage can reach a
epbzhang@scut.edu.cn; epdyqiu@scut.edu.cn; epxwx@yahoo.com.cn).
W. A. Halang is with the Faculty of Mathematics and Computer Science, broader range than that of the conventional ones. However,
FernUniversität in Hagen, 58084 Hagen, Germany (e-mail: Wolfgang.Halang@ the range of the output voltage is not broad enough for some
fernuni-hagen.de). special applications, like electrochemical power supply [23],
Color versions of one or more of the figures in this paper are available online
at http://ieeexplore.ieee.org. which requires a much broader range of output voltage [24] and
Digital Object Identifier 10.1109/TIE.2013.2257146 abundant waveforms in various shapes [25], [26].
0278-0046 © 2013 IEEE
1270 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

Fig. 2. Z-source half-bridge converter with two Z-networks.

Applying Peng’s Z-source concept into half-bridge convert-

ers [11] results in a Z-source half-bridge converter, in which an
LC Z-network should be parallelized to the power source. It
is known that two input capacitors in the half-bridge converter
play the role of two dc sources; therefore, two LC Z-networks Fig. 3. Diagram of electroplating.
are needed to couple with the capacitors, as shown in Fig. 2
Electroplating is a kind of electrochemical process, whose
[27], [28]. Although the characteristics of the Z-source may be
fundamental operation diagram and operation principle are
obtained, many additional devices, such as LC elements, are
shown in Fig. 3 and described in the following.
used in the circuit, which increase the cost, size, and weight of
The electroplating process is a redox reaction, with funda-
the converter.
mental components: two electrodes (+ and −), a dc source
Here, a novel Z-source half-bridge converter is proposed,
(Vd ), and the solution, as shown in Fig. 3. The purpose of the
in which, instead of putting two LC Z-networks to couple
electroplating is to make the metal ions cover the surface of the
with the capacitors, only one LC Z-network is required to
negative electrode evenly and smoothly. However, due to
be placed between the input capacitors and the switches. This
the nonuniformity of the solution, the dc-voltage direction and
proposed Z-source half-bridge converter not only can solve the
the current density should be changed from time to time, which
limited voltage and the shoot-through problems but also can
requires complicated designs according to different products
solve the unbalanced midpoint voltage problem. Furthermore,
and processes [25], [26].
it can generate a much broader range of output voltages and
With the rapid growth of the demand on electroplating prod-
more abundant waveforms than the conventional Z-source con-
ucts with very different voltages and duties, there are more
verter. It is also remarked that it has higher efficiency than
stringent requirements on the electrochemical power supplies
conventional half-bridge converters, where an additional dc–dc
to provide a broad range of outputs, asymmetrical positive and
boost converter is needed to obtain such desired outputs as
negative voltages, step waves, recurrent pulses, square waves,
the proposed converter can, as it is stated in [11] that “The
triangular waves, and saw-tooth waves [24], which can be quite
Z-source inverter can generate boost–buck voltage, minimize
well fulfilled by the proposed converter.
component count, increase efficiency, and reduce cost” and
The rest of this paper is organized as follows. Section II
“For applications where over drive is desirable and the available
gives the system design and analysis. Then, in Section III,
dc voltage is limited, an additional dc–dc boost converter is
the midpoint balances of input capacitors in the traditional
needed to obtain a desired ac output. The additional power
converter and the proposed converter are compared to show that
converter stage increases system cost and lowers efficiency.”
the proposed converter is more stable. The parameter design
A typical application of the Z-source half-bridge converter
of the Z-network is discussed in Section IV. In Section V,
is in the electrochemical power supply, whose output voltages
simulations via Simulink software are conducted to verify the
are requested to be varied, including varied positive or negative
analysis. In Section VI, a prototype is designed to illustrate the
output voltages and the varied time ratio between positive
performance of the proposed converter. Finally, a conclusion is
and negative voltages. These characteristics, desired in elec-
drawn in Section VII.
trochemical power supply, are the very ones of the proposed
converter. For example, in order to realize the smooth electro-
plating products, the current densities and directions should be II. S YSTEM D ESIGN AND A NALYSIS
varied according to the requests of electroplating technology The proposed converter is depicted in Fig. 4, in which an LC
[25], [26]. Traditionally, the engineer had to compose sev- Z-network, consisting of capacitors C1 and C2 and inductors
eral cascaded subcircuits and use complex control methods L1 and L2 , is integrated into a traditional half-bridge converter,
to generate an overlapped waveform of multioutput voltages consisting of capacitors Cd1 and Cd2 , switches S1 and S2 , and
[23], [24]. However, the disadvantages lie in that it is hard to diode D, which is used to prevent the current from flowing back
control and regulate the output voltages, and the use of cascaded to the source. Therein, the use of the inductors in the Z-network
subcircuits not only increases the cost and size but also leads to is to avoid strong current in the circuit when the switches are in
a more complex bulky structure and instability of the system. the shoot-through state.
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1271

Fig. 4. Z-source half-bridge converter.

For simplicity, the following conditions are assumed: 1) All

the components are ideal; 2) the dead time in the driven pulses
is ignored; 3) L1 = L2 and C1 = C2 in the Z-network; 4) C1 ,
C2 , Cd1 , and Cd2 are large enough; and 5) the freewheeling
diodes of the switches are ignored in the analysis since the load
characteristic of the electrochemical solution is resistance or
resistance with a small capacitance.
Denote the duties of the switches S1 and S2 by D1 and
D2 , respectively. The proposed converter performs differently
in two cases: D1 + D2 ≤ 1 and D1 + D2 > 1.

A. Case 1: D1 + D2 ≤ 1
In this case, S1 and S2 are not switched on at the same time;
then, the circuit is in the non-shoot-through state.
There are three modes corresponding to the states of the
switches. In the first mode, Fig. 5(a) shows an equivalent circuit
for the mode when the S1 is on and S2 is off, in which the cur-
rent flows out of the source, through the diode, the Z-network,
and S1 , and then back to the source. The arrows indicate the
current directions. In the second mode, Fig. 5(b) shows an
equivalent circuit of that when S1 and S2 are off, in which the
current also flows out of the source, through the diode and the
Z-network, and back to the source; there is no output here. In
the third mode, Fig. 5(c) shows an equivalent circuit of that
when S2 is on and S1 is off, in which the diode suffers a neg- Fig. 5. Equivalent circuits in case 1. (a) S1 on and S2 off. (b) S1 off and
ative voltage and, thus, turns off. The current flows out of the S2 off. (c) S1 off and S2 on.
source, through the load, S2 , and the Z-network, and then back
In the steady state of the converter, its operation process in
to the source. Furthermore, the current direction is also indi-
a switch period is analyzed in the following, and the output
cated. The operation process for this case is similar to the tradi-
voltage vo will be deduced in each mode.
tional one for half-bridge converters, which is not detailed here.
1) Mode 1: t ∈ [t0 , t1 ]: As shown in Fig. 6(a), in loops 1
and 2, capacitors C1 and C2 discharge the energy to inductors
B. Case 2: D1 + D2 > 1 L1 and L2 ; thereafter, iL1 and iL2 increase. Thus, L1 and L2
In this case, the behavior of the switches in the circuit leads store the energy, and one has
to three modes within a switch period T , which correspond to  vL = vC
1 1
three linear equivalent circuits: Mode 1, when S1 and S2 are v L2 = v C 2 (1)
on; Mode 2, when S1 is on and S2 is off; and Mode 3, when S1
is off and S2 is on, as shown in Fig. 6(a)–(c), respectively. where iL1 , iL2 , vL1 , vL2 , vC1 , and vC2 are the currents of L1
Denote t0 as the beginning of one period, t1 as the mode and L2 and the voltages of L1 , L2 , C1 , and C2 , respectively.
transition instant from mode 1 to mode 2, i.e., t1 = t0 + (D2 + The voltage of diode D is −(vC1 + vC2 − Vd ), so D un-
D1 − 1)T , t2 as the mode transition instant from mode 2 to dertakes negative voltage stress and, thus, turns off. The en-
mode 3, i.e., t2 = t1 + (1 − D2 )T , and t3 = T as the end of ergy of C2 is delivered to the load RL and Cd2 through the
the period. C2 −RL −Cd2 loop, so Cd2 charges and Cd1 discharges.
1272 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

In terms of the C2 −RL −Cd2 loop, the output voltage of the

converter is the same as that in (2).
Mode 3: t ∈ [t2 , t3 ]: In Fig. 6(c), S1 is off, and S2 is on.
In loop 1, the source Vd and L1 discharge the energy to C2 ;
thus, vC2 increases. Similarly, in loop 2, Vd and L2 discharge
the energy to C1 ; thus, vC1 increases. The energy of L2 and
Cd2 is delivered to RL through the L2 −Cd2 −RL loop, so Cd2
discharges and Cd1 charges. In terms of loop 1, one has the
same equation as (3).
In terms of the Vd −D−C1 −RL −Cd2 loop, the output volt-
age is

vo = −(vCd2 + vC1 − Vd ). (4)

As a result, vo can be deduced as follows.

The voltage–second characteristic of L1 leads to
 T
vL1 dt = 0. (5)
0

Substituting (1) and (3) into (5) leads to

(D2 +D1 −1)T vC1 +(2−D2 −D1 )T (Vd −vC2 ) = 0. (6)
Assume that L1 = L2 , C1 = C2 , and C1 and C2 are large
enough. Due to the structural symmetry of the Z-network, (6)
can be rewritten as
2 − D1 − D2
v C1 ≈ v C2 = Vd . (7)
3 − (D1 + D2 )
The ampere–second property of Cd2 implies that
 T
iCd2 dt = 0 (8)
0

where iCd2 is the current of Cd2 .

Denote the voltage and current of Cd1 by vCd1 and iCd1 , re-
spectively. It is known from Fig. 6 that vCd1+vCd2 = Vd . Denote
the errors of vCd1 and vCd2 by ΔvCd1 and ΔvCd2 , respectively.
Due to Vd being a constant, one has ΔvCd1 = −ΔvCd2 , and
straightforwardly, iCd1 = iCd2 in terms of i = Cdu/dt.
Moreover, from io = iCd1 + iCd2 , one has iCd2 = io /2,
where io is the current of the load; thereafter, (8) can be
Fig. 6. Equivalent circuits in case 2. (a) Mode 1: S1 on and S2 on. (b) Mode 2: rewritten as
S1 on and S2 off. (c) Mode 3: S1 off and S2 on.
(vC2 −vCd2 ) −(vC2 +vCd2 −Vd )
D1 T + (1−D1 )T = 0 (9)
In terms of the C2 −RL −Cd2 loop, the output voltage of the 2RL 2RL
converter reads
and it follows that
vo = vC2 − vCd2 (2) vCd2 = (2vC2 − Vd )D1 − vC2 + Vd . (10)

where vCd2 is the voltage of Cd2 . When switch S1 is on, substituting (7) and (10) into (2)
2) Mode 2: t ∈ [t1 , t2 ]: As shown in Fig. 6(b), S1 is on, and results in the positive output of the converter vp as
S2 is off. In loop 1, the source Vd and L1 discharge the energy
(1 − D1 )
to C2 , so that vC2 increases. In loop 2, the source Vd and L2 vp = vo = vC2 − vCd2 = Vd . (11)
discharge the energy to C1 ; thereafter, vC1 increases. Then, the 3 − 2(D1 + D2 )
energy of C2 is delivered to the load RL and Cd2 through the When the switch S2 is on and S1 is off, substituting (7) and
C2 −RL −Cd2 loop, so Cd2 charges and Cd1 discharges. From (10) into (4) leads to the negative output of the converter vn as
loop 1, one has
D1
vn = vo = vd − vC2 − vCd2 = − Vd . (12)
v L1 = V d − v C 2 . (3) 3 − 2(D1 + D2 )
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1273

Fig. 7. Relationship figure of D1 , D2 , and vo /Vd .

Fig. 9. Key waveforms of the Z-source half-bridge converter in case 2 when

D1 = 0.5 and D2 = 0.7.

Vd /2 and −Vd /2 are marked at the output voltage waveform

vo , and it is shown that the output voltages of the proposed
Fig. 8. Zooming in of Fig. 7. converter can exceed the limited one.
Second, the corresponding waveforms for D1 = 0.5 are
According to (11) and (12), the relationships of D1 , D2 , and shown in Fig. 10. It is remarked that the output voltage vo in
vo /Vd are drawn in Fig. 7. Therein, vo /Vd increases dramati- Fig. 10 is quite different from that in Fig. 9; the positive and
cally as D1 + D2 is about 1.5, which is zoomed in in Fig. 8. negative values of vo in Fig. 9 are symmetrical, but they are
It is remarked from Figs. 7 and 8 that the novel converter can asymmetrical in Fig. 10. This means that the proposed converter
generate abundant output voltages by adjusting D1 and D2 . generates many kinds of output voltages, fulfilling the require-
When vo /Vd < 1, the converter functions as a buck con- ments of the electrochemical power supply, such as various
verter; otherwise, the converter acts as a boost converter. There- positive or negative output voltages, and the regulated duration
fore, it is a buck–boost converter. By controlling the duty of at negative or positive output voltage, which has prominent ad-
the switches, special output voltages can be obtained, including vantages over traditional methods by using complicated control
the buck–boost voltages, asymmetric and symmetric voltages, methods and multiple cascaded subcircuits.
positive and negative peak output voltages, and the time ratio Moreover, the efficiency of the converter η is given by
between positive and negative voltages.
Pout
Additionally, according to (11) and (12), the values of vp and η=
vn are not equal when D1 = 0.5, but they are equal when D1 = Pin
v2 2
0.5, which will be explained hereinafter. D1 Rp + (1 − D1 ) vRn
=
First, when D1 = 0.5, the key waveforms of the Z-source Vd Iav
half-bridge converter in case 2 are drawn in Fig. 9 according to D1 vp2 + (1 − D1 )vn2
the analysis for three modes, where QS1 and QS2 stand for the =
RVd Iav
driving voltages of switches S1 and S2 , respectively; id is the D1 (1 − D1 )Vd
= (13)
current of diode D; iL1 and iL2 are the currents of inductances (3 − 2(D1 + D2 ))2 RIav
L1 and L2 , respectively; vC1 , vC2 , vCd1 , and vCd2 are the
voltages of the capacitances C1 , C2 , Cd1 , and Cd2 , respectively; where Pout = D1 vp2 + (1 − D1 )vn2 /R, Pin = Vd Iav , and Iav
and vo is the output voltage. Additionally, modes 1, 2, and 3 are are the output power, the input power, and the average input
distinguished in red, blue, and green colors, respectively. The current, respectively. Here, the conduction and switching loss
limited output voltages of the traditional half-bridge converter is taken into account, which is indicated in Pin − Pout .
1274 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

Fig. 11. Equivalent circuits of the conventional half-bridge converter.

(a) Mode 1: S1 on and S2 off. (b) Mode 2: S1 off and S2 on.

tion of vCd2 by ΔV . Following (15), one has

ΔV = vCd2 max − vC
d2 min 
D1 T
−C
= (Vd − VCd2 0 ) 1 − e d2 R . (16)

Fig. 10. Waveforms of the Z-source half-bridge converter in case 2 when In the high-frequency power supply, T is always very small,
D1 = 0.7 and D2 = 0.5. the input capacitance Cd2 is always quite large, particularly
in electrochemical application, and its load is very large.
III. M IDPOINT BALANCE OF I NPUT C APACITORS Thus, D1 T is much smaller than Cd2 R, and (16) can be
The stability of the midpoint voltage in the converter plays a approximated by
key role for the system’s stability. The midpoint voltages of the D1 t
input capacitors in the conventional converter and the proposed ΔV ≈ (Vd − VCd2 0 ). (17)
Cd2 R
converter will be analyzed and compared in this section.

A. Midpoint Voltage in Conventional Half-Bridge Converters B. Midpoint Voltage in Z-Source Half-Bridge Converters
In conventional half-bridge converters, there are always some It is described in [29] that the input part can be regarded as a
problems caused by the midpoint imbalance of the input capaci- dc voltage source or a dc current source due to the Z-network.
tor voltage. In this section, the midpoint voltage in conventional Similarly, the output part of the Z-network can be treated as a
half-bridge converters will be analyzed, and the fluctuation dc current source. Hence, the equivalent circuits are derived as
equation of the midpoint voltage will be deduced. follows.
Fig. 11 shows the equivalent circuits of that in Fig. 1. The differential equation of the circuit shown in Fig. 12(a)
In a switching period, S1 is on and S2 is off as t ∈ [0, D1 T ], can be described as
while S1 is off and S2 is on as t ∈ [D1 T, T ]. dvCd2
Denote the initial voltage of Cd2 by VCd2 0 . In terms of Cd2 = Ip (18)
dt
the Kirchhoff’s voltage law (KVL), vCd2 can be derived in
where Ip is the current of the constant current source.
frequency domain as
Integrating both sides of (18) leads to
Vd Vd − VCd2 0 
vCd2 (s) = − . (14) Ip
s 1
s + Cd2 vCd2 (t) = VCd2 0 + dt. (19)
R Cd2
Employing Laplace inverse transformation to (14) results in Denote the maximal fluctuation of vCd2 as shown in Fig. 12
by ΔVZ . Then, from (19), one has
−C t
vCd2 (t) = Vd − (Vd − VCd2 0 )e d2 R . (15)
ΔVZ = vCd2 max − vCd2 min
 D1 T
Denote the maximal and the minimal voltages of vCd2 by Ip Ip
= dt = D1 T . (20)
vCd2 max and vCd2 min , respectively, and the maximal fluctua- 0 C d2 C d2
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1275

IV. PARAMETER D ESIGN

The parameters of the Z-network are designed in this section,
including capacitor and inductance parameter design.

A. Parameter Design of the Capacitor in the Z-Network

Normally, the design of the capacitor is to determine the rated
voltage and capacitance with a permitted fluctuation range xC %
(xC is preassigned), a given output voltage Vo , a given output
current Io , and a given switching period T .
From (7), (11), and (12), one has
2−D1 −D2
v C2 = Vo , when (S1 ) = (on) (24)
D1
2−D1 −D2
v C2 = Vo , when (S1 , S2 ) = (off, on). (25)
1−D1
In terms of KCL, the equations of the connected nodes
of L2 −C1 −S2 in Fig. 6(a), L1 −C2 −S1 in Fig. 6(b), and
L2 −C1 −S2 in Fig. 6(c) can be derived as
⎧
⎨ iL2 = iC1 + io , when (S1 , S2 ) = (on, on)
iL = iC2 + io , when (S1 , S2 ) = (on, off) (26)
⎩ 1
iL2 = io − iC1 , when (S1 , S2 ) = (off, on).

Denote the rms currents of L2 and C2 by IL2 and IC2 ,

respectively. Then, from (26), one has
Io
I C 2 ≈ I L2 = . (27)
2
Fig. 12. Equivalent circuits of the Z-source half-bridge converter. (a) Mode 1:
S1 on and S2 off. (b) Mode 2: S1 off and S2 on. 1) Determination of the Rated Voltage: The range of vC2
is determined by (24) and (25). Thereby, the rated voltage of
C2 can be determined by the maximal VC2 M . Considering the
Ip can be derived by Kirchhoff’s current law (KCL) as
safety margin, the rated voltage of C2 is normally set between
Vd − VCd2 0 − VIp 1.5VC2 M and 2VC2 M .
Ip = (21) 2) Determination of the Rated Capacitance: The ripples
R
of the capacitors have great influence on the stability of the
where VIp is the voltage of the constant current source. converter, whose permitted fluctuation range can be used to
Substituting (21) into (20) leads to design the capacitance.
Then, the capacitors in the Z-network can be designed ac-
Vd − VCd2 0 − VIp cording to the differential equation of capacitors
ΔVZ = D1 T . (22)
Cd2 R iC2 dt
C2 = . (28)
dvC2
Therein, the ratio of ΔVZ to ΔV can be derived from (17) and
(22) as The high harmonic frequency of the capacitance is nearly
equal to the switching frequency of the converter, as shown in
ΔVZ Vd − VCd2 0 − VIp Fig. 9, namely,
= × 100%. (23)
ΔV Vd VCd2 0
dt ≈ (D1 + D2 − 1)T. (29)
It is obvious that ΔVZ < ΔV , if VIp is positive; the smaller
the ΔVZ /ΔV is, the smaller the ripple in the proposed con- Denote the permitted error of VC2 M by dvC2 , according to
verter is and, consequently, the more stable the proposed con- the permitted fluctuation range xC %; dvC2 is expressed as
verter is. ΔVZ /ΔV will become very small, or even zero, if
VIp is very close to the value of Vd − VCd2 0 , and VIp can be dvC2 = xC %VC2 M . (30)
designed by the parameters of the Z-network.
Substituting (27), (29), and (30) into (28) leads to
It is remarked that the proposed converter is more stable
than the traditional one with regard to the problem of the input Io (D1 + D2 − 1)T
C2 = . (31)
capacitor stability. 2xC %VC2 M
1276 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

Therein, the range of the capacitance can be calculated, and the

maximum is taken as the rated capacitance.

B. Parameter Design of the Inductor in the Z-Network

Similar to the parameter design of the capacitor, the param-
eter design of the inductor is to determine the rated current
and capacitance with a permitted fluctuation range xL % (xL is
preassigned), a given output voltage Vo , a given output current
Io , and a given switching period T .
1) Determination of the Rated Current: IL2 can be deter-
mined by (27). Considering the safety margin, the rated current
of L2 is normally taken as 2IL2 .
2) Determination of the Rated Inductance: The ripples of
the inductors also have great influence on the stability of the
converter; therefore, the inductance can be designed in terms of
the permitted ripples.
The inductances in the Z-network can be designed according
to the differential equation of inductances
vL2 dtL
L2 = . (32)
diL2 Fig. 13. Simulation waveforms when D1 = 0.5 and D2 = 0.7.

In the L1 −C2 −L2 −C1 loop, the KVL equation can be ex-
pressed as vL2 + vC1 = vL1 + vC2 . In the Z-network, the rms
voltages of C1 , C2 , L1 , and L2 are denoted by VC1 , VC2 , VL1 ,
and VL2 , respectively, and one has vC1 ≈ VC2 and VL2 ≈ VL1 .
Thereby, the maximum of vL2 is derived as

V L2 M ≈ V C 2 M . (33)

The high harmonic frequency of the inductance is nearly

equal to the switching frequency of the converter, as shown in
Fig. 9, so the time interval dtL in (32) can be obtained as

dtL ≈ (D1 + D2 − 1)T. (34)

Denote the permitted error of IL2 by diL2 . According to the

permitted fluctuation range xL %, diL2 is expressed as

diL2 = xL %IL2 . (35)

Substituting (24), (25), (27), and (33)–(35) into (32) leads to

the inductance of L2
Fig. 14. Simulation waveforms when D1 = 0.7 and D2 = 0.5.
2VC2 M (D1 + D2 − 1)T
L2 = . (36)
xL %Io The simulation results are shown in Figs. 13 and 14, which
are consistent to the theoretical analyses shown in Figs. 9
and 10.
V. S IMULATION R ESULTS
To verify the feasibility and validity of the proposed con-
VI. E XPERIMENT R ESULTS
verter, Simulink software is applied for the simulation of the
converter. A prototype of the Z-network converter is built as shown
The preassigned parameters are as follows: xC % = 1%, in Fig. 15, and the parameters are chosen as follows: Cd1 =
xL % = 10%, Vd = 48 V, Vo = 100 V, Io = 10 A, and T = Cd2 = 470 μF, C1 = C2 = 470 μF, L1 = L2 = 100 μH, R =
20 μs. According to the design, the parameters of the con- 100 Ω, and T = 20 μs.
verter can be calculated: C1 = C2 = 482.5 μF and L1 = L2 = The main circuit is in the left side in Fig. 15, composed of L1 ,
105.5 μH. However, in practice, the parameters can be chosen L2 , C1 , C2 , switches (type: IRFP450), and the resistive load
as follows: C1 = C2 = 470 μF and L1 = L2 = 100 μH. R, while the driving circuit is in the right side, composed of
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1277

Fig. 17. Experimental waveforms in shoot-through case (D1 = 0.7 and

D2 = 0.5).

Fig. 15. Prototype of the proposed converter.

Fig. 18. Ripple experiment waveform of vCd2 in the proposed converter.

Fig. 16. Experimental waveforms in shoot-through case (D1 = 0.5 and

D2 = 0.7).

two SG3525 ICs being applied to generated two synchronous

overlapped driving signals and TLP250 ICs being used to
drive the switches, whose working frequency and duties can be
adapted by the adjustable resistors.
The waveforms of the converter at D1 = 0.5 and D2 = 0.7
with an input voltage of 40 V are shown in Fig. 16. Therein,
the upper waveform refers to VGS (gate–drain voltage) of the
switch S1 , the middle one is VSD (source–drain voltage) of
the switch S2 , which is not but can be synchronized to the Fig. 19. Start-up output waveforms.
driving waveform of S2 , and the lower one is the output voltage
of the load R, whose negative and positive output voltages
are symmetric, and they are all about 50 V. This verifies the
analytical and simulation results.
Fig. 17 shows the experimental waveforms of the converter
when D1 = 0.7 and D2 = 0.5. Therein, the negative and pos-
itive output voltages are asymmetric; the positive one is about
20 V, which is nearly equal to Vd /2 and has a width of D1 T ,
while the negative one is 40 V, which is much larger than Vd /2.
The experimental results are also consistent with the simulation
results.
In order to verify that the proposed converter has a balanced
midpoint voltage, the experimental result is shown in Fig. 18.
Therein, the ripples of vCd2 in the proposed converter have Fig. 20. Comparison between the experimental and estimation efficiencies.
maximal peak-to-peak values just about 98.4 mV.
The start-up waveforms with the start-up time of about 80 ms increasing from 1 to 10 Ω at a step length of 1 Ω, as shown
are shown in Fig. 19. in Fig. 20. It is remarked that, as the resistance increases,
The efficiency is obtained through an experiment and the the power reduces and the efficiency decreases; moreover, the
calculation according to (13), with regard to the resistance output voltages can be regulated.
1278 IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS, VOL. 61, NO. 3, MARCH 2014

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pp. 504–510, Mar./Apr. 2003. of Automation and Information Engineering, Xi’an
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Jan. 2012. electronics and electric transmission, by taking suc-
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based energy-recycling zero-voltage electronic loads,” IEEE Trans. Ind. School of Electric Power, South China University
Electron., vol. 56, no. 12, pp. 4894–4902, Dec. 2009. of Technology, Guangzhou, China, since September
[14] M. S. Shen, J. Wang, A. Joseph, F. Z. Peng, L. M. Tolbert, and 2010. He has also been working toward the Ph.D.
D. J. Adams, “Constant boost control of the Z-source inverter to minimize degree at the Faculty of Mathematics and Computer Science, FernUniversität
current ripple and voltage stress,” IEEE Trans. Ind. Appl., vol. 42, no. 3, in Hagen, Hagen, Germany, since 2011.
pp. 770–778, May/Jun. 2006. His research interests include power electronics topology and applications.
ZHANG et al.: Z-SOURCE HALF-BRIDGE CONVERTER 1279

Zhong Li received the B.Sc. degree from Sichuan Wenxun Xiao was born in Hainan, China, in 1979.
University, Chengdu, China, in 1989, the M.Sc. de- He received the B.Sc., M.Sc., and Ph.D. degrees in
gree from Jinan University, Guangzhou, China, in electrical engineering from the South China Uni-
1996, the Ph.D. degree from the South China Uni- versity of Technology, Guangzhou, China, in 2002,
versity of Technology, Guangzhou, in 2000, and the 2005, and 2008, respectively.
D.Sc. (Habilitation) degree from the FernUniversität Since 2008, he has been with the School of Elec-
in Hagen, Hagen, Germany, in 2007. trical Power, South China University of Technology,
He was an Adjunct Professor with the FernUni- where he is currently an Associate Professor. His
versität in Hagen. He is currently with the Fac- research interests include topology and control meth-
ulty of Engineering, University of Duisburg–Essen, ods of switching power supplies, and multiphysics
Duisburg, Germany. His research interests include coupling of power electronics equipment.
fuzzy logic and fuzzy control, chaos theory and chaos control, intelligent
computation and control, complex networks, and swarm intelligence. He serves
as Associate Editor for six international journals and has published three books
with Springer-Verlag, 18 book chapters, 53 journal papers, and 38 conference
papers. Wolfgang A. Halang received the Ph.D. degree
in mathematics from Ruhr-Universität Bochum,
Bochum, Germany, in 1976, and the Ph.D. degree
in computer science from the Universität Dortmund,
Bo Zhang (M’03) was born in Shanghai, China, in Dortmund, Germany, in 1980.
1962. He received the B.Sc. degree in electrical engi- He worked both in industry (Coca-Cola GmbH
neering from Zhejiang University, Hangzhou, China, and Bayer AG) and in academia (King Fahd Uni-
in 1982, the M.Sc. degree in power electronics from versity of Petroleum and Minerals, Dhahran, Saudi
Southwest Jiaotong University, Chengdu, China, in Arabia, and the University of Illinois at Urbana–
1988, and the Ph.D. degree in power electronics from Champaign, Urbana, IL, USA), before he was
the Nanjing University of Aeronautics and Astronau- appointed as the Chair of Applications-Oriented
tics, Nanjing, China, in 1994. Computing Science and the Head of the Department of Computing Science,
He is currently the Vice Dean of the School of University of Groningen, Groningen, The Netherlands. Since 1992, he has been
Electric Power, South China University of Technol- the Chair of Computer Engineering with the Faculty of Electrical and Computer
ogy, Guangzhou, China, where he is also a Professor. Engineering, FernUniversität in Hagen, Hagen, Germany, where he was the
He has authored or coauthored more than 330 papers and is the holder of 30 Dean from 2002 to 2006. He was a Visiting Professor with the University of
patents. His current research interests include nonlinear analysis and control of Maribor, Maribor, Slovenia, in 1997, and the University of Rome II, Rome,
power supplies and ac drives. Italy, in 1999. His research interests comprise all major areas of hard real-time
computing with special emphasis on safety-related systems. He is the Founder
and was the European Editor-in-Chief of the journal Real-Time Systems, is a
Member of the Editorial Boards of four other journals, was a Codirector of the
Dongyuan Qiu (M’03) was born in China in 1972. 1992 North Atlantic Treaty Organization Advanced Study Institute on Real-
She received the B.Sc. and M.Sc. degrees from the Time Computing, has authored 12 books and some 350 refereed book chapters,
South China University of Technology, Guangzhou, journal publications, and conference contributions, has edited 20 books, is
China, in 1994 and 1997, respectively, and the Ph.D. the holder of 12 patents, and has given some 80 guest lectures in more than
degree from the City University of Hong Kong, 20 countries.
Kowloon, Hong Kong, in 2002. Dr. Halang is active in various professional organizations and technical
She is currently a Professor with the School of committees as well as being involved in the program committees of some
Electric Power, South China University of Technol- 180 conferences. In the International Federation of Automatic Control, he
ogy, Guangzhou. Her main research interests include chaired the Technical Committee on Real-Time Software Engineering before
design and control of power converters, fault diag- he became a Member of the Technical Board from 2002 to 2008 chairing the
nosis, and sneak circuit analysis of power electronic Coordinating Committee on Computers, Cognition, and Communication for
systems. Control.