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Operational Amplifier

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48 views83 pages

Operational Amplifier

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mahalakshmi
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Operational Amplifier

Contents
 Introduction
 OPAMP Symbol
 Internal block diagram
 Open-loop configuration
 Common mode rejection ratio
 OPAMP equivalent circuit
 OPAMP characteristics
 Closed-loop configuration
Contents
 Inverting Amplifier
 Non-inverting Amplifier
 Summing Amplifier, Difference Amplifier
 Differentiator
 Integrator
Reference book
 OPAMPS and Linear Integrated Circuits
by Ramakanth Gayakwad
Introduction
 Operational Amplifier (OPAMP) is a very high
gain amplifier fabricated on Integrated
Circuit (IC)

 Finds application in
 Audio amplifier
 Signal generator
 Filters
Introduction
 Advantages of OPAMP over transistor
amplifier

 Less power consumption


 Costs less
 More compact
 More reliable
 Higher gain can be obtained
 Easy design
OPAMP terminals

+VCC

Non inverting +
input
Output
Inverting input –

–VEE
OPAMP terminals

+VCC

Non inverting +
input
Output

Inverting input –

–VEE
OPAMP terminals
 Two DC power supplies
(dual) are required
 Magnitudes of both may
be same
 The other terminal of both
power supplies are
connected to common
ground
 All input and output
voltages are measured
with reference to the
common ground
OPAMP terminals
 If input is applied to non +VCC
inverting input terminal, then
output will be in-phase with
input Non inverting
+
input
 If input is applied to inverting
Out
input terminal, then output
put
will be 180 degrees out of Inverting –
phase with input input

 If inputs are applied to both


–VEE
terminals, then output will be
proportional to difference
between the two inputs
OPAMP terminals

-VEE

Integrated Circuit
Internal Block Diagram

Differential Level
Intermediate Output
Amplifier Shifter
Stage Stage
Stage Stage

 1. The Input stage or differential amplifier stage


amplifies the difference between the two input
signals; High input resistance of the OPAMP is
because of the input stage.
Internal Block Diagram

Differential Level
Intermediate Output
Amplifier Shifter
Stage Stage
Stage Stage

Intermediate stage use direct coupling;


provides additional voltage gain.
Internal Block Diagram

Differential Level
Intermediate Output
Amplifier Shifter
Stage Stage
Stage Stage

Level shifter stage shifts the dc level


of the output voltage to zero.
Internal Block Diagram

Differential Level
Intermediate Output
Amplifier Shifter
Stage Stage
Stage Stage

 Output stage is a power amplifier stage. It increases


the current supplying capability of the OPAMP. The
low output resistance of the OPMP is because of the
output stage.
Open-loop configuration

If v1 = 0, then vo = –AOLv2 Inverting amplifier


If v2 = 0, then vo = AOLv1 Non inverting amplifier
Open-loop configuration

AOL : AOL the open-loop voltage gain of the


OPAMP

AOL = 0.5 x 106 (Typical)

 So, even if input is in micro volts, output will


be in volts
Open-loop configuration
If input is in milli volts, output reaches saturation
value ±Vsat = ±VCC (or ±VEE)
Open-loop configuration

v0 = Advd + Acmvcm

Where Ad is the differential gain for the difference signal vd = (v1 – v2 )

Acm is the common mode gain for the common mode signal vcm = (v1 + v2)/2
Open-loop configuration
Problems
 An OPAMP has differential voltage gain of 100,000
and CMRR of 60dB. If non inverting input voltage is
150 μV and inverting input voltage is 140 μV,
calculate the output voltage of OPAMP.

Ans. 1.0145V
Q. 2 For an OPAMP, when v1 is 0.5 mV and v2 is – 0.5 mV, output
voltage is 8 V. For the same OPAMP, when v1 = v2 = 1 mV, output
voltage is 12 mV. Calculate the CMRR of the OPAMP

Ans: CMRR = 666.67 (56.48 dB)


Soln.

V1
† Op.amp.
V2 − V0

V01 = Ad Vd + Acm Vcm


8 = Ad x 1 x 10-3
Ad = 8000

V02 = Ad Vd + Acm Vcm


12 x 10-3 = Acm x 1 x 10-3
Acm = 12

CMRR = Ad / Acm = 8000/12 = 666.67


OPAMP equivalent circuit
Practical OPAMP
vid =( vi1– vi2)

Ri +

AOLvid Ro
-
vo
vi1 vi2
OPAMP Characteristics
 Differential mode gain Ad
 It is the factor by which the difference between
the two input signals is amplified by the OPAMP

 Common mode gain Acm


 It is the factor by which the common mode input
voltage is amplified by the OPAMP

 Common mode rejection ratio (CMRR)


 Is the ratio of Ad to Acm expressed in decibels
OPAMP Characteristics
 Input resistance Ri
 It is the equivalent resistance measured between
the two input terminals of OPAMP

 Output resistance Ro
 It is the effective resistance provided by the
output stage.

 Bandwidth
 It is the range of frequency over which the gain of
OPAMP is almost constant
OPAMP Characteristics
 Output offset voltage Voo
 It is the output voltage when both input voltages
are zero
 Denoted as Voo

 Input offset voltage Vio


 It is the differential input voltage that must be
applied at the input terminals in order to make
output voltage equal to zero
 Vio = |v1 – v2| for vo = 0
OPAMP Characteristics
 Input offset current Iio
 It is the difference between the currents in the
input terminals when both input voltages are
zero
 Iio = | I1 – I2 | when v1 = v2 = 0

 Input bias current Iib


 It is the average of the currents in the input
terminals when both input voltages are zero
 Iib = (I1 + I2) / 2 when v1 = v2 = 0
OPAMP Characteristics
 Slew rate SR
 It is the maximum rate of change of output
voltage with respect to time
 Slew rate decides the max. frequency of operation
of the op amp.

 Supply voltage rejection ratio SVRR


 It is the maximum rate at which input offset
voltage of OPAMP changes with change in one of
the power supply voltage.
OPAMP Characteristics
 Practical characteristics of 741C OPAMP

 Differential mode gain is 200,000


 CMRR is 90 dB
 Input resistance is 2 MΩ
 Output resistance is 75 Ω
 Slew rate is 0.5 V / μs
 Output offset voltage is 1 mV
 Input offset current is 20 nA
 Input bias current is 80 nA
OPAMP Characteristics
 Characteristics of Ideal OPAMP
 Infinite differential mode gain
 Zero common mode gain
 Infinite CMRR
 Infinite input resistance
 Zero output resistance
 Infinite slew rate
 Infinite bandwidth
 Zero input offset voltage
 Zero input offset current
 Zero output offset voltage
OPAMP equivalent circuit
Ideal OPAMP

+

AOLvid
vo
vi1 vi2
Transfer Characteristics of Op-Amp
 In the linear region, any change in the input difference voltage,
±Vid produces a proportional output voltage.

 The range of input difference voltage to operate the op-amp in


linear region is approximately equal to 100 mV.

 Beyond 100mV of ±Vid, the output becomes ±Vsat because of


very high gain offered by the op-amp.

 The output will be at +Vsat if it is used in non- inverting mode or -


Vsat if it is configured in inverting mode.
Operational Amplifier
Closed-loop configurations
 Open-loop voltage gain, AOL of an OPAMP is
very high; such high gain is not required for
linear applications.

 In order to reduce the gain, a part of output


signal is fed back to the inverting input
terminal (called negative feedback)
Inverting Amplifier
RF
Inverting Amplifier
 Input is applied to inverting terminal
 Non inverting is grounded
 Feedback is given to inverting terminal
through resistor RF
Current entering OPAMP input terminal is
almost zero
Inverting Amplifier
i2 RF Vi = Ii x Ri
=0x∞
i1 = 0V
0

+
0V

Virtual
ground
KCL At Node A:
RF i1 = iin + i2

i1 i2 iin = 0 ;
AA
Iiiiin i1 = i2
VA = VX = 0V

Vin / R1 = - V0 /RF
Vo = [-RF / R1 ]Vin
Vo = ACL Vin

ACL = -RF / R1
Non Inverting Amplifier

RF
Non Inverting Amplifier
 Input is applied to non inverting terminal
 Feedback is given to inverting terminal
 Output voltage will be in-phase with input
voltage
 Here again, the following assumptions are
made
 Since Ad is very high, vid should be very small;
vid taken as almost zero
 Current entering OPAMP input terminal is
almost zero
Non Inverting Amplifier
v1

v2
RF

i2
i1

v1 = 0 + v2
vin = v2
Hence v2 = vin
Non Inverting Amplifier
Problems
 1A.For an inverting amplifier using OPAMP, R1=1KΩ,
RF=100KΩ, vin=0.1sin(ωt) volts, +Vcc = +12V & -VEE = -12V .
Find vo and sketch the output.
 1B. Repeat Q.1A if vin = 0.2 sinwt volts.

Ans: Q.1A. v0 = –10sin(ωt) Q.1B v0 = -20sinwt X. Hence v0


saturates at ±12V

 2.For a non inverting amplifier, R1=10KΩ,


RF=100KΩ. Calculate vo if vi = 25 mV dc.
Ans: 275 mV dc

 3.An ac signal of rms value 2 mV needs to be


amplified to 1.024 V rms, 180 degree phase shifted.
Design a suitable amplifier choosing R1=1.2KΩ
Ans: Inv. amplifier with RF=614.4KΩ
Voltage Follower

 Special case of non inverting amplifier where RF=0


 Voltage gain is unity. vo = vin
 Has very high input resistance and very low output
resistance; Used as buffer for impedance matching
Summing Amplifier (Adder)

iF

iA

iB
Summing Amplifier (Adder)

 If RA=RB=RF, then
Then the circuit is called as an adder
Difference Amplifier (Subtractor)
Difference Amplifier (Subtractor)
 The circuit is analyzed using superposition
theorem
 Consider only v1 to be present; v2=0
Now derive expression for output voltage vo1
 Next consider only v2 to be present; v1=0
Derive expression for output voltage v02
 Actual output voltage vo = vo1+vo2
Difference Amplifier (Subtractor)

vx

To find V01 :-
Consider v1 and make v2 = 0V
v01 = [1 +RF / R2] vx (1)

v01 = [1 + RF / R2] [v1R3 / (R1+R3) ]


Difference Amplifier (Subtractor)

To Find v02:
Consider v2 and make v1 = 0V

V1 = OV
v02 = (-RF / R2) v2
Difference Amplifier
Problems
1.Design an OPAMP circuit such that output is given by
vo=–(0.5v1+0.75v2) where v1 and v2 are input voltages.
Choose RF=10KΩ.
1.Design an OPAMP circuit such that output is given by
vo= -(0.5v1+0.75v2) where v1 and v2 are input voltages. Choose
RF=10KΩ.

Soln.
Design Summing amplifier.

Vo = - [ (RF / RA ) vA + (RF / RB) vB ]

RF / RA = 0.5 ; RF / RB = 0.75

RA = RF / 0.5 = 20KΩ

RB = RF / 0.75 = 13.33KΩ
2. Design an OPAMP ckt. to get output voltage

Soln.
v0 = - [(RF /R1) v1 + RF/R2 (-v2) + (RF/R3)v3 ]

Design summing amplifier with RF/R1 = 0.5 ; RF/R2 = 2/3 and


RF/R3 = 1.

Also use op.amp. sign changer to change the sign of input v2


2.Design an OPAMP circuit to have an output given by:

Choose RF=1KΩ.

Soln. Design Difference amplifier

Hence RF/R2 = 1 ; R2 = 1KΩ

1 + R1/R3 = 3 ; R1 = 2R3
Operational Amplifier
Integrator
Integrator is a circuit whose output is
proportional to (negative) integral of the input
signal with respect to time.

Feedback is given through capacitor to


inverting terminal
Integrator
VA = 0V

KCL at Node A:
(Vin – VA ) /R = C d(VA – V0 ) /dt

Vin /R = - C dV0 / dt

dV0 /dt = [-1/RC] Vin


Problem: Sketch the output waveform for the op.amp. Integrator if
the input signal is a square wave as shown. Select R=1KΩ and
C=1μF.

Fig. (a) Input signal

Fig. (b) Output signal ?

Soln. (a) For 0≤ t≤1ms, vin = +5V

= -5 x 10 3 t volts

At t = 1ms, we get v0 = -5V


Integrator

b) For 1 ≤t≤3ms, With Vin = -5V

V0 = -5 + 5 x 103 (t – 1) ; 1 ≤t≤3ms

At t = 3 ms, V0 = 5V
Differentiator
 Differentiator is circuit whose output is
proportional to (negative) differential of input
voltage with respect to time

 Input is given through capacitor, feedback


given through resistor to inv. terminal
Differentiator
Assume ideal op.amp
VA = 0V
iR KCL:
iC = iR
VA
iC

V0 = - RC dvin /dt
End
1. In a Zener voltage regulator circuit Vin=20 V, Rs=520 Ohm ,Vz=12
V, and RL=1.2 K Ohm Calculate IL, IZ, PL, P and PS,
5
2. In a fixed bias circuit VCC=20 V, RC=2.2K, RB=470K, Find the
operating point. 5
3. A three stage amplifier has voltage gains 20 dB, 45 and 15 dB
respectively, Calculate the over all voltage gain in ratio and dB.
3
4. Design a circuit using an op amp to get the following output vo =
(0.25 v1+ 1.5 v2 – 0.5 v3). Given that RF =10 K
5
5. Show that vo=2(v1+v2+v3), if v1, v2,,v3 are the inputs to a non
inverting op amp circuit and all resistors are equal.
2
NON-LINEAR APPLICATIONS OF OPAMP

Department of Electronics and Communication Engineering, MIT, Manipal 1


NON-LINEAR APPLICATIONS OF OPAMP

Learning Outcomes:

At the end of this module, students will be able to :

1. Discuss different types of OPAMP based Comparators.

2. Discuss OPAMP based square wave generator circuit.

Department of Electronics and Communication Engineering, MIT, Manipal 2


1. Voltage Comparator:
1A. Non-inv. Comparator:

-VEE

Fig. Non-inv. Comparator

• The output voltage of the Non-inv. comparator is given


by
𝑉𝑜𝑢𝑡 = +𝑉𝑠𝑎𝑡 𝑖𝑓 𝑉𝑖𝑛 > 𝑉𝑟𝑒𝑓

𝑉𝑜𝑢𝑡 = −𝑉𝑠𝑎𝑡 𝑖𝑓 𝑉𝑖𝑛 < 𝑉𝑟𝑒𝑓

Department of Electronics and Communication Engineering, MIT, Manipal 3


Vin = 5 sinωt
Vref = 1V
-VEE
Fig. 1 Non-inverting Comparator

-1V

Fig. 2 Output waveform if Vin = Vpsinwt

Department of Electronics and Communication Engineering, MIT, Manipal 4


1B. Inverting Comparator:
In inverting comparator, the input signal vin is applied to the
inverting terminal of the op.amp. and the reference voltage is
applied to the non-inverting terminal.

When vin < Vref, v0 = +VSAT

When vin > Vref, v0 = -VSAT

Department of Electronics and Communication Engineering, MIT, Manipal 5


SQUARE WAVE GENERATOR

𝑣0

1
𝑓0 =
𝑇

Department of Electronics and Communication Engineering, MIT, Manipal 6


SQUARE WAVE GENERATOR
VC
Vout
Vo +VSAT
+ẞVSAT
VC

V0

-ẞVSAT
-VSAT

Fig 2A. Square waveform is the output of


Fig 1. Square wave generator Square wave generator

ẞ = R1 / (R1 + R2) Fig.2B . Triangular waveform is the


±ẞVSAT = ±6V voltage across the Capacitor.

Department of Electronics and Communication Engineering, MIT, Manipal 7


SQUARE WAVE GENERATOR

The output of a Square wave generator is a Square wave


of time period T.

T = 2RC ln [ (1+ ß) / (1 – ß) ] (1)


where ß = R1/ (R1 + R2)

Frequency of the Square wave generated:


f = 1/T (2)

Department of Electronics and Communication Engineering, MIT, Manipal 8


SQUARE WAVE GENERATOR

Problem 1: In the Op-amp square wave generator, the output saturation


voltage is ±12V, all resistors are 1KΩ and C = 0.1μF. Draw the circuit. Also plot
the voltage waveform across the capacitor and V 0 by marking all the timing
and voltage levels.

Soln. ?

Department of Electronics and Communication Engineering, MIT, Manipal 9


Soln.
Given R1 = R2 = R = 1KΩ
C = 0.1μF ; ± VSAT = ±12V

ß = R1 / (R1 + R2) = 0.5 ; ±ßVSAT = ± 6V

T = 2RC ln [ (1+ ß) / (1 – ß) ] = 0.22 msec.


f = 1/T = 4.55KHz

T1 = T2 = T/2 = 0.11 msec


Draw the circuit. Draw V0 & Vc waveforms

10
Self Test:
1.The phase difference between input & output signal of an op-amp inverter
is ____ degree.
[180o]
2. The gain of op-amp based non- inverting amplifier with input
resistance R1 and feedback resistance RF is _____
[1 + RF /R1]
3. How does a practical op-amp differ from an ideal op-amp?
4. What is the significance of Slew rate?
5. Distinguish between differential gain and common mode gain of an
op- amp.

Department of Electronics and Communication Engineering, MIT, Manipal 11


Problem 2: In the op-amp square wave generator shown, the output
saturation voltage is ±12V, f = 10KHz, R = 10KΩ , C = 0.01μF & R1 =1KΩ. (a)
Find R2. (b) Sketch the voltage waveform across the capacitor and V0 by
marking all the timing and voltage levels.

Department of Electronics and Communication Engineering, MIT, Manipal 12


Problem 2: In the op-amp square wave generator shown, the output saturation
voltage is ±12V, f = 10KHz, R = 10KΩ , C = 0.01μF & R1 =10KΩ. (a) Find R2. (b) Sketch
the voltage waveform across the capacitor and V0 by marking all the timing and
voltage levels.
Soln.
Given
±VSAT = ±12V
f =10 x 103Hz ; T = 1/f = 0.1 x 10-3 sec
R = 10KΩ, C = 0.01μF, R1 =1KΩ

T = 2RC ln [ (1+ ß) / (1 – ß) ] (1)


ß = R1 / (R1 + R2 )

Simplifying Eqn. (1) we get,


(1+ ß) / (1 – ß) = 1.65
ß = 0.25 = R1 / (R1 + R2 )
With R1 = 1KΩ, R2 = 3KΩ
+ß VSAT = +3V - ß VSAT = -3V
Sketch VC and V0 waveforms.
Department of Electronics and Communication Engineering, MIT, Manipal 13
Zero Crossing Detector

Fig.1 Zero Crossing Detector Fig.2 I/P and O/P waveforms

Department of Electronics and Communication Engineering, MIT, Manipal 14


Summary

In this module we have learnt:

1. The working of OPAMP comparator

2. Analysis of OPAMP based square wave generator.

Department of Electronics and Communication Engineering, MIT, Manipal 15

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