Lecture 9

Instruction Sets:
Addressing Modes and Formats

+ Md. Nazmul Abdal

Lecturer
Department of CSE
University of Liberal Arts Bangladesh (ULAB)

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Addressing Modes
■ The address field or fields in a typical instruction format
are relatively small. We would like to be able to reference
a large range of locations in main memory or, for some
systems, virtual memory.

■ To achieve this objective, a variety of addressing

techniques has been employed. They all involve some
trade-off between address range and/or addressing
flexibility, on the one hand, and the number of memory
references in the instruction and/or the complexity of
address calculation, on the other.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Addressing Modes
■ Virtually, all computer architectures provide more than one of
these addressing modes. The question arises as to how the
processor can determine which addressing mode is being
used in a particular instruction. Several approaches are taken.
Often, different opcodes will use different addressing modes.
Also, one or more bits in the instruction format can be used as
a mode field. The value of the mode field determines which
addressing mode is to be used.

■ The second concern is the interpretation of the effective

address (EA). In a system without virtual memory, the effective
address will be either a main memory address or a register. In
a virtual memory system, the effective address is a virtual
address or a register. The actual mapping to a physical address
is a function of the memory management unit (MMU) and is
invisible to the programmer.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Addressing Modes
Immediate

Direct

Indirect

Register

Register indirect

Displacement

Stack
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+ Immediate Addressing
■ The simplest form of addressing is immediate addressing, in which the
operand value is present in the instruction

Operand = A

■ This mode can be used to define and use constants or set initial values of
variables
■ Typically, the number will be stored in two’s complement form
■ The leftmost bit of the operand field is used as a sign bit
■ When the operand is loaded into a data register, the sign bit is
extended to the left to the full data word size.

■ Advantage:
■ No memory reference other than the instruction fetch is required to
obtain the operand, thus saving one memory or cache cycle in the
instruction cycle

■ Disadvantage:
■ The size of the number is restricted to the size of the address field,
which, in most instruction sets, is small compared with the word length
© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.
+
Direct Addressing
■ A very simple form of addressing is direct addressing, in which the
address field contains the effective address of the operand:

EA = A

■ The technique was common in earlier generations of computers but is

not common on contemporary architectures.

■ It requires only one memory reference and no special calculation. The

obvious limitation is that it provides only a limited address space.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Indirect Addressing
■ With direct addressing, the length of the address field is usually less
than the word length, thus limiting the address range. One solution is to
have the address field refer to the address of a word in memory, which
in turn contains a full-length address of the operand. This is known as
indirect addressing:

EA = (A)

Advantage:
■ For a word length of N an address space of 2N is now available

■ Disadvantage:
■ Instruction execution requires two memory references to fetch the
operand: one to get its address and a second to get its value

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Indirect Addressing
■ A rarely used variant of indirect addressing is multilevel or cascaded
indirect addressing:

EA = ( . . . (A) . . . )

■ In this case, one bit of a full-word address is an indirect flag (I). If the I
bit is 0, then the word contains the EA. If the I bit is 1, then another level
of indirection is invoked. There does not appear to be any particular
advantage to this approach, and its disadvantage is that three or more
memory references could be required to fetch an operand.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Register Addressing
■ Register addressing is similar to direct addressing. The only
difference is that the address field refers to a register rather than a
main memory address:

EA = R

■ To clarify, if the contents of a register address field in an instruction

is 5, then register R5 is the intended address, and the operand value
is contained in R5.

■ Typically, an address field that references registers will have from 3

to 5 bits, so that a total of from 8 to 32 general-purpose registers can
be referenced.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Register Addressing

■ Advantage:

■ Only a small address field is needed in the instruction

■ No time-consuming memory references are required.

■ Disadvantage:

■ The address space is very limited.

■ If register addressing is heavily used in an instruction set, this implies

that the processor registers will be heavily used. Because of the severely
limited number of registers (compared with main memory locations),
their use in this fashion makes sense only if they are employed
efficiently. If every operand is brought into a register from main memory,
operated on once, and then returned to main memory, then a wasteful
intermediate step has been added. If, instead, the operand in a register
remains in use for multiple operations, then a real savings is achieved.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 + Register Indirect Addressing
■ Register indirect addressing is similar to indirect addressing. The
only difference is whether the address field refers to a memory
location or a register. Thus, for register indirect addressing:

EA = (R)

■ The advantages and limitations of register indirect addressing

are basically the same as for indirect addressing. In both cases,
the address space limitation (limited range of addresses) of the
address field is overcome by having that field refer to a word
length location containing an address. In addition, register
indirect addressing uses one less memory reference than
indirect addressing.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Displacement Addressing
■ A very powerful mode of addressing combines the capabilities
of direct addressing and register indirect addressing. It is
known by a variety of names depending on the context of its
use, but the basic mechanism is the same. We will refer to this as
displacement addressing:

EA = A + (R)

■ Displacement addressing requires that the instruction have two

address fields, at least one of which is explicit. The value
contained in one address field (value = A) is used directly. The
other address field, or an implicit reference based on opcode,
refers to a register whose contents are added to A to produce
the effective address.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Relative Addressing

■ For relative addressing, also called PC-relative addressing, the

implicitly referenced register is the program counter (PC).

■ The next instruction address is added to the address field to

produce the EA. Typically, the address field is treated as a
twos complement number for this operation. Thus, the
effective address is a displacement relative to the address of
the instruction.

■ Relative addressing exploits the concept of locality. If most

memory references are relatively near to the instruction being
executed, then the use of relative addressing saves address
bits in the instruction.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+ Stack Addressing
■ A stack is a linear array of locations. It is sometimes referred to as
a pushdown list or last-in-first-out data structure. The stack is a
reserved block of locations. Items are appended to the top of the
stack so that, at any given time, the block is partially filled.

■ Associated with the stack is a pointer whose value is the address

of the top of the stack. Alternatively, the top two elements of the
stack may be in processor registers, in which case the stack
pointer references the third element of the stack.

■ The stack pointer is maintained in a register. Thus, references to

stack locations in memory are in fact register indirect addresses.

■ The stack mode of addressing is a form of implied addressing.

The machine instructions need not include a memory reference
but implicitly operate on the top of the stack.

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

 Instruction Formats

Define the Must include an

layout of the bits opcode and, For most
of an implicitly or instruction sets
instruction, in explicitly, more than one
terms of its indicate the instruction
constituent addressing mode format is used
fields for each operand

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+
Instruction Length
■ Most basic design issue

■ Affects, and is affected by:

■ Memory size
■ Memory organization
■ Bus structure
■ Processor complexity
■ Processor speed

■ Should be equal to the memory-transfer length or one should

be a multiple of the other

■ Should be a multiple of the character length, which is usually

8 bits, and of the length of fixed-point numbers

© 2016 Pearson Education, Inc., Hoboken, NJ. All rights reserved.

+

THANK YOU