Philadelphia University

Faculty of Engineering

Marking Scheme

Exam Paper
BSc CE

Logic Circuits (630211)

Final Exam Second semester Date: 02/06/2019

Section 1
Weighting 40% of the module total

Lecturer: Dr. Qadri Hamarsheh

Coordinator: Dr. Qadri Hamarsheh
Internal Examiner: Dr. Naser Halasa
 Marking Scheme
Logic Circuits (630211)
The presented exam questions are organized to overcome course material through 6 questions.
The all questions are compulsory requested to be answered.
Marking Assignments

Question 1 This question is attributed with 10 marks if answered properly; the answers are the following:
1) The binary number 11101011000111010 can be written in hexadecimal as ________.
a) DD63A16 b) 1D63A16
c) 1D63116 d) 1D33A16
2) Refer to the following figure. If A = 0 and B = 1, what will be the logic states at X, Y and Z?

a) X=1, Y=1, Z=0 b) X=1, Y=0, Z=0

c) X=0, Y=0, Z=1 d) X=0, Y=1, Z=0
3) The simplification of the Boolean expression (𝑨 ̅̅̅̅̅̅
̅ 𝑩𝑪 ̅ ) + (̅̅̅̅̅̅̅̅
𝑨𝑩 ̅ 𝑪 ) is
a) 0 b) 1
c) A d) BC
4) The equivalent canonical (standard) form for the following logical expression
𝐅 = 𝐀𝐁 + 𝐂 is
a) 𝐅 = 𝐀𝐁𝐂 + 𝐀 ̅ 𝐁𝐂 + 𝐀𝐁 ̅𝐂 + 𝐀 ̅𝐁̅𝐂
b) 𝐅 = 𝐀𝐁𝐂 + 𝐀𝐁 ̅𝐂 + 𝐀 ̅𝐁̅ 𝐂 + 𝐀𝐁𝐂̅
c) ̅
𝐅 = 𝐀𝐁𝐂 + 𝐀𝐁𝐂 + 𝐀𝐁𝐂 + 𝐀 ̅ ̅𝐁̅ 𝐂 + 𝐀𝐁𝐂̅
d) None of the above
5) The function 𝐅(𝐀, 𝐁, 𝐂) = ∑(𝟏, 𝟐, 𝟑, 𝟓, 𝟕) is equivalent to
a) ̅+𝑨
𝑪 ̅𝑩 b) 𝑪 + 𝑨𝑩
c) ̅
𝑪 + 𝑨𝑩 d) 𝑪 + 𝑨𝑩 ̅
6) Which of the following circuits come under the class of combinational logic circuits?
1. Full adder 2. Full subtracter
3. Half adder 4. J-K flip
5. Counter
Select the correct answer from the codes given below:
a) 1 only b) 3 and 4
c) 4 and 5 d) 1, 2, and 3
7) The Boolean function realized by the logic circuit shown is

a) 𝐅 = Ʃ𝐦 (𝟎, 𝟏, 𝟑, 𝟓, 𝟗, 𝟏𝟎. 𝟏𝟒) b) 𝐅 = Ʃ𝐦 (𝟐, 𝟑, 𝟓, 𝟕, 𝟖, 𝟏𝟐. 𝟏𝟑)

c) 𝐅 = Ʃ𝐦 (𝟏, 𝟐, 𝟒, 𝟓, 𝟏𝟏, 𝟏𝟒. 𝟏𝟓) d) 𝐅 = Ʃ𝐦 (𝟐, 𝟑, 𝟓, 𝟕, 𝟖, 𝟗. 𝟏𝟐)
8) The circuit shown here is most likely a ________.

a) Adder b) Multiplexer
c) Demultiplexer d) Parity generator
 9) If the input combination A=0, B=1 is applied to this circuit, the (steady state) output will be:

a) X=0, Y=0 b) X=0, Y=1

c) X=1, Y=0 d) X=1, Y=1
10) The characteristic equation for the T-Flip Flop is:
a) 𝑸(𝒕 + 𝟏) = 𝑻. 𝑸 ̅ + 𝑻 ̅. 𝑸 b) 𝑸(𝒕 + 𝟏) = 𝑻 ̅ + 𝑻. 𝑸
̅. 𝑸
Question 2 This question is attributed with 6 marks if answered properly; the answers are the following:
a) (1.5 marks)
Solution
Three weighted Binary codes codes are:
1. BCD (8421)
2. 6311
3. 2421
4. 642-3
5. 84-2-1
b) (2.5 marks)
Solution

c) (2 marks)
Solution
Question 3 This question is attributed with 7 marks if answered properly; the answers are the following:
a) (4 marks)
Solution
Inputs Outputs 𝑺 = 𝑪𝒊𝒏 ⨁(𝑿⨁𝒀)
{ }
𝑿 𝒀 𝑪𝒊𝒏 𝑺 𝑪𝒐𝒖𝒕 𝑪𝒐𝒖𝒕= 𝑪𝒊𝒏 ∙ (𝑿⨁𝒀) + 𝑿𝒀
0 0 0 0 0 Proof:
0 0 1 1 0 The sum:
0 1 0 1 0 𝐒=𝐗 ̅ ̅𝐘𝐂𝐢𝐧 + 𝐗̅𝐘𝐂̅̅̅̅ ̅ ̅̅̅̅
𝐢𝐧 + 𝐗𝐘 𝐂𝐢𝐧 + 𝐗𝐘𝐂𝐢𝐧
0 1 1 0 1 ̅̅̅̅ ̅ ̅
= 𝐂𝐢𝐧 (𝐗𝐘 + 𝐗𝐘) + 𝐂𝐢𝐧 (𝐗 ̅ ̅𝐘 + 𝐗𝐘)
1 0 0 1 0 = ̅̅̅̅ ̅𝐘 + 𝐗𝐘
𝐂𝐢𝐧 (𝐗 ̅) + 𝐂𝐢𝐧 ̅̅̅̅̅̅̅̅̅̅̅̅̅̅
̅𝐘 + 𝐗𝐘
(𝐗 ̅)
1 0 1 0 1 𝑺 = 𝑪𝒊𝒏 ⨁(𝑿⨁𝒀)
1 1 0 0 1 The carry output:
1 1 1 1 1 ̅ 𝐘𝐂𝐢𝐧 + 𝐗𝐘̅ 𝐂𝐢𝐧 + 𝐗𝐘𝐂𝐢𝐧 + 𝐗𝐘 ̅̅̅̅
𝑪𝒐𝒖𝒕 = 𝐗 𝐂𝐢𝐧
Truth table for the full adder ̅ ̅ ̅̅̅̅
= 𝐂𝐢𝐧 (𝐗𝐘 + 𝐗𝐘) + 𝐗𝐘(𝐂𝐢𝐧 + 𝐂𝐢𝐧 )
𝑪𝒐𝒖𝒕= 𝑪𝒊𝒏 ∙ (𝑿⨁𝒀) + 𝑿𝒀

X Y C in First Half Adder Second Half Adder

X Y X  Y  C in
S

XY  X Y C
in  XY
Cout

Implementation of Full Adder with two Half Adders and an OR gate

b) (3 marks)
Solution
Question 4 This question is attributed with 7 marks if answered properly; the answers are the following:
a) (3 marks)
Solution
𝐅𝟏 = ̅̅̅̅̅̅̅̅̅̅̅
(𝐗 + 𝐙) + 𝐗𝐘𝐙 = 𝐗’𝐙’ + 𝐗𝐘𝐙 = 𝐗’𝐙’(𝐘 + 𝐘’) + 𝐗𝐘𝐙 = 𝐗’𝐘’𝐙’ + 𝐗’𝐘𝐙’ + 𝐗𝐘𝐙
= 𝐦𝟎 + 𝐦𝟐 + 𝐦𝟕
̅̅̅̅̅̅̅̅̅̅̅
𝐅𝟐 = (𝐗 + 𝐙) + 𝐗’𝐘𝐙 = 𝐗’𝐙’ + 𝐗’𝐘𝐙 = 𝐗’𝐙’(𝐘 + 𝐘’) + 𝐗’𝐘𝐙 = 𝐗’𝐘’𝐙’ + 𝐗’𝐘𝐙’ + 𝐗’𝐘𝐙
= 𝐦𝟎 + 𝐦𝟐 + 𝐦𝟑
𝐅𝟑 = 𝐗𝐘’𝐙 + (𝐗 ̅̅̅̅̅̅̅̅̅̅̅
+ 𝐙) = 𝐗𝐘’𝐙 + 𝐗’𝐙’ = 𝐗𝐘’𝐙 + 𝐗’𝐙’(𝐘 + 𝐘’) = 𝐗𝐘’𝐙 + 𝐗’𝐘’𝐙’ + 𝐗’𝐘𝐙’
= 𝐦𝟓 + 𝐦𝟎 + 𝐦𝟐

b) (2 marks)
Solution

c) (2 marks)
Solution
Question 5 This question is attributed with 5 marks if answered properly; the answers are the following:

Solution
a) (1.5 marks)

b) (2 marks)

c) (1.5 marks)
Question 6 This question is attributed with 5 marks if answered properly; the answers are the following:

Solution

(2 marks)

(2 marks)

(1 mark)