2/5/25, 2:55 PM MOSFET Interview Questions Part 1 | vlsi4freshers

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MOSFET Interview Questions Part 1

vlsi4freshers April 01, 2020 Add Comment  CMOS Basics , CMOS Interview Questions

Why low power has become an important issue in the present day VLSI circuit realization?

In deep sub-micron technology the power has become as one of the most important issue because
Greater device leakage currents: In nm technology the leakage component becomes a significant
percentage of the total power and the leakage current increases at a faster rate than dynamic powe
technology generations.
Increasing transistor count; the number of transistors is getting doubled in every 18 months based o
Moore,s Law.
Higher speed of operation: the power dissipation is proportional to the clock frequency
Why leakage power dissipation has become an important issue in deep sub-micron technology?
In deep sub-micron technology the leakage component becomes a significant percentage of the tot
power and the leakage current increases at a faster rate than dynamic power in
new technology generations. That is why the leakage power has become an important issue.

Explain the basic structure of a MOS transistor.

The basic structure of a MOS transistor is given below. On a lightly doped substrate of silicon two is
of diffusion regions called as source and drain, of opposite polarity of that of the substrate, are crea

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Between these two regions, a thin insulating layer of silicon dioxide is formed and on top of this a
conducting material made of poly-silicon or metal called gate is deposited.
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What is the latch up problem that arises in bulk CMOS technology?

The latch-up is an inherent problem in both n-well as well as pwell based CMOS circuits. The
phenomenon is caused by the parasitic bipolar transistors formed in the bulk of silicon as shown in
figure for the n-well process. Latch-up can be defined as the formation of a low-impedance path be
the power supply and ground rails through the parasitic npn and pnp bipolar transistors. As shown t
BJTs are cross-coupled to form the structure of a silicon-controlled-rectifier (SCR) providing a short
circuit path between the power rail and ground. Leakage current through the parasitic resistors can
cause one transistor to turn on, which in turn turns on the other transistor due to positive feedback
and leading to heavy current flow and consequent device failure.

How the latch up problem can be overcome?

There are several approaches to reduce the tendency of Latch-up. Some of the important techniqu
are mentioned below:
Use guard ring around p- and/or n-well with frequent contacts to the rings
Buried n+ layer in well to reduce gain of Q1
Reduce R-well by making low resistance contact to GND

Explain the three modes of operation of a MOS transistors.

The three modes are:

What are the three regions of operation of a MOS transistor?

Cut-off region: This is essentially the accumulation mode, where there is no effective flow of curre
between the source and drain.
Non-saturated region: This is the active, linear or week inversion region, where the drain current i
dependent on both the gate and drain voltages.
Saturated region: This is the strong inversion region, where the drain current is independent of the
drain-to-source voltage but depends on the gate voltage.

What is the threshold voltage of a MOS transistor? How it varies with the body bias?

One of the parameters that characterizes the switching behavior of a MOS transistor is its threshold
voltage Vt. This can be defined as the gate voltage at which a MOS transistor begins to conduct.

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What is channel length modulation effect? How the voltage current characteristics are affected
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this effect?
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It is assumed that channel length remains constant as the drain voltage is increased appreciably be
the on set of saturation. As a consequence, the drain current remains constant in the saturation reg
In practice, however the channel length shortens as the drain voltage is increased.For long
channel lengths, say more than 5 μm, this variation of length is relatively very small compared to th
length and is of little consequence.
However, as the device sizes are scaled down, the variation of length becomes more and more
predominant and should be taken into consideration. As a consequence, the drain current increase
the increase in drain voltage even in the saturation region.

What is body effect? How does it influences the threshold voltage of a MOS transistor?

All MOS transistors are usually fabricated on a common substrate and substrate (body) voltage of a
devices is normally constant. However, as we shall see in subsequent chapters, when circuits are
realized using a number of MOS devices, several devices are connected in series. This results in
different source potentials for different devices. It may be noted that the threshold voltage Vt is not
constant with respect to the voltage difference between the substrate and the source of the MOS
transistor. This is known as the substrate-bias effect or body effect. Increasing the Vsb causes the
channel to be depleted of charge carries and this leads to increase in the threshold voltage.

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