QUESTION BANK

Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /

U20CSCT01

QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

UNIT I
PART – A
Outline about computer
1
Architecture
Compare difference between
2 Computer Architecture and
Organization?
Show the Functional
3
Components of a computer.
4 Explain digital computer.
Summarize about Input
5
Unit
Infer the types of output
6
Unit
Illustrate Memory Unit of
7
computer
8 Outline about Register.
9 Show the functions of CPU
Summarize the functions of
10
ALU
PART – B
1 Show the various registers
and their functions.
2 Illustrate block diagram of
Control Unit and explain.
3 Compare Fetch cycle and
Execution Cycle.
4 Summarize about memory
hierarchy?
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

5 Illustrate the digramatic

representation of Instruction
cycle state diagram.
6 Summarize the Register
Indirect mode.
7 Explain the key
characteristics of Computer
Memory Systems

8 Outline the basic functional

units of a computer with
neat sketch
9 Relate the knowledge and
operation of ALU unit?

10 Demonstrate the operations

of instruction
PART – C
Explain about basic
functional blocks of
1
computer.

Explain about Instruction set

2
architecture.
Summarize Addressing
3
Mode. Explain any 4 types.
Classify the types of
4
addressing modes in detail
Outline the instruction
5 Execution cycle and explain
it.
Show features of register
6
transfer logic with example.
Summarize the instruction
7
set and its types
UNIT II
PART – A
1 Solve the following
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

conversion. Binary to
Decimal (1.00101)2
Summarize single precision
2
in IEEE 754 format.
Outline the phases of
3
pipelining.
Explain the algorithm for
4 restoring division
technique .
Show the execution unit in
5
pipelining.
Classify the types of data
6
hazards.
7 Explain about Pipelining.
Interpret the advantage of
8
pipelining.
Summarize about program
9
counter.
Identify the functions of the
10 instruction decoder and
control logic.
PART – B
1 Summarize signed number
representation in detail
2 Apply the algorithm and
flowchart of Booth’s
algorithm in detail
3 Identify the Fixed and
floating point operation in
detail
4 Organize the ripple carry
adder with diagram
5 Construct with example
Integer addition and
subtraction
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

6 Solve and explain with

example Carry look ahead
adder
7 Explain with diagram IEEE
754 format
8 Experiment with the
execution carry save
multiplier
9 Explain floating point
arithmetic using non
restoring algorithm
10 Solve 11 divide by 3 using
Restoring Division
Algorithm
PART – C
Identify the performance of
1
a pipeline in brief
Organize the execution of a
2
complete instruction
Construct ripple carry
3 adder , look -ahead adder
with example
Summarize the floating
4 point arithmetic with
example
Solve integer addition with
5
example
Apply the integer
6
subtraction with example
Explain briefly signed
7 number representation with
Example
UNIT III
PART – A

1 Summarize about MIPS

 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

2 Classify the types of hazards.

3 Construct the stages of pipeline in MIPS architecture.
4 Identify MIPS instruction format
5 Illustrate about stalling in pipeline.
6 Outline the construction of data path.
7 Summarize about Instruction Fetch
8 Identify Branch Instructions.
9 Develop control implementation scheme.
10 Summarize Control hazards with example.
PART – B
1 Explain Implementation of MIPS architecture with multiplexers and control
lines Sequence of operations
2 Compare between Combinatorial and Sequential elements
3 Describe about Building a data path
4 Explain the Instruction Fetch with diagram
5 Identify the Branch Instruction with diagram
6 Build the construction steps for data path.
7 Explain about MIPS Architecture.

8 Utilize the implementation scheme of control lines with diagram.

9 Explain different types of hazards that occur in a pipeline.
10 Construct the MIPS implementation in detail with advantages and
disadvantages.

PART – C
1 Explain in detail in pipeline and its Execution
2 Develop in detail about control implementation
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

Scheme
3 Explain in detail Instruction Fetch in brief
4 Organize the MIPS Architecture
5 Apply Implementation scheme with control lines with diagram
6 Illustrate throughput and speed up with appropriate formula.

7 Demonstrate data path implementation scheme with appropriate diagrams.

UNIT IV
PART – A
1 Summarize the Parallelism.
Identify the limitations of
2
multicore processor.
Classify the types of Flynn’s
3
taxonomy.
Show the challenges in
4
parallel processing?
Identify the main difference
5
in SIMD and GPU
Organize the features of
6
GPU.
Explain the influence of
7
instruction sets.
Explain about graphics
8
processing unit.
Build the MIMD instruction
9
architecture and explain
Classify the categories of
10
Flynn’s taxonomy.
PART – B
1 Explain about the
architecture of multi-core
processor.
2 Construct GPU architecture
and explain with GPU
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

pipeline.
3 Classify the parallel
machine. Define different
types of parallel machine
(block diagram, example).
4 Explain about graphics card
in parallel processing.
5 Illustrate Instruction Level
Parallelism.
6 Explain about parallel
processing.
7 Classify organisation of
computers using Flynn’s
criteria.
8 Compare CPU and GPU.
9 Explain the
worki
ng
princi
ples
of
GPU
10 Explain the challenges of
parallel processing
PART – C
Explain the categories of
1
Flynn’s taxonomy.
Build the architecture of
2
multi-core processor.
Experiment
with
Instru
3 ction
Level
Parall
elism.
Construct the Parallel
4 processors with neat
diagram
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

Outline the applications of

5
GPU in brief

6 Organize the taxonomy of

parallel computers.
Develop GPU architecture
7 with its
configuration.
UNIT V
PART – A
1 Analyse cache.
2 Examine the term TLB?
3 Categorize static memories?
4 Discover the Hit Ratio.
5 Compare SRAM and DRAM?
6 Simplify the usage of USB in modern world.
List out the types of data transfer techniques used with IO
7
interface?
8 Analyse the flash memory?
9 List the advantages of write through cache.
10 Inspect the disk controller?
PART – B
1 Examine about TLB.
2 List the difference between static RAM and dynamic RAM.
3 Function about USB with neat architecture.
4 Examine Direct Memory Access.
5 Relationship between CPU registers, Main memory,
Secondary memory and cache memory?
6 Examine about various exceptions.
7 Analyse memory interleaving?
8 Organize the characteristics of some common memory
technologies.
9 Analyse virtual memory? Discuss how paging helps in
 QUESTION BANK
Course Name/Code : COMPUTER ORGANAIZATION AND ARCHITECTURE /
U20CSCT01

implementing virtual memory.

10 Inference about interrupts? How are they handled?

PART – C

1 Dissect about direct and set associative map technique in

cache
Develop how I/O devices can be interfaced with a block
2
diagram
3 Construct and explain central storage unit.
Utilize virtual memory and how it used efficiently in
4
Computer system
Identify the various types of semiconductor RAMs in
5
detail?
6 Analyse the DMA operation? State its advantages?
7 Inspect SCSI and USB in computer organization in brief ?