MIC3808/3809 Micrel

MIC3808/3809
Push-Pull PWM Controller

General Description Features

The MIC3808 and MIC3809 are a family of complementary • Dual output drive stages in push-pull configuration
output push-pull PWM control ICs that feature high speed and • Leading edge current-sense blanking
low power consumption. The MIC3808/9 are ideal for telecom • 130µA typical start-up current
level (36V to 75V) isolated step down dc/dc conversion • 1mA typical run current
applications where high output current, small size, and high • Operation to 1MHz
efficiency are required. • Internal soft start
The dual-ended push-pull architecture of the MIC3808/9 • On-chip error amplifier with 4MHz gain bandwidth
allows more efficient utilization of the transformer than single- product
ended topologies, allowing smaller size dc/dc solutions. • On-chip VDD clamping
Additionally, the out-of-phase push-pull topology allows a • Output drive stages capable of 500mA peak source
higher effective duty cycle, reducing input and output ripple current, 1A peak sink current
as well as stress on the external components. The dead-time Applications
between the two outputs is adjustable between 60ns to
• High efficiency “brick” power supply modules
200ns, limiting the duty cycle of each output stage to less than
• Half bridge converters
50%.
• Full bridge converters
The MIC3808/9 are built on a low-power, high-speed BiCMOS • Push-pull converters
process. The 130µA start-up current and 1mA run-current • Voltage-fed push-pull converters
reduce the size of the start-up circuitry and allow high • Telecom equipment and power supplies
efficiency even at light loads. The high-speed internal 4MHz • Networking power supplies
error amplifier allows MIC3808/9 operation up to 1MHz. • Industrial power supplies
The MIC3808 has a turn-on threshold of 12.5V whereas the • 42V automotive power supplies
MIC3809 has a lower turn-on threshold of 4.3V. Both devices • Base stations
are available in SOP-8 and MSOP-8 package options with an
operating range of –40°C to +85°C.
Data sheets and support documentation can be found on
Micrel’s web site at: www.micrel.com.

Typical Application
VOUT
12V 100W

VIN
36V to 75V

Start-Up
Circuitry

MIC3808
RC VDD
GND OUTA
COMP OUTB
FB CS

Slope
Comp
Reference
& Isolation

Micrel, Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2005 1 MIC3808/3809
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Ordering Information
Part Number
Turn On Turn Off
Standard Lead-Free Threshold Threshold Temperature Range Package
MIC3808BM MIC3808YM 12.5V 8.3V –40°C to +85°C 8-Pin SOIC
MIC3809BM MIC3809YM 4.3V 4.1V –40°C to +85°C 8-Pin SOIC
MIC3808BMM MIC3808YMM 12.5V 8.3V –40°C to +85°C 8-Pin MSOP
MIC3809BMM MIC3809YMM 4.3V 4.1V –40°C to +85°C 8-Pin MSOP

Pin Configuration

COMP 1 8 VDD
FB 2 7 OUTA

CS 3 6 OUTB
RC 4 5 GND

SOIC-8 (M)
MSOP-8 (MM)

Pin Description
Pin Number Pin Name Pin Function
1 COMP COMP is the output of the error amplifier and the input of the PWM com-
parator. The error amplifier in the MIC3808 is a true low-output impedance,
4MHz operational amplifier. As such, the COMP pin can both source and
sink current. However, the error amplifier is internally current limited, so that
zero duty cycle can be externally forced by pulling COMP to GND. The
MIC3808 family features built-in full cycle soft start. Soft start is imple-
mented as a clamp on the maximum COMP voltage.
2 FB The inverting input to the error amplifier. For best stability, keep FB lead
length as short as possible and FB stray capacitance as small as possible.
3 CS The input to the PWM, peak current, and overcurrent comparators. The
overcurrent comparator is only intended for fault sensing. Exceeding the
overcurrent threshold will cause a soft start cycle. An internal MOSFET
discharges the current sense filter capacitor to improve dynamic perfor-
mance of the power converter.
4 RC The oscillator programming pin. The MIC3808’s oscillator tracks VDD and
GND internally, so that variations in power supply rails minimally affect
frequency stability. Only two components are required to program the
oscillator, a resistor (tied to the VDD and RC), and a capacitor (tied to the RC
and GND). The approximate oscillator frequency is determined by the simple
1.41
formula: FOSCILLATOR =
RC
where frequency is in Hertz, resistance in Ohms, and capacitance in Farads.
The recommended range of timing resistors is between 7kΩ and 200kΩ and
range of timing capacitors is between 100pF and 1000pF. Timing resistors
less than 7kΩ should be avoided. For best performance, keep the timing
capacitor lead to GND as short as possible, the timing resistor lead from VDD
as short as possible, and the leads between timing components and RC as
short as possible. Separate ground and VDD traces to the external timing
network are encouraged.

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Pin Description
Pin Number Pin Name Pin Function
5 GND Ground
6 OUTB Alternating high current output stages. Both stages are capable of driving the
gate of a power MOSFET. Each stage is capable of 500mA peak source
7 OUTA current, and 1A peak sink current. The output stages switch at half the
oscillator frequency, in a push/pull configuration. When the voltage on the
RC pin is rising, one of the two outputs is high, but during fall time, both
outputs are off. This “dead time” between the two outputs, along with a
slower output rise time than fall time, insures that the two outputs can not be
on at the same time. This dead time is typically 60ns to 200ns and depends
upon the values of the timing capacitor and resistor. The high-current output
drivers consist of MOSFET output devices, which switch from VDD to GND.
Each output stage also provides a very low impedance to overshoot and
undershoot. This means that in many cases, external Schottky clamp diodes
are not required.
8 VDD The power input connection for this device. Although quiescent VDD current
is very low, total supply current will be higher, depending on OUTA and
OUTB current, and the programmed oscillator frequency. Total VDD current
is the sum of quiescent VDD current and the average OUT current. Knowing
the operating frequency and the MOSFET gate charge (Qg), average OUT
current can be calculated from IOUT = Qg × F, where F is frequency. To
prevent noise problems, bypass VDD to GND with a ceramic capacitor as
close to the chip as possible. A 1µF decoupling capacitor is recommended.

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Absolute Maximum Ratings (Note 1) Operating Ratings (Note 2)
Supply Voltage (IDD ≤ 10mA) ...................................... +15V VDD Input Voltage (VDD) ........................................ Note 11
Supply Current ........................................................... 20mA Oscillator Frequency (fOSC) ....................... 10kHz to 1MHz
OUTA/OUTB Source Current (peak) .......................... –0.5A Ambient Temperature (TA) ......................... –40°C to +85°C
OUTA/OUTB Sink Current (peak) ................................ 1.0A Package Thermal Resistance
Comp Pin ......................................................................VDD SOIC-8 (θJA) ...................................................... 160°C/W
Analog Inputs (FB, CS) ........................ –0.3V to VDD +0.3V MSOP-8 (θJA) .................................................... 206°C/W
NOT TO EXCEED 6V
Junction Temperature .............................. –55°C to +150°C
Storage Temperature ............................... –65°C to +150°C
Lead Temperature (soldering, 10 sec.) ................... +300°C
ESD Rating, Note 3 ...................................................... 2kV

Electrical Characteristics
TA = TJ = –40°C to +85°C, VDD = 10V (Note 9), 1µF capacitor from VDD to GND, R = 22KΩ, C = 330pF.
Parameter Condition Min Typ Max Units
Oscillator Section
Oscillator Frequency 180 200 220 kHz
Oscillator Amplitude/VDD Note 4 0.44 0.5 0.56 V/V
Error Amp Section
Input Voltage COMP = 2V 1.95 2 2.05 V
Input Bias Current –1 1 µA
Open Loop Voltage Gain (Guaranteed by design) 60 80 dB
COMP Sink Current FB = 2.2V, COMP = 1V 0.3 2.5 mA
COMP Source Current FB = 1.3V, COMP = 3V, Note 5 –0.15 –0.5 mA
COMP Clamp Voltage VFB = 0V 3.1 3.6 4.0 V
PWM Section
Maximum Duty Cycle Measured at OUTA or OUTB 48 49 50 %
Minimum Duty Cycle COMP = 0V 0 %
Current Sense Section
Gain Note 6 (Guaranteed by design) 1.9 2.2 2.5 V/V
Maximum Input Signal Note 7 0.45 0.5 0.55 V
CS to Output Delay COMP = 3V, CS from 0 to 600mV 70 200 ns
CS Source Current –200 nA
CS Sink Current CS = 0.5V, RC = 5.5V, Note 8 5 10 mA
Over Current Threshold 0.7 0.75 0.8 V
COMP to CS Offset CS = 0V 0.35 0.8 1.2 V
Output Section
OUT Low Level I = 100mA 0.5 1 V
OUT High Level I = –50mA, VDD - OUT 0.5 1 V
Rise Time CL = 1nF 25 60 ns
Fall Time CL = 1nF 25 60 ns

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Parameter Condition Min Typ Max Units

Undervoltage Lockout Section
Start Threshold MIC3808, Note 9 11.5 12.5 13.5 V
MIC3809 4.1 4.3 4.5 V
Minimum Operating Voltage MIC3808 7.6 8.3 9 V
After Start MIC3809 3.9 4.1 4.3 V
Hysteresis MIC3808 3.5 4.2 5.1 V
MIC3809 0.1 0.2 0.3 V
Soft Start Section
COMP Rise Time FB = 1.8V, Rise from 0.5V to 3V 2.5 20 ms
Overall Section
Startup Current VDD < Start Threshold 130 260 µA
Operating Supply Current FB = 0V, CS = 0V, Notes 9 and 10 1 2 mA
VDD Zener Shunt Voltage IDD = 10mA, Note 12 13 14 15 V

Note 1. Exceeding the absolute maximum rating may damage the device.
Note 2. The device is not guaranteed to function outside its operating rating.
Note 3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF.
Note 4. Measured at RC. Signal amplitude tracks VDD.
Note 5. The COMP pin is internally clamped to 3.65V(typ). The COMP pin source current is tested at VCOMP = 3.0V to avoid interfering with this clamp
voltage. The minimum source current increases as VCOMP approaches VCLAMP.

∆VCOMP
Note 6. Gain is defined by A = , 0 ≤ VCS ≤ 0.4V.
∆VCS
Note 7. Parameter measured at trip point of latch with FB at 0V.
Note 8. The internal current sink on the CS pin is designed to discharge an external filter capacitor. It is not intended to be a DC sink path.
Note 9. For MIC3808, set VDD above the start threshold before setting at 10V.
Note 10. Does not include current in the external oscillator network.
Note 11. Maximum operating voltage is equal to the VDD [zener] shunt voltage. When operating at or near the shunt voltage, care must be taken to limit
the VDD pin current to less than the 20mA VDD maximum supply current rating.
Note 12. Start threshold and Zener Shunt threshold track one another.

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Typical Characteristics

MIC3808 VDD MIC3809 VDD MIC3809 Oscillator Variation

vs. IDD vs. IDD vs. VDD
4.0 7 0.7
0.6
3.5 6 0.5
IDD CURRENT (mA)

3.0

OSCILLATOR (%)
5 0.4
2.5 0.3

IDD (mA)
4 0.2
2.0
0.1
3
1.5 0
1.0 2 -0.1
-0.2
0.5 1
-0.3
0 0 -0.4
0 5 10 15 0 2 4 6 8 10 12 14 16 0 2 4 6 8 10 12 14
VDD (V) VDD (V) VDD (V)

MIC3809 Oscillator
Frequency Variation Frequency RC Pin Capacitance
vs. Temperature vs. RC Values vs. Deadtime
3 200
VDD = 5V C = 100pF VDD = 10V
2 1M 175
C = 220pF
FREQUENCY (kHz)
FREQUENCY (%)

DEAD TIME (ns)

1 C = 270pF 150
C = 330pF
VDD = 10V C = 470pF
0 125
C = 680pF
100k
-1 100

-2 75
C = 1000pF
-3 10k 50
-40 -20 0 20 40 60 80 100120140

1000
0
100
200
300
400
500
600
700
800
900
0 50k 100k 150k 200k
TEMPERATURE (°C) RESISTANCE (kΩ)
CAPACITANCE (pF)

MIC3809 VREFERENCE MIC3808 V

RC Pin Resistance REFERENCE
vs. Deadtime vs. VDD vs. VDD
89 2.05 2.015
2.03 2.010
88 2.01 2.005
VREFERENCE (V)
DEADTIME (ns)

VREFERENCE (V)

1.99
87 2.000
1.97
1.995
86 1.95
1.990
1.93
85 1.91 1.985
1.89 1.980
84
1.87 1.975
83 1.85 1.970
4 6 8 10 12 14 16 18
20
40
60
80
0

8 9 10 11 12 13 14 15 16
100
120
140
160
180
200

VDD (V) VDD (V)

RESISTANCE (kΩ)

MIC3808 Current Limit MIC3809 Current Limit Error Amplifier Reference

Threshold vs. VDD Threshold vs. VDD Voltage vs. Temperature
0.505 2.02
0.501 2.02
0.503
0.499 2.01
VTHRESHOLD (V)

VREFERENCE (V)

2.01
VTHRESHOLD (V)

0.501
0.497 2.00
0.499 2.00
0.495
1.99
0.493 0.497
1.99
0.495 1.98
0.491
1.98
0.489 0.493 1.97
8 9 10 11 12 13 14 15 16 4 6 8 10 12 14 16 -40 -20 0 20 40 60 80 100120140
VDD (V) VDD (V) TEMPERATURE (°C)

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VDD Supply Current Error Ampifier

vs. Temperature
3 120 180
100 160
2
80 140

MAGNITUDE (dB)
VDD = 10V
1 120

PHASE (°)
60
IDD (mA)

Magnitude 100
0 40
80
20
-1 60
0 Phase 40
-2
-20 20
-3 -40 0
-40 -20 0 20 40 60 80 100120140 1 10 100 1k 10k 100K 1M 10M
TEMPERATURE (°C)
FREQUENCY (Hz)

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Functional Diagram

FB COMP CS
2 1 3
8
VDD
3.65V
Overcurrent Peak Current
Comparator Comparator 14V
0.75V
2.0V 0.5V
2.2V Error
Amplifier 7
OUTA
VDD OK Oscillator

S
0.8V
Q
PWM PWM
R Latch
Comparator
1.2R
Q
VDD —1V S
S1 T
Q
S2 Q /Q
R
R

0.5V VDD

R
6
Soft Start OUTB

Voltage
Reference
Slope = 1V/ms

5
GND

4
RC

Figure 1. MIC3808 Block Diagram

Functional Description error amplifier at the COMP pin. As the softstart voltage rises,
it allows the COMP pin voltage to rise, which in turn allows the
The MIC3808/9 is a high-speed power supply controller with
duty cycle of the output drivers to increase. The internal
push-pull output drive capability. MIC3808 has a higher VDD
softstart voltage is discharged and remains discharged dur-
turn-on threshold and more hysteresis between VDD turn-on
ing the following conditions:
and turn-off than the MIC3809. The outputs of the controller
operate in a push-pull fashion with a guaranteed dead time 1. The VDD voltage drops below the turn-off
between them. A block diagram of the MIC3808/9 controller threshold
is shown in Figure 1. 2. The voltage on the CS pin exceeds the
VDD and Turn-on Sequence overcurrent comparator threshold
The oscillator and output gate drive signals are disabled Once the internal softstart discharge FET is turned on, it
when VDD is lower than the turn on threshold. Circuitry in the cannot be turned off until the internal softstart voltage drops
output drivers eliminates glitching or random pulsing during down below 0.5V. This insures a clean restart.
the start-up sequence. The oscillator is enabled when VDD is Oscillator
applied and reaches the turn-on threshold. The VDD com- The oscillator operates at twice the switching frequency of
parator also turns off the internal soft-start discharge FET, either OUTA or OUTB. The oscillator generates a sawtooth
slowly bringing up the COMP pin voltage. waveform on the RC pin. The rising edge of the waveform is
The VDD pin is internally clamped. As VDD approaches this controlled by the external resistor/capacitor combination.
clamp voltage, the VDD current will increase over the normal The fall time is set by the on-resistance of the discharge FET
current draw of the IC. Exceeding the VDD zener shunt (see Figure 2). The fall time sets the delay (dead time)
voltage may cause excessive power dissipation in the between the turn-off of one output driver and the turn-on of the
MIC3808/9. other driver. A toggle flip-flop insures that drive signals to
Soft-Start OUTA and OUTB are alternated and therefore insures a
maximum duty cycle of less than 50% for each output driver.
The soft start feature helps reduce surge currents at the
Graphs of component values vs. oscillator frequency and
power supply input source. An internal current source and
dead time are shown in the typical characteristic section of
capacitor ramp up from 0V to near Vdd at a typical rate of
this specification.
1V/ms. The softstart feature limits the output voltage of the

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VDD A pulse-by-pulse current limit occurs when the inductor
current signal at the CS pin exceeds the peak current limit
4
threshold. The on-time is terminated for the remainder of the
RC switching cycle, regardless of whether OUTA or OUTB is
active.
VDD
2 If the signal at the CS pin goes past the peak threshold and
S exceeds the overcurrent limit threshold, the overcurrent limit
Q
OSCILLATOR
comparator forces the soft start node to discharge and
R OUTPUT initiates a soft start reset.
0.2V
An internal FET discharges the CS pin at the end of the
Figure 2. Oscillator oscillator charge time. The FET turns on when the voltage on
the RC pin reaches the upper threshold (VDD/2) and remains
The voltage source to the resistor/capacitor timing compo- on for the duration of the RC pin discharge time and for
nents is VDD. The internal turn-off comparator threshold in the typically 100ns after the start of the next on-time period. The
oscillator circuit is VDD/2. This allows the oscillator to track 100ns period at the beginning of the on-time implements a
changes in VDD and minimize frequency variations in the front edge blanking feature that prevents false triggering of
oscillator. The oscillator frequency can be roughly approxi- the PWM comparator due to noise spikes on the leading edge
mated using the following formula: of the current turn-on signal. The front edge blanking also
F_oscillator = 1.41/R*C sets the minimum on-time for OUTA and OUTB. The timing
Where: frequency is in Hz diagram for the CS pin is shown in Figure 3.
Max ON time
Resistance is in Ohms dead time

Capacitance is in Farads.
RC Pin
Graphs of oscillator frequency and dead time vs component
values are shown in the Typical Characteristic section of this
specification. The recommended range of timing resistors
Oscillator
and capacitors is 10kΩ to 200kΩ and 100pF to 1000pF. To Reset
minimize oscillator noise and insure a stable waveform the dead time
following layout rules should be followed: Front edge blanking

1. The higher impedance of capacitor values less

CS Pin
than 100pF may causes the oscillator circuit to
become more susceptible to noise. Parasitic pin Minimum ON time
and etch trace capacitances become a larger
part of the total RC capacitance and may OUTA
influence the desired switching frequency.
2. The circuit board etch between the timing
resistor, capacitor, RC pin and ground must be
kept as short as possible to minimize noise OUTB
pickup and insure a stable oscillator waveform.
3. The ground lead of the capacitor must be routed Figure 3. Timing Diagram
close to the ground lead of the MIC3808/9.
Error Amplifier
Current Sensing and Overcurrent Protection
The error amplifier is part of the voltage control loop of the
The CS pin features are: power supply. The FB pin is the inverting input to the error
1. Peak current limit amplifier. The non-inverting input is internally connected to a
2. Overcurrent limit reference voltage. The output of the error amplifier, COMP,
is connected to the PWM comparator. A voltage divider
3. Internal current sense discharge
between the error amplifier output (COMP pin) and the PWM
4. Front edge blanking comparator allows the error amplifier to operate in a linear
In current mode control, a PWM comparator uses the inductor region for better transient response. The output of the error
current signal and the error amplifier signal to determine the amplifier (COMP pin) is limited to typically 3.65V to prevent
operating duty cycle. In the MIC3808/9 the signal at the CS the COMP pin from rising up too high during startup or during
pin is level shifted up before it reaches the PWM comparator a transient condition. This feature improves the transient
as shown in Figure 1. This allows operation of the error response of the power supply.
amplifier and PWM comparator in a linear region.
There are two current limit thresholds in the MIC3808/9; peak
current limit and overcurrent limit. The normal operating
voltage at the CS pin is designed less than these thresholds.

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Output Drivers should be grouped together. The return signals for the
OUTA and OUTB are alternating output stages, which switch gate drives should be grouped together and a common
at half the oscillator frequency. A toggle flip-flop in the connection made at the ground pin of the controller. The
MIC3808/9 guarantee both outputs will not be on at the same low level signals and their returns must be kept separate
time. The RC discharge time is the dead time, where both from the high current and high voltage power section of
outputs are off. This provides an adjustable non-overlap time the power supply.
to prevent shoot through currents and transformer saturation • Avoid running sensitive traces, such as the current
in the power supply. sense and voltage feedback signals next to or under
power components, such as the switching FETs and
The output drivers are inhibited when VDD is below the
transformer.
undervoltage threshold. Internal circuitry prevents the output
• If a current sense resistor is used, it’s ground end must
drivers from glitching high when VDD is first applied to the
be located very close to the ground pin of the MIC3808/
MIC3808/9 controller.
9 controller. Careful PCB layout is necessary to keep
Decoupling and PCB Layout the high current levels in the current sense resistor from
PCB layout is critical to achieve reliable, stable and efficient running over the low level signals in the controller.
operation. A ground plane is required to control EMI and • A minimum 1µf bypass capacitor must be connected
minimize the inductance in power, signal and return paths. directly between the VDD and GND pins of the MIC3808/
The following guidelines should be followed to insure proper 9. An additional 0.1uf capacitor between the VDD end
operation of the circuit: oscillator frequency setting resistor and the ground end
• Low level signal and power grounds should be kept of the oscillator capacitor may be necessary if the
separate and connected at only one location, preferably resistor is a distance away from the main 1µF bypass
the ground pin of the control IC. The ground signals for capacitor
the current sense, voltage feedback and oscillator

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MIC3808/3809 Micrel
Package Information

0.026 (0.65)
MAX) PIN 1

0.157 (3.99) DIMENSIONS:

0.150 (3.81) INCHES (MM)

0.020 (0.51)
0.013 (0.33)
0.050 (1.27)
TYP 0.0098 (0.249) 45°
0.010 (0.25)
0.0040 (0.102) 0.007 (0.18)

0.197 (5.0) 0°–8° 0.050 (1.27)

0.064 (1.63) 0.189 (4.8) SEATING 0.016 (0.40)
0.045 (1.14) PLANE
0.244 (6.20)
0.228 (5.79)

8-Pin SOIC (M)

0.122 (3.10) 0.199 (5.05) DIMENSIONS:

0.112 (2.84) 0.187 (4.74) INCH (MM)

0.120 (3.05)
0.116 (2.95)
0.036 (0.90) 0.043 (1.09)
0.032 (0.81) 0.038 (0.97) 0.007 (0.18)
0.012 (0.30) R 0.005 (0.13)

0.012 (0.3) 0.008 (0.20) 5° MAX 0.012 (0.03) R

0.004 (0.10) 0° MIN
0.0256 (0.65) TYP 0.039 (0.99)
0.035 (0.89)
0.021 (0.53)

8-Pin MSOP (MM)

MICREL, INC. 2180 FORTUNE DRIVE SAN JOSE, CA 95131 USA

TEL + 1 (408) 944-0800 FAX + 1 (408) 944-0970 WEB http://www.micrel.com
The information furnished by Micrel in this datasheet is believed to be accurate and reliable. However, no responsibility is assumed by Micrel for its use.
Micrel reserves the right to change circuitry and specifications at any time without notification to the customer.

Micrel Products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction of a product can
reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a) are intended for surgical implant into
the body or (b) support or sustain life, and whose failure to perform can be reasonably expected to result in a significant injury to the user. A Purchaser’s
use or sale of Micrel Products for use in life support appliances, devices or systems is at Purchaser’s own risk and Purchaser agrees to fully indemnify
Micrel for any damages resulting from such use or sale.
© 2005 Micrel, Incorporated.

April 2005 11 MIC3808/3809