001. A task can also be sent by..and it runs after the.

D
A FLISR,FLIST B SLISR,SLIST
C IST,SLISR D FLISR,IST
002. The 8051 microcontroller permits the use of ..byte instruction for jump to the ISR B
A 4 B 8
C 2 D 1
003. Which Software interrupt instruction will generate type0 interrupt B
A INT 1 B INT 0
C INT 2 D INT 3
004. Which instruction is used in ARM for jump to the routine A
A ISR-VECTADDR B IST-VECTADDR
C ISR-VECT D CALL
005. The ARM permits the use of ..byte instruction for jump to the ISR C
A 8 B 2
C 4 D 1
006. FLISR is A
A Short Execution time, device B Short Execution time, device
dependent code independent code
C Long Execution time, device D Long Execution time, device
dependent code dependent code
007. Divided by zero is which type of interrupt in trap related sources.. D
A Type 3 B Type 2
C Type 1 D Type 0
008. The software instruction for interrupting and then diverting to ISR is also called as.. B
A Traffic handler B Signal handler
C Path handler D Interrupt handler
009. Which of the following is ODD one compared to others D
A Signal B Trap
C Exception D Polling
010. Which register bit is set by write cycle B
A Status B IPR
C FLAG D PARITY
011. Which register bit is set by interrupting source hardware.. A
A IPR B Status
C ISR D FLAG
012. Which of the following uses interrupt vector addresses for priority. D
A 8086 B ARM9
C ARM 7 D 8051
013. Which Software interrupt instruction will generate type 2 interrupt C
A INT 0 B INT 1
C INT 2 D INT 5
014. Divide by zero is which classification of interrupt. B
A Maskable interrupt B Non-Maskable interrupt
C Non-Masked interrupt when defined D Vectored interrupt
015. Which of the following having Non-Masked interrupt only when defined interrupt service C
facility
A 8051 B 8086
C 6811 D 8088
016. Which instruction is used in 8051 for jump to the routine D
A ISR-VECTADDR B IST-VECTADDR
C ISR-VECT D CALL
017. JTAG means . A
A Joint test action group B Joint telecom agency
C Junior test activity guide D Joint test activity group
018. BST was originally developed by A
A JTAG B JETAG
C IEEE D ANSI
019. In CPU structure, which register provides the address for fetching of data or instruction D
especially by means of processor?
A Data Register B Instruction Register
C Accumulator D Memory Address Register
020. Which kind of low-order 16 bits control register is also regarded as Machine Status A
Word (MSW) in order to make it compatible with i286?
A CR0 B CR1
C CR2 D CR3
021. In x86 architecture, which type of gate acts as an intermediary between code segments A
at different privilege levels (PLs)
A Call gates B Task gates
C Interrupt gates D Trap gates
022. In Pentium processor, which write buffer is used by the pipeline ALUs in order to write D
the result to the memory?
A External Snoop Write Buffer B Internal Snoop Write Buffer
C Line Replacement Write Buffer D Write-back Buffer
023. Which type of non-privileged processor mode is entered due to raising of high priority B
of an interrupt?
A User mode B Fast Interrupt Mode (FIQ)
C Interrupt Mode (IRQ) D Supervisor Mode (SVC)
024. Abort mode generally enters when A
A an attempt access memory fails B low priority interrupt is raised
C ARM processor is on rest D undefined instructions are to be
handled
025. Which interrupt pin in 6811 gives Non-Masked interrupt when defined facility. D
A INT B NMI
C XIRQ D HOLD
026. The Serial Interrupt is enabled by which of these bits ? C
A ET B EX
C ES D EA
027. Which of the following is the correct order of priority in decreasing order from left to B
right?
A EX0 , EX1 , ET0 , ET1 ,ES B EX0 , ET0 , EX1 , ET1 ,ES
C ES , EX1 , ET0 , E01 , ET1 D ET0 , EX0 , ET1 , EX1 ,ES
028. A _____ combines separately compiled and assembly modules into an executable C
image.
A cross-compiler B cross-assembler
C linker/loader D re-compiler
029. Which of the following runs on one type of processor architecture but produces object B
code for a different type of processor architecture
A Linker/loader B Cross-compiler
C Debugger D Re-compiler
030. Which of the following is used to keep the information of linking and locating process C
A List files B Hex files
C Map files D Proc files
031. Which of the following is an ASCII text file? B
A List files B Hex files
C Map files D Proc files
032. A _____ understands the same C language as a native compiler. B
A cross-compiler B cross-assembler
C linker/loader D re-compiler
033. A _____ understands as assembly language that is specific to your target B
microprocessor.
A cross-compiler B cross-assembler
C linker/loader D d.re-compiler
034. In the branch instructions of ARM, what does the mnemonic BVC imply? D
A Overflow Set B Carry Set
C Carry Clear D Overflow Clear
035. In Cortex-A processor series, which among the following is the standalone and A
smallest processor in size constraints with high-end application support
A Cortex-A5 B Cortex-A9
C Cortex-A53 D Cortex-A59
036. The embedded firmware is written in ---- language A
A C, C++ B MASM
C TASM D SQL
037. A ____ RTOS will stop a lower-priority task as soon as the higher-priority task A
unblocks.
A preemptive B non preemptive
C interpret D exception
038. A_____ RTOS will only take the microprocessor away from the lower-priority task when B
that task blocks.
A preemptive B non preemptive
C interpret D exception
039. In a time sharing operating system, when the time slot given to a process is completed B
, the process goes from the RUNNING state of the
A BLOCKED state B READY state
C SUSPENDED state D TERMINATE state
040. A function that works properly even if it is called by more than one task is called a ____ C
function.
A mutex B task
C reentrant D semaphore
041. The basic building block of software written under an RTOS is the B
A scheduler B task
C context D reentrancy
042. Under most RTOS a task is simply a _____. B
A routine B subroutine
C interrupt D exception
043. Which of the following is lowest level format for any platform C
A List files B Hex files
C Map files D Proc files
044. The process of converting machine codes into assembly code is known as___ B
A Cross-compiler B Dissembler
C Simulator D Emulator
045. The complementary to assembling is _______ B
A Cross-compiler B Disasembler
C Simulator D Emulator
046. Which of the following possesses threads of execution? A
A Process B Thread
C Kernel D Operating system
047. Which of the following is inherited from the parent task? C
A Task B Process
C Thread D Kernel
048. Which can be considered as the lower level in the multitasking operating system? C
A Process B Task
C Threads D Multi threads
049. Which of the following works by dividing the processors time B
A Single task operating system B Multitask operating system
C Kernel D Applications
050. Which of following does not uses a shared memory? A
A Process B Thread
C Task D Kernel
051. Which of the following can own and control the resources? B
A Thread B Task
C System D Peripheral
052. Which one the following can be used to refer to entities within the RTOS A
A Threads B Kernels
C System D Applications
053. Which of the following defines the set of instructions loaded into the memory B
A Process B Task
C Thread D System hardware
054. Which of the following uses its own address space? A
A Thread B Process
C Task D Kernel
055. Which of the following stores all the task information that the system requires? D
A Task access block B Task compiler block
C Task carry block D Task control block
056. Which of the following contains all the task and their status? B
A Register B Ready list
C Access list D Task list
057. Which of the following control the memory usage? D
A Operating system B Application
C Hardware D Kernel
058. Which of the following can carry information and control task? B
A Semaphore B Messages
C Flags D Address message
059. Which of the following provides time period for the context switch? C
A Timer B Counter
C Time slice D Time machine
060. Which of the following can periodically trigger the context switch? B
A Software interrupt B Hardware interrupt
C Peripheral D Memory
061. Which of the following decides which task can have the next time slot? C
A Single task operating system B Applications
C Kernel D Software
062. Which one of the following controls the time slicing mechanism in a multitasking C
operating system
A Kernel B Single tasking kernel
C Multitasking kernel D Application manager
063. A thread is a ________ entity B
A Heavyweight B Process-control
C Kernel-controlled D Variable level
064. A Mutex is a special _______ B
A Count semaphore B Binary Semaphore
C Task semaphore D Time semaphore
065. ________ is a hardware signal that informs the CPU that an important event has D
occurred
A Event B Signal
C Process D Interrupt
066. When interrupt occurs, CPU saves its context and jumps to the ___ A
 A ISR B API
C IP D ASIP
067. Which of the following is level control entity? D
A Task B Process
C Thread D Kernel
068. Which of the following can be considered as daughter process C
A Task B Process
C Thread D Kernel
069. Which of the following is a light weight entity? C
A Task B Process
C Thread D Kernel
070. _____________ is considered as heavyweight entity? B
A Task B Process
C Thread D Kernel
071. Mutex stands for ___ B
A Mutual text B Mutual exclusion
C Mutual task D Mutual timer
072. When two or more tasks wait for a resource being held by another task _____ occurs A
A Deadlock B Semaphore
C Starvation D Mutex
073. Mutual exclusion problems occurs between B
A Two disjoint process that do not B Process that share resources
interact
C Process that do not use the same D Process that share threads
resource
074. Processes that share the same address space are often called ___ D
A Task B Process
C Thread D Kernel
075. Time required for CPU to return to the interrupted code/highest priority task is called B
A Interrupt response time B Interrupt recovery time
C Interrupt latency D Interrupt handler
076. A task owning a mutex, can not be ______ D
A Added B Modified
C Released D Deleted
077. Binary semaphore is also known as B
A General semaphore B Mutex
C Cluster D Spooling
078. Time between receipt of interrupt signal and starting the code that handles the interrupt A
is called _______
A Interrupt response time B Interrupt recovery time
C Interrupt latency D Interrupt handler
079. The dynamic memory allocated using malloc() functions should be released using ____ A
A Free() B Calloc()
C Ptr() D Alloc()
080. The free memory lying in between stack and static memory area, which is used for D
dynamic memory allocation______
A Static memory B Dynamic memory
C Heap memory D Stack memory
081. The C pre-processor for creating portable inline code is ____ A
A Macro B Const
C Linker D Library
082. The piece of software that acts as bridge between the operating system and the B
hardware is ______
A USB B Device drivers
 C Kernel D Task control drivers
083. The task can communicate with ____ only through the global variable C
A Thread B Process
C Interrupt service routine D Interrupt enable
084. Conventional procedural based firmware design is also known as ___ A
A Super loop model B Super firmware model
C Super conventional model D Super procedure model
085. The period of time for which a process is allowed to run in a preemptive multitasking A
system is generally called as
A Time-slicing B Encapsulation
C Priority D Routines
086. The essential feature of multitasking operating system is _____ A
A Context switch B Multithread OS
C Switch D Procedure
087. The architecture which implements multiple functional units in the datapath is known as C
_______
A Finite state machine datapath B Complex instruction set computing
C Very long instruction word D Parallel processing
088. Which of the following architectures implements multiple concurrent processing D
elements
A Finite state machine datapath B Complex instruction set computing
C Very long instruction word D Parallel processing
089. Which model is best suited for implementing a digital signal processing embedded B
system
A Finite state machine B Data flow graph
C Object oriented model D UML
090. Which architecture implements the finite state machine model using a state register A
and two combinational circuits?
A Controller architecture B CISC architecture
C Datapath architecture D CISC architecture
091. The finite state state machine model is implemented with ____ A
A Controller architecture B Datapath architecture
C Finite state machine data path D Complex instruction set computing
architecture architecture
092. The architecture which combines the controller architecture with datapath architecture A
is known as ____ architecture
A Finite state machine datapath B Complex instruction set computing
C Very long instruction word D Parallel processing
093. The memory area which holds the program code corresponding to the core OS B
applications/services is known as ___
A User space B Kernel space
C Shared memory D Memory unit
094. When a process makes a system call, its mode change from ______ A
A User to kernel B Kernel to user
C Restricted to process D Unrestricted to restricted
095. Which model is best suited for modeling a reactive real time embedded system? D
A Finite state machine B Data flow graph
C Control data flow graph D Hierarchical/concurrent finite state
machine model
096. The Debugging Tool that can set breakpoint to stop software execution. A
A BDM B JTAG
C ICM D Dumper
097. JTAG refers to. C
A Joint territory addressed group B Joint Tag addressed Group
 C Joint Test Action Group D Joint Tag Action Group
098. The Debugging Tool that offers scalable debug function depending on level of B
compliance hardware
A JTAG B IEEE-ISTO
C Dumps D ROM emulator
099. Which of the following is a hardware description language? C
A C B System C
C VHDL D C++
100. Which of the following is not a trade-off in hardware software partitioning? D
A Processing speed B Memory requirement
C Cost D Recovery
101. Which model is best suited for modeling a reactive embedded system? A
A State machine model B Data flow graph
C Control dataflow graph D Communicating process model
102. The architecture in which the processing elements execute different instructions at a B
given point of time is ________
A Single instruction multiple data B Multiple instruction multiple data
C Multiple instruction single data D Single instruction single data
103. Which of the following tool causes missed deadlines in real time systems B
A Profiler B Print statement
C BDM D OCD
104. EPROM stands for _________ D
A Electrically programmable read only B Electrically programmable random
memory access memory
C Erasable programmable random D Erasable programmable read only
access memory memory
105. The disadvantage of simulator is _____ C
A testing assembly-language code B resolving probability issues
C shared-data bugs D determine response and through put
106. A common feature of in-circuit emulator is D
A shared memory B virtual memory
C secondary memory D overlay memory
107. Monitor Debugging Tool is faster thanTool B
A ICM B Print statement
C BDM D OCD
108. Which of the following Tool is similar to Debugger tool A
A Monitor B Profiler
C Logic analyzer D Counters
109. Which of the following one measures both voltage and resistance D
A Voltmeter B Ohmmeter
C Oscilloscope D Multimeter
110. Timing history will be collected by.Debugging Tool. D
A ICM B BDM
C OCD D Profiler
111. Which of the following exactly behaves like a real microcontroller chip D
A Cross-compiler B Simulator
C De compiler D Emulator
112. The combination of hardware and software is known as_______ D
A Cross-compiler B Simulator
C De compiler D Emulator
113. Which of the following monitors the bus signals and checking the status line of the A
target hardware
A Hardware debugging B Software debugging
C Firmware debugging D Visual debugging
114. Which of the following allows a programmer to stop a program at any point and B
examine and change the values of the variables.
A Cross-compiler B Debugger
C De compiler D Emulator
115. The program that converts translating machine codes into corresponding high level C
language instructions.
A Cross-compiler B Simulator
C De compiler D Emulator
116. Which of the following performs the reverse operation to compiler C
A Cross-compiler B Simulator
C De compiler D Emulator
117. ICE stands for A
A In-Circuit Emulator B In-Circuit Entrance
C In-Circuit Extractor D In-Circuit Enabled
118. A ______ mechanism is used to get your software into your target for debugging D
purposes.
A shared memory B virtual memory
C secondary memory D overlay memory
119. The system which is used before locating and burning codes in the target board A
A Host system B Target system
C Linking system D Locator system
120. The system which has ROMBIOS hardware is _________ A
A Host system B Target system
C Linking system D Locator system
121. The system which has high performance processor with caches is _____ A
A Host system B Target system
C Linking system D Locator system
122. The system which has very large memory on disk is _________ A
A Host system B Target system
C Linking system D Locator system
123. A software program that convert source code in high level language into low level B
language
A Interpreter B Compiler
C Dissembler D Assembler
124. A software program that converts source code in assembly language into machine D
language
A Interpreter B Compiler
C Dissembler D Assembler
125. A computer program that is used to test and debug other programs B
A Cross-compiler B Debugger
C De compiler D Emulator
126. Which of the following translates expression by expression to machine executable A
codes
A Interpreter B Compiler
C Dissembler D Assembler
127. ________ is a part of OS that places the codes into the memory after reading the .exe B
file
A Linker B Loader
C Locator D Simulator
128. The program that reallocates the linked file and creates a file for permanent location of C
codes in a standard format
A Linker B Loader
C Locator D Simulator
129. Locator program output is in ____________ format B
 A List files B Hex files
C Map files D Proc files
130. Linker address are for _________ processor A
A Host system B Target system
C Linking system D Locator system
131. An exemplary target system is a board that has an _____________ A
A ARM Microcontroller B Microprocessor
C 8051 microcontroller D PIC microcontroller
132. The program that performs the task of reallocating the codes after finding the physical B
memory addresses available at a given instant
A Linker B Loader
C Locator D Simulator
133. The system which has ROM memory for ROM image of the embedded software is ___ B
A Host system B Target system
C Linking system D Locator system
134. Which of the following systems interfaces with the computer as well works as a B
standalone system
A Host system B Target system
C Linking system D Locator system
135. The binary executable file created form the source code B
A List files B Hex files
C Map files D Preprocessor files
136. The visual inspection hardware debugging tool is ______ A
A Magnifying glass B Multimeter
C Digital CRO D Logic Analyzer
137. The primary debugging tool for physical contact based hardware debugging is _______ B
A Magnifying glass B Multimeter
C Digital CRO D Logic Analyzer
138. The tool which are used ot analyzing interference noise in power lines and other signal C
lines is _______
A Magnifying glass B Multimeter
C Digital CRO D Logic Analyzer
139. The file that is used for verifying the macros D
A List files B Hex files
C Map files D Preprocessor files
140. The file that contains information about link/locate process is ______ C
A List files B Hex files
C Map files D Preprocessor files
141. Locator address are for __________processor B
A Host system B Target system
C Linking system D Locator system
142. ROMBIOS stands for __ A
A Read only memory basic input output B Read only memory basic interface
system operating system
C Read only memory bounded input D Read only memory bounded interface
output system operating system
143. Processor independent Debugging Tool is. C
A ICE B BDM
C Logic analyzer D ROM emulator
144. The debugging tool that can capture, store data and track multiple signals and can B
graph them is...
A Oscilloscope B Logic analyzer
C Dumper D OCD
145. Which of the following used to translate all of the source code to target code B
 A Interpreters B Compiler
C Preprocessor D Linkers
146. The development Environment is typically made up of C
A Target B Target, Host
C Target ,Host, Medium D Host, Medium
147. A device that replaces the ROM in the target system is ____ D
A PROM B ROM emulators
C In-circuit emulator D Flash
148. Cross Compiler means.. A
A Compilers located on Host machines B Compilers located on target machines
C Generate code for compiler platforms D Generates source language
149. The hardware debugging tool which is used to capture digital data from digital circuitry D
is _________
A Magnifying glass B Multimeter
C Digital CRO D Logic Analyzer
150. Which tools can be used to track down and correct bugs in the system C
A Utility tools B Translation tools
C Debugging tools D Networking tools
151. Key development tools in embedded design cant be located on .. B
A Host B transmission medium
C Target D Exit Standalone
152. Which tools are used to burn EPROMs A
A Utility tools B Translation tools
C Debugging tools D Networking tools
153. Which tools manage the Software files A
A Utility tools B Translation tools
C Debugging tools D Networking tools
154. Translation Tool doesnt includes C
A Preprocessors B Interpreters
C Editors D Linkers
155. VCS stands for. A
A Version Control Software B Vulnerable coded software
C Variable coded software D Version coded software
156. Which tools convert code a developer intends for the target into a form the target can B
execute.
A Utility tools B Translation tools
C Debugging tools D Networking tools
157. Example for Source language. D
A Machine code B Java byte code
C Object file code D Assembly
158. The debugging tool that replaces the microprocessor in system is.. B
A BDM B ICE
C OCD D Dumps
159. SPICE Abbreviated as A
A Simulation Program with Integrated B Synthesis Program with Integrated
Circuit Emphasis Circuit Environment
C Static Pointer with Integrated Circuit D Static Pointer with Information and
Emphasis Computer Emphasis
160. Executable binary file created by.. D
A Compiler B Interpreter
C Editors D Linkers
161. Which of the following tool is similar to BDM, but not proprietary to specific D
architecture..
A Logic analyzer B IEEE-ISTO Nexus 5001
 C Dumps D JTAG
162. Which of the following debugging tool doesnt support on-chip ROM, custom ASIC D
A ICE B Logic analyzer
C OCD D ROM emulator
163. Which of the following role is to organize and restructure the source code . C
A Interpreters B Compiler
C Preprocessor D Linkers
164. Which of the following are under Translation tools. B
A Editors B Bug corrector
C VCS D ROM burners
165. PSPICE is the B
A Program version of SPICE B PC version of SPICE
C Processor version of SPICE D Platform for SPICE
166. Which of the following is General Target Languages A
A Java byte code B C
C Java D Basics