Writeup DC
Writeup DC
AIM: Study of BPSK transmitter & receiver using suitable hardware setup/kit.
APPARATUS:
60 MHz
2. DSO
1GS/s
3. Probes
4. Power cord,
5. Connecting wires.
THEORY:-
BP
FILTER
SQU. %2 N/W
2F
MULT. CCT.
O/P
I/P
I/P O/P
OR
O/P
START
SIGNAL
PHASE
FILTER COMP.
COMP.
I/P1
PATTERN P!
GEN. I/P2
POWER ON
OBSERVATIONS:
1. Information Signal
2. Carrier
3. BPSK signal
4. ÷ 2 N/W output
5. Recovered output
REFERENCES:
1. Taub, Schilling and Saha, “Principles of Communication Systems”, McGraw-Hill, 4th
Edition,
2. Simon Haykin, ―Digital Communication Systems‖, John Wiley & Sons, Fourth Edition.
3. Simon Haykin, “Communication Systems”, John Wiley & Sons, 4th Edition
QUESTIONS:
Q NO Question BT CO
3.
What is the amount of phase shift in BPSK system?
CONCULUSION:
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ARMY INSTITUTE OF TECHNOLOGY, PUNE
Department of Electronics & Telecommunication Engineering
Subject: Digital Communication Lab
Experiment No: ____ Title: Study of BFSK transmitter & receiver
Class: T.E. Year: 2024-25 Semester: I
Roll No. :________ Name:______________________
Date of performance: Date of Submission: Sign Faculty:
TITLE: Study of BFSK transmitter & receiver using suitable hardware setup/kit.
OBJECTIVES:
a) Generate and detect Frequency Shift Keyed signal.
b) Find the bandwidth using PSD of FSK.
PRE-LAB REQUISITES:
a) Student should have basic knowledge of signals and system.
b) Student must have knowledge of various data formats.
c) Student must have prior knowledge about filters.
d) Student must be familiar with using DSO.
APPARATUS:
60 MHz
2. DSO
1GS/s
3. Probes
4. Power cord
5. Connecting wires
THEORY:
In computer peripheral & radio (wireless) communications, the binary data or code
is transmitted by means of a carrier frequency that is shifted between tow preset
frequencies. Since a carrier frequency is shifted between two preset frequencies,
the data transmission is said to use a frequency shift keying technique.
The frequency shift is usually accomplished by driving a VCO with the binary
data signal so that the two resulting frequencies correspond to the logic “0” & logic
“1” states of the binary data signal. The frequencies corresponding to logic “1” &
logic “0” states are commonly called as the mark & space frequencies. Several
standards are used to set the mark & space frequencies. For example, when
transmitting teletypewriter information using MODEM system a 1070HZ –1270HZ
(mark -space) pair represents the originate signal, while 2025HZ-2225HZ (mark -
space) pair represents the answer signal.
In our kit we have used XR2206 IC for FSK Generation. Mark & space
frequencies can be independently adjusted by the choice of timing resistors. In our
kit mark frequency is fixed & space frequency can be adjusted using pot provided
on panel. Detail circuit diagram is also provided. Baud rate of our system is 330HZ.
At receiver our aim is to distinguish two frequencies. For this purpose,
XR2211, a monolithic phase-locked Loop IC is used. The circuit consists of a basic
PLL for tracking and I/p signal within the pass-band, a quadrature phase detector
which provides carrier detection & a FSK Voltage comparator which provides FSK
demodulation.
FSK MODEM
Vcc
FSK O/P
XR - 2211
XR - 2206 O/P
Vcc
I/P
PATTERN
GEN.
GND.
POWER ON
4. FSK signal
6. Recovered output
Bandwidth of FSK=4fb
REFERENCES:
1. Taub, Schilling and Saha, “Principles of Communication Systems”, McGraw-Hill, 4th
Edition,
2. Simon Haykin, ―Digital Communication Systems‖, John Wiley & Sons, Fourth Edition.
3. Simon Haykin, “Communication Systems”, John Wiley & Sons, 4th Edition
QUESTIONS:
Q NO Questio BT C
n O
1. What is the Euclidean distance and minimum BW for BFSK?
2. What are the disadvantages of FSK?
CONCULUSION:
____________________________________________________________________________________
____________________________________________________________________________________
____________________________________________________________________________________
____________________________________________________________________________________
____________________________________________________________________________________
ARMY INSTITUTE OF TECHNOLOGY, PUNE
Department of Electronics & Telecommunication Engineering
Subject: Digital Communication Lab
AIM: Study of DSSS transmitter and receiver using suitable hardware setup/kit.
60 MHz
2. DSO
1GS/s
3. Probes
4. Power cord,
5. Connecting wires.
THEORY :-
Connection Diagram
Points For Observation Only
BP FILTER
CIRCUIT DIV.
8 BIT
PN SEQ.
I/P
GEN.
O/P
CLOCK
I/P1
CARRIER
PSK
P1 REC.
PSK
PATTERN GEN.
or I/P2
GEN. I/P
P2
LPF &
O/P COMPARATOR
PN SEQ.
O/P
REC.
MULT.
PN
O/P
MULT.
GND.
PATTERN POWER ON
M/s KASHTRONICA
Fig.1 DSSS PSK Modem
OBSERVATIONS:
2. PN Sequence
3. Multiplier output
4. Carrier
5. DSSS-PSK signal
6. ÷ 2 N/W output
7. Recovered output
CALCULATION:
Bandwidth of DSSS-PSK=2fm
Where fm is maximum modulating frequency of one bit (after Multiplication of input
bit and PN sequence)
REFERENCES:
QUESTIONS:
Q NO Question BT CO
3.
What is the amount of phase shift in DSSS BPSK system?
CONCULUSION:
____________________________________________________________________________________
____________________________________________________________________________________
____________________________________________________________________________________
____________________________________________________________________________________
____________________________________________________________________________________
ARMY INSTITUTE OF TECHNOLOGY, PUNE
Department of Electronics & Telecommunication Engineering
Subject: Digital Communication Lab
OBJECTIVES:
a) Study and analysis of QPSK modulation and demodulation with variable bit
pattern and frequency.
PRE-LAB REQUISITES:
APPARATUS:
60 MHz
2. DSO
1GS/s
3. Probes
4. Power cord
5. Connecting wires
THEORY:
To transmit digital data on analog lines (Viz. telephone) or even into
space, modulation of analog signal is required. Simplest way is BPSK where one phase
of carrier is transmitted for ‘1’ and inverted carrier is transmitted for digital ‘0’. Here if
bit rate is ‘fb’ then bandwidth required is ‘2 f b’. To reduce this bandwidth requirement
QPSK can be used. For QPSK bandwidth required is ‘fb’ i.e. half that of BPSK.
‘QPSK’ technique comes under ‘carrier modulation’ type. Here I/P to the
transmitter is digital data, in between processing is in analog form & finally O/P of
receiver is again digital data same as fed to transmitter. ‘Q’ in ‘QPSK’ means
quadrature i.e. 4, four phases of carrier are transmitted depending upon bit
pattern. e.g. we know that incoming bit pattern is divided into ‘odd’ & ‘even’ bit
patterns. Odd pattern is multiplied by sine wave & even pattern is multiplied by
cosine wave. Sine & Cosine waves are 90 0 phase shifted. Now resulting two PSK’s
are added & we get vector addition O/P i.e. if both odd & even pattern bits are ‘1’
we get 3150 phase shifted carrier. If odd bit is 1 & even bit is 0, we get 225 0 phase
carrier. If odd bit is 0 & even also 0, we get 135 0. If odd bit is 0 & even bit is 1, we
get 450.
In QPSK, two consecutive bits are stored & for resulting four combinations (4)
different phases of carrier are transmitted. By using ‘D’ flip- flop type arrangement
incoming bit pattern is divided into two-bit patterns viz. odd pattern & even
pattern, for obtaining this, basic clock whose frequency is ‘fb’ is divided by two,
resulting odd
& even clock frequencies are ‘fb/2 ‘& they are complementary. Each bit is stored
for
2Tb time period. Odd pattern will have bit no. 1,3,5,7, etc. each stored for ‘2Tb’ &
even bit pattern will have bit no. 2,4,6, etc. stored for ‘2Tb’.
Here active edges of odd & even clocks are separated by time ‘Tb’. So out of two bits
only one bit is changing (either odd or even) after each ‘T b’ period but every bit is
there for 2 Tb time; so, in this offset QPSK system every time phase changes by 90 0
only.
At receiver carrier is recovered from QPSK signal itself. This is synchronous
reception. To recover carrier QPSK signal is raised to power four by using analog
multiplier. Then resulting signal is passed through bandpass filter whose center
frequency is adjusted to 4 times carrier Frequency. Then o/p of bandpass filter is
divided by 4 to get carrier Frequency. In this kit IC 1496 is used as analog
multiplier.
Then QPSK signal is multiplied by ‘SINE & COSINE’ carrier waves. As a result, we
get odd & even patterns after filtering & integrating multiplier outputs. Now by
combining these two patterns we can get original bit patterns. This is done by
using switch (analog switch).
To observe QPSK, we have given two bit patterns (i.e. repeated after 8 bits) so that
on analog CRO we can observe the wave forms. Here carrier phase changes every
after time ‘Tb’ (bit period) depending upon odd & even bit combination. It is
difficult to observe this on analog CRO. Details of these phase changes are shown
in diagram attached. To observe QPSK we can use Lissajous patterns. i.e. If we
connect ‘SINE’ wave to one channel & ‘COSINE’ wave to the other channel & press
‘XY’ mode button
of CRO we get circle on screen. (this is Lissajous pattern for 90 0 phase shifted
waves)
Now if we connect ‘SINE’ & its associated PSK signal to two channels & press ‘XY’
mode button we get two crossed lines. (10 of 00 & the other for 1800 phase)
0
180 0
If ‘SINE’ & ‘QPSK’ signals are connected to two channels, on ‘XY’ mode we get two
crossed ellipses. This is because for 45 0, 1350, 2250 & 3150 we get ellipse as
Lissajous fig.
135,315 45,225
Also, at transmitter observe that ‘SINE’ and ‘COSINE’ wave amplitudes are lesser
than resulting ‘QPSK’ wave because of vector addition.
We are doing this complex processing to save on bandwidth requirement
of the system. This can be observed on CRO also. Observe bit pattern on CRO
along with odd or even bit pattern, you will come to know that odd or even bit
pattern frequency is lesser than original bit pattern frequency.
CARRIER
SECTION
I/P
I/P I/P
TRANSMITTER
I/P
%4 N/W
CLOCK 2
1 4F
GEN.
SINE
I/P E. CLOCK
O/P
O/P O/P
O/P
SINE W.
COS
QPSK
I/P
1496 O/P
O. DATA MUL.
1496
RECEIVER
ADDER
MUL.
1496
MUL.
E. DATA SINE
COS W.
O. DATA SWITCH
SINE O/P
1496
PATTERN
O&E MUL.
I/P
GEN.
DATA
GEN.
E. DATA
COS D CLOCK
COS
GND.
E. CLOCK
POWER ON
BP. POT
SECTION
I/P
TRANSMITTER I/P I/P
I/P
ODD 1496 1496 BP
CLOCK EVEN O. CLOCK SQ. SQ. FILTER
CLOCK 1 %4 N/W
GEN. 2 4F
RECEIVER
1496 O/P
MUL.
O. DATA MUL.
ADDER
A
1496
MUL.
E. DATA SINE
COS W. B
O. DATA SWITCH
SINE O/P
1496
PATTERN
O&E MUL.
I/P
GEN.
DATA
GEN.
E. DATA
COS D CLOCK
COS
GND.
E. CLOCK
2. Even Data
3. Odd Data
4. BPSK 1
5. BPSK 2
6. QPSK signal
7. Recovered output
1) Information Signal
2) Even Data
3) Odd Data
4) BPSK 1 output
5) BPSK 2 output
6) QPSK signal
7) Recovered output
REFERENCES:
1. Simon Haykin, ―Digital Communication Systems‖, John Wiley & Sons, Fourth Edition.
2. P RamkrishnaRao, Digital Communication, McGraw Hill Publication.
QUESTIONS:
Q NO Question BT CO
1. 2 4,5
What is the Euclidean distance and minimum BW in QPSK?
2. 1 5
A symbol in QPSK comprises of how many bits?
CONCLUSION:
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