Alfaisal University

College of Engineering
Electrical and Software Engineering Programs

EE 210/SE223
Digital Design

Chapter 2
Boolean Algebra and Logic Gates
1
 Outline
• Truth tables
• Logic operations
• Logic gates
• Boolean theorems
• Boolean Function Minimization
• Universal gates
Analyze and construct Boolean
functions, minimization, and
implementation with truth tables
and Karnaugh-maps.
Outcome 2 2
 Introduction
• Digital circuits operate in the binary mode where each
input and output voltage is either 0 or 1
• The 0 and 1 designations represent predefined voltage
ranges
• This characteristic of logic circuits allows us to use
Boolean algebra as a tool for the analysis and design of
digital circuits
• Boolean algebra allows us to describe the relationship
between logic circuit’s output and its inputs as an
algebraic equation (a Boolean expression)

3
 Truth tables
• A truth table is a means
for describing how a
logic circuit’s output
depends on its inputs inputs output

A B X
A 0 0 1
? X
B 0 1 0
1 0 1
1 1 0
4
 Logical Operations
• The three basic logical operations are:
– AND
– OR
– NOT
• AND is denoted by a dot (·).
• OR is denoted by a plus (+).
• NOT is denoted by an overbar ( ¯ ), a single
quote mark (') after, or (~) before the
variable (X, X', ~X).
 Notation Examples
• Examples:
–Y=A´B is read “Y is equal to A AND B”
–Z=X+Y is read “Z is equal to X OR Y”
–X=A is read “X is equal to NOT A”
§ Note: The statement:
1 + 1 = 2 (read “one plus one equals two”)
is not the same as
1 + 1 = 1 (read “1 or 1 equals 1”)
 Or operation with OR gates
• The truth table and circuit symbol for a 2-input OR
logic circuit is show below:

A B X=A+B
0 0 0 X=A+B
A
0 1 1 B
1 0 1
1 1 1

7
 Three input OR gate

A
A
B A+B+C B
C
C

Output
A+B+C
Time

8
 And operation with AND gates
• The truth table and circuit symbol for a 2-input
AND logic circuit is show below:

A B X=A·B
0 0 0
A X=A·B
0 1 0 B
1 0 0
1 1 1

9
 A two-input AND gate

A A×B B
B

Output
A×B
Time

10
 Not operation with NOT gates
• The truth table and circuit symbol for a NOT logic
circuit is show below:

A X=A
X=A
0 1 A

1 0

11
 NOR gates

x=A+B

x=A+B

A B A + B A + B
0 0 0 1
0 1 1 0
1 0 1 0
1 1 1 0 12
 NAND gates

x=A×B

x=A×B

A B A × B A × B
0 0 0 1
0 1 0 1
1 0 0 1
1 1 1 0 13
 Exclusive OR and exclusive NOR
• Two special logic circuits that occur quite often in
digital systems are the exclusive-OR and exclusive-NOR
circuits
XOR Truth Table XNOR Truth Table

A B XOR A B XNOR
0 0 0 0 0 1
0 1 1 0 1 0
1 0 1 1 0 0
1 1 0 1 1 1

AÅB = AB + AB AÅB = A B + A B
14
 XOR and XNOR symbols
A AB + AB
B

A AB + AB
B

XOR properties

XÅ0 = X XÅ1 = X

XÅX = 0 XÅX = 1
15
 Parity generator
• When transmitting n bits of information from
one place to another, often a parity bit is used
to detect a single bit error

Information n bits n + 1bits Transmit

to be Parity generator n bits plus a
transmitted parity bit

16
 Parity checker
• On the receiving side, the parity of the
received information is checked to make sure
no error occurred

Received n +1 bits ERROR report

information Parity checker
(n + 1) bits

17
 Three bit even parity generator

1 x 0
1 y p 1
1 z

p = 1 if x, y, and z have odd parity, therefore the parity of x, y, z

and p is always even
z 1
y 0
x 1 Transmit
1 x 1
0 y p 0
1 z 18
 Four bit even parity checker

1 x 0 1
1 y Error
1 z 1
0 p

If output is 1 then there was an error

If output is 0 then there was no error

19
 Postulates (Axioms) of
Boolean Algebra
1. Closure with respect to the operators: a set S is closed with
respect to a binary operator if, for every pair of elements of S, the binary operator
specifies a rule for obtaining a unique element of S
(a) OR (+)
(b) AND (×)
2. Identity elements
(a) with respect to +, designated by 0: x + 0 = 0 + x = x
(b) with respect to ×, designated by 1: x × 1 = 1 × x = x
3. Commutative law
(a) with respect to + : x + y = y + x
(b) with respect to × : x × y = y × x

20
 Postulates (Axioms) of
Boolean Algebra
4. Distributive law
(a) × is distributive over + : x × (y + z) = (x × y) + (x × z)
(b) + is distributive over × : x + (y × z) = (x + y) × (x + z)
5. (Inverse) For every element x in B, there exists
an element x’ in B
(a) x+x’ = 1
(b) x × x ' = 0
6. There exists at least two elements x, y in B such
that x≠y

• Postulates (axioms) do not require proof.

21
 Basic Theorems
• The postulates are basic axioms of the
algebraic structure and need no proof
• Six theorems are going to be presented
• The theorems must be proven from the
postulates
• The validity of theorems can also be shown by
means of truth tables.

22
 The Duality Principle
q Every algebraic expression of Boolean algebra
remains valid if the operators and identity elements
are interchanged
m ANDàOR, ORàAND, 0à1, 1à0
m Part (b) is the dual of part (a)

q For example,
4. (Inverse) For every element x in B, there exists an
element x’ in B
(a) x + x’ = 1
(b) x × x' = 0

23
 Basic Theorems
• Theorem 1:
(a) x + x = x
(b) x × x = x
• Theorem 2:
(a) x + 1 = 1
(b) x × 0 = 0
• Theorem 3 (involution): (x')' = x
• Theorem 4 (associative):
(a) x + (y + z) = (x + y) + z
(b) x × (y × z) = (x × y) × z

24
 Basic Theorems (cont.)

• Theorem 5 (DeMorgan):
(a) (x + y)' = x'y'
(b) (xy)' = x' + y'
• Theorem 6 (absorption):
(a) x + xy = x
(b) x(x + y) = x
 Summary of Basic
Theorems/Properties

Table 2.1 from Mano & Ciletti

26
 Example Proof
• Theorem 1: (a) x + x = x
• Theorem 2: (b) x × 0 = 0
• Theorem 6: (a) x + xy = x

27
 Operator Precedence
The operator precedence for evaluating Boolean
expressions is
1. Parentheses
2. NOT
3. AND
4. OR

• In ordinary arithmetic, the same precedence holds

– multiplication à AND
– addition à OR

28
 Single variable Boolean theorems
v X×0=0 x
0
0

x
v X×1=X 1 x

v X×X=X x
x

x
v X×X=0 0
 Single variable Boolean theorems
v X+0=X x x
0

v X+1=1 x 1
1

v X+X=X x
x

v X+X=1 x 1

v X=X x x
 Multivariable Boolean theorems
• x+y=y+x
• x×y=y×x
• x + (y + z) = (x + y) + z = x + y + z
• x(yz) = (xy)z = xyz
• x(y + z) = xy + xz
• x +yz = (x + y)(x + z)
• x + xy = x
• x + xy = x + y
• x + xy = x + y
 DeMorgan’s theorem
v (x + y)’ = x’ × y’ DeMorgan’s
v (x × y)’ = x’ + y’ theorems

Example: simplify the expression: Z = ((A’+C)×(B+D’))’

Sol:
Using DeMorgan’s theorem and treating (A+C) as x and (B+D) as y,
we get
z = (A’+C)’ + (B+D’)’
z = (A’’ × C’) + B’ × D’’ since x’’ = x, we get
z = AC’ + B’D
 Example
• Simplify AB + A(B+C) + B(B+C)
 Example
• Simplify AB + A(B+C) + B(B+C)
= AB + AB + AC + BB + BC
= AB + AC + B + BC
= AB + AC + B + BC = AB + AC + B(1+C)
= AB + AC + B = AB + B + AC
= B + AC
 Examples
• Simplify AB’ + A(B+C)’ + B(B+C)’

• Simplify [AB’(C+BD)+A’B’]C
 Examples
• Simplify AB’ + A(B+C)’ + B(B+C)’
= A(B’+ (B+C)’) + B(B+C)’
= A(B’ + B’C’) + B(B’C’) = AB’ + 0 = AB’

• Simplify [AB’(C+BD)+A’B’]C
= [AB’C+AB’BD +A’B’]C
= (AB’C + A’B’)C = AB’C + A’B’C
= B’C (A + A’) = B’C
 Examples
Simplify A'BC + A'BC' + A'B'C + A'B'C’
A BFC' a =
A'B + AB
=
A 'LB + BY)
Simplify X'Z + XY'Z+ XYZ
= A' -

x'z + xz(Y + Y)
N'z + Xz
Z
 Examples
Simplify A'BC + A'BC' + A'B'C + A'B'C'
= A'B(C + C') + A'B'(C + C')
= A'B + A'B' = A'(B + B') = A‘

Simplify X'Z + XY'Z+ XYZ

= X'Z + XZ(Y + Y') = X'Z + XZ
= Z(X' + X) = Z
 Example
Simplify Z = A’C(A’BD)’ + A’BC’D’ + AB’C
 Example
Simplify Z = A’C(A’BD)’ + A’BC’D’ + AB’C

= A’C(A + B’+ D’) + A’BC’D’ + AB’C

= A’CA + A’CB’ + A’CD’ + A’BC’D’ + AB’C
= A’B’C + A’CD’ + AB’CD’ + AB’C
= B’C(A’ + A) + A’D’(C + BC’)
= B’C + A’D’ (B + C)
 Exercise

Simplify the following functions:

F = A + B + A’B’C’D

F = A’B’C + A’BC’+ A’BC + ABC’ + AB’C’

 CANONICAL AND STANDARD FORMS
• A binary variable may appear either in its normal
form (x) or its complement form (x’)
• Now consider two binary variables x and y combined
with an AND operation. Since either variable may
appear in either form, there are four possible
combinations:
– x’y’, x’y, xy’, and xy
– Each of these four AND terms is called minterm, or a standard product

• In a similar manner, n variables can be combined to

form 2n minterms.
42
 CANONICAL AND STANDARD FORMS
• A binary variable may appear either in its normal form (x) or its
complement form (x’)
• Boolean functions can be represented in different ways. Canonical and
standard forms are two of them.
• Standard forms
– Sum of products (SOP): f(x,y,z)=y+x’y+xy’z
– Product of sums (POS): g(x,y,z)=x(x’+y+z)(y’+z’)
• Canonical forms
– Sum of minterms (canonical SOP)
– Product of maxterms (canonical POS)

43
 Definition: Minterms
• A minterm is obtained from an AND term of
the n variables either in its normal form (x) or
in its complement form (x')
• For a function of n variables, there are 2n
minterms: mj, 0 ≤ j ≤ 2n-1
• Some functions which have only minterms:
– g1(x,y)=x’y+xy’
– g2(x,y,z)=x’y’z+xy’z’+xyz
– g3(a,b,c,d)=abcd+a’b’cd’

44
 minterms
•Each minterm is obtained by
applying an AND operation to all
j x y z minterms
variables
The truth table of minterms for n=3 0 0 0 0 m0=x’y’z’
variables à
mj, 0 ≤ j ≤ 23-1=7 1 0 0 1 m1=x’y’z
•In the AND term for mj: 2 0 1 0 m2=x’yz’
• If a variable is 0 à 3 0 1 1
complement form of the
m3=x’yz
variable appears in the AND 4 1 0 0 m4=xy’z’
• If a variable is 1 à normal
form of the variable appears in 5 1 0 1 m5=xy’z
the AND
6 1 1 0 m6=xyz’
7 1 1 1 m7=xyz
45
 minterms
j x y z m0 m1 m7
• The truth table of minterms
x’y’z’ x’y’z xyz
for n=3 variables à
– mj, 0 ≤ j ≤ 23-1=7 0 0 0 0 1 0 0
• Each minterm has a value of 1 0 0 1 0 1 0
1 for exactly one
combination defined by its 2 0 1 0 0 0 0
index …
3 0 1 1 0 0 0
4 1 0 0 0 0 0
5 1 0 1 0 0 0
6 1 1 0 0 0 0
7 1 1 1 0 0 1
46
 Sum of Minterms
• Any Boolean function can be # x y z F2
expressed as a sum of
0 0 0 0 0
minterms (Sumà ORing)
1 0 0 1 1
• Consider the truth table of F2
F2(x,y,z) = m1+m4+m6+m7 2 0 1 0 0
3 0 1 1 0
= Σ(1,4,6,7)
4 1 0 0 1
= Σ(all #s that F2=1)
5 1 0 1 0
=x’y’z+xy’z’+xyz’+xyz
6 1 1 0 1
7 1 1 1 1
47
 Sum of Minterms (cont.)
F2(x,y,z) =m1+m4+m6+m7
# x y z F2 m1+m4 +m6 +m7 =F2

0 0 0 0 0 0 +0 +0 +0 =0
1 0 0 1 1 1 +0 +0 +0 =1
2 0 1 0 0 0 +0 +0 +0 =0
3 0 1 1 0 0 +0 +0 +0 =0
4 1 0 0 1 0 +1 +0 +0 =1
5 1 0 1 0 0 +0 +0 +0 =0
6 1 1 0 1 0 +0 +1 +0 =1
7 1 1 1 1 0 +0 +0 +1 =1 48
49
 Sum of Minterms: Example
• Given the truth table of F2, # x y z F2 F2’
express the complement of
0 0 0 0 0
F2 (F2’) as a sum of
minterms: 1 0 0 1 1 !
4/1 6 7) 2 0 1 0 0

·
4
F = , , ,
3 0 1 1 0

Fi E(0
=
,
2
,
3, 5) 4
5
1
1
0
0
0
1
1
0
6 1 1 0 1
7 1 1 1 1
50
 Complement of a Function
• The complement of a function F is F’ and is
denoted from the interchange of 0’s for 1’s
and 1’s for 0’s.

• (A+B+C)’ =

51
 Definition: Maxterms
• A maxterm is obtained from an OR term of the n
variables either in its normal form (x) or in its
complement form (x')
• For a function of n variables, there are 2n maxterms:
Mj, 0 ≤ j ≤ 2n-1
• Some functions which have only maxterms:
– h1(x,y)=(x’+y)(x+y)
– h2(x,y,z)=(x+y+z)(x+y’+z’)(x+y+z’)(x’+y’+z’)
– h3(a,b,c,d)=(a+b+c’+d)(a’+b’+c+d)

52
 Maxterms
•Each Maxterm is obtained by
applying an OR operation to j x y z Maxterms
all variables
0 0 0 0 M0=x+y+z
The truth table of maxterms for
n=3 variables à 1 0 0 1 M1=x+y+z’
Mj, 0 ≤ j ≤ 23-1=7
2 0 1 0 M2=x+y’+z
•In the OR term for Mj: 3 0 1 1 M3=x+y’+z’
• If a variable is 0 à normal
form of the variable appears in
4 1 0 0 M4=x’+y+z
the OR 5 1 0 1 M5=x’+y+z’
• If a variable is 1 à
complement form of the variable 6 1 1 0 M6=x’+y’+z
appears in the OR
7 1 1 1 M7=x’+y’+z’
53
 Maxterms
j x y z M0 M1 M7
• The truth table of
maxterms for n=3 0 0 0 0 0 1
1
variables à
1 0 0 1 1 0 1
– Mj, 0 ≤ j ≤ 23-1=7
2 0 1 0 1 1 1
• Each maxterm has a …
value of 0 for exactly 3 0 1 1 1 1 1
one combination 4 1 0 0 1 1 1
defined by its index 5 1 0 1 1 1 1
6 1 1 0 1 1 1
7 1 1 1 1 1 0
54
 Maxterms/minterms

j x y z Maxterms minterms
•Maxterms are the
0 0 0 0 M0=x+y+z m0=x’y’z’
complement of the
corresponding 1 0 0 1 M1=x+y+z’ m1=x’y’z
minterms: Mj=m’j 2 0 1 0 M2=x+y’+z m2=x’yz’
•For example: 3 0 1 1 M3=x+y’+z’ m3=x’yz
m5’=(xy’z)’=x’+y+z’=M5
4 1 0 0 M4=x’+y+z m4=xy’z’
5 1 0 1 M5=x’+y+z’ m5=xy’z
6 1 1 0 M6=x’+y’+z m6=xyz’
7 1 1 1 M7=x’+y’+z’ m7=xyz
55
 Product of Maxterms
• Any Boolean function can be # x y z F2
expressed as a product of 0 0 0 0 0
maxterms (productà ANDing)
1 0 0 1 1
• Consider the truth table of F2
2 0 1 0 0
F2(x,y,z) = M0M2M3M5
3 0 1 1 0
= Π(0,2,3,5) 4 1 0 0 1
= Π(all #s that F2=0) 5 1 0 1 0
6 1 1 0 1
=(x+y+z)(x+y’+z)(x+y’+z’)(x’+y+z’)
7 1 1 1 1
56
 Product of Maxterms (cont.)
F2(x,y,z) =M0.M2.M3.M5
# x y z F2 M0.M2.M3 .M5 =F2

0 0 0 0 0 0 .1 .1 .1 =0
1 0 0 1 1 1 .1 .1 .1 =1
2 0 1 0 0 1 .0 .1 .1 =0
3 0 1 1 0 1 .1 .0 .1 =0
4 1 0 0 1 1 .1 .1 .1 =1
5 1 0 1 0 1 .1 .1 .0 =0
6 1 1 0 1 1 .1 .1 .1 =1
7 1 1 1 1 1 .1 .1 .1 =1 57
 Product of Maxterms: Example
• Given the truth table of F2, # x y z F2 F2’
express the complement of
F2 (F2’) as a product of 0 0 0 0 0
maxterms: 1 0 0 1 1
2 0 1 0 0
3 0 1 1 0
4 1 0 0 1
5 1 0 1 0
6 1 1 0 1
7 1 1 1 1
58
Standard forms / Minterms and Maxterms

59
 Decimal Value ABCD Z
Exercise (0) 0000 0
(1) 0001 1
(2) 0010 1
• Write the minterms and (3) 0011 0

maxterms expression (4) 0100 0

(5) 0 1 01 1
for the function
(6) 0110 0
represented by the (7) 0111 1
following truth table: (8) 1000 1
(9) 1001 0
(10) 1010 0
(11) 1011 1
(12) 1100 0
(13) 1101 1
(14) 1110 1
60
(15) 1111 1
 Conversion between Canonical Forms
• To convert from one canonical form to another,
– interchange the symbols Π and Σ
– list those numbers missing from the original form.
• Note that the total number of minterms and
maxterms is 2n, where n is the number of binary
variables in the function.
• F2(x,y,z) = Σ(1,4,6,7) =

• F2’(x,y,z) =

• G(A,B,C,D)=Σ(0,1,3,5,8,9)=

61
 Canonical SOP Form: Example
• Express the Boolean function F1(x,y,z)=x+y’z in
canonical SOP form (sum of minterms):
x + y'z -

ply + y') + (x + 1(y'z .

Rythy' + 24 'z + xyz.

z) +
kyCE + 2) +Myt exiyt
Ky(E +

RYE + Ryz' Acl'E py'2' pyz xz

+ + +

=
E(7 , 6,5 / 4 ,
62
 A, B an 2
function
BC
=
[(3 4 /
56
1
7)
f A
, ,
= +

= ALB + B') + (A + A') BC .

= AB + AB + ABL + A BC .

ABC + ABL' + ABC + AB'C' + ABC +A'BC .

= ABC + ABC' - AB' .

+ AD'C' + A' BC .

M7 + M6 + M5 + M4
= + Ms
 Standard Forms

(a) SOP leads to a 2 level of AND-OR realization

g1 = y' + x'yz' + xy
(b) POS leads to a 2 level of OR-AND realization
g2= x (y'+z)(x'+ y + z)

g2
g1

(From Mano & Ciletti)

63
 Non-standard Form
(a) A Boolean function may be written in a non-standard form:
F3 = AB + C(D+E)
– Non-standard form leads to a multiple-level implementation.
(b) It can be changed to a two-level standard form implementation using
Boolean algebra: F3=AB+CD+CE
• Which one is preferred? Why?

(From Mano & Ciletti) 64

 A complete design example
5. Implement the circuit for the final expression
AB + AC + BC

AB
A
B

C AC AB + AC + BC

BC

65
 Example 2
Decimal Value ABCD z
(0) 0000 0
(1) 0001 0
(2) 0010 0
(3) 0011 0
(4) 0100 0
(5) 0 1 01 0
(6) 0110 0
(7) 0111 1 ABCD
(8) 1000 1 ABCD
(9) 1001 1 ABCD
(10) 1010 1 ABCD
(11) 1011 1 ABCD
(12) 1100 1 ABCD
(13) 1101 1 ABCD
(14) 1110 1 ABCD 66
(15) 1111 1 ABCD
 Simplifying the expression
• The expression we get from the truth table is:
Z = A’BCD + AB’C’D’ + AB’C’D + AB’CD’ + AB’CD +
ABC’D’ + ABC’D + ABCD’ + ABCD
= A’BCD + AB’C’(D’+D) + AB’C(D’+D) + ABC’(D’+D)
+ ABC(D’+D)
= A’BCD + AB’C’ + AB’C + ABC’ + ABC
= A’BCD + AB’ (C’+C) + AB(C’+C)
= A’BCD + AB’ + AB
= A’BCD + A(B’+B)
= A’BCD + A 67
 The implementation
• Finally, we can simplify the expression:
z = A’BCD + A = A + BCD
The implementation
A
B
C A + BCD
D

• Note that the algebraic simplification method can be

very lengthy when the original expression contains a
large number of terms
• The Karnaugh map technique, which we will discuss
later, does not have this limitation
68
 Exercise

• You are required to design a circuit that has

four inputs, A0, A1, B0, and B1, and one
output F. This circuit is a comparator, it
compares the binary number A which is
(A0A1) to B which is (B0B1). The output is 0 if
A0A1 equals B0B1 and 1 otherwise.

69
 Other Logic Operations/Gates

• So far, we have focused on three main gates

AND, OR, NOT

70
 Buffer Gate
• The Buffer gate performs the function:

F=x

X F
0 0
1 1

71
 NAND Gate
• It is equivalent to AND-NOT
à
x y F
• The truth table of a 2-input NAND gate
0 0 1
0 1 1
• The NAND gate performs the function 1 0 1
1 1 0
F=(x NAND y)=(x · y)’

72
 Multiple-Input NAND Gate
• Can have any # of inputs x y z (xyz)’
– A 3-input NAND gate: 0 0 0 1
0 0 1 1
0 1 0 1
0 1 1 1
1 0 0 1
• NAND gate is not associative: 1 0 1 1
((x NAND y) NAND z)≠ (x NAND (y NAND z)) 1 1 0 1
1 1 1 0

An example: z = 0à LHS = 1
y NAND z = 1, x = 1àRHS = 0 73
 NOR Gate
• It is equivalent to OR-NOT
à
x y F
• The truth table of a 2-input NOR gate 0 0 1
0 1 0
1 0 0
• The NOR gate performs the function 1 1 0

F = (x NOR y)=(x + y)’

74
 Multiple-input NOR Gate
• Can have any # of inputs x y z (x+y+z)’

– A 3-input NOR gate: 0 0 0 1

0 0 1 0
0 1 0 0
à 0 1 1 0
1 0 0 0
1 0 1 0
1 1 0 0
1 1 1 0

75
 Multiple-input NOR Gate (cont.)
• NOR gate is not associative:
– F1=((x NOR y) NOR z) ≠ F2=(x NOR (y NOR z))
x
y
F1=((x+y)’+z)’=(x+y)z’
z

y F2=(x+(y+z)’)’=x’(y+z)
z

• Therefore: F1 ≠ F2 ≠ (x+y+z)’ 76
 XOR GATE
• The XOR (Exclusive OR) gate performs the
binary addition without considering the carry:
x y F
0 0 0
0 1 1
1 0 1
1 1 0

• F =Σ(1,2)=x’y+xy’
• An XOR is also an odd function
– it is equal to 1 if the input variables have an odd # of 1's.

77
 Multiple-input XOR Gate
• A 3-input XOR gate:
x y z F
0 0 0 0
0 0 1 1
0 1 0 1
• Can be implemented using 2- 0 1 1 0
input gates
1 0 0 1
1 0 1 0
1 1 0 0
1 1 1 1
• The XOR gate is associative Prove it
78
 XNOR GATE
• It is equivalent to XOR-NOT x y F
0 0 1
0 1 0
à 1 0 0
1 1 1

•F =Σ(0,3)=x’y’+xy
• The XNOR gate is associative. Prove it
79
Alfaisal University
College of Engineering
Electrical and Software Engineering Programs

EE 210/SE223
Digital Design

Chapter 2
Boolean Algebra and Logic Gates

1
 Exercise

Simplify the following functions:

F = A + B + A’B’C’D = A + B + C’D

F = A’B’C + A’BC’+ A’BC + ABC’ + AB’C’

= A’C + C’(A+B)

2
 Decimal Value ABCD Z
Exercise (0) 0000 0
(1) 0001 1
(2) 0010 1
• Write the minterms and (3) 0011 0

maxterms expression (4) 0100 0

(5) 0 1 01 1
for the function
(6) 0110 0
represented by the (7) 0111 1
following truth table: (8) 1000 1
(9) 1001 0
(10) 1010 0
(11) 1011 1
(12) 1100 0
(13) 1101 1
(14) 1110 1
(15) 1111 13
Decimal A B C D Z Minterms Maxterms
Value
(0) 0000 0 m0=A’B’C’D’ M0=A+B+C+D
Z=Σ(m1,m2,m5,m7,m8,
(1) 0001 1 m1=A’B’C’D M1=A+B+C+D’ m11,m13,m14,m15)
(2) 0010 1 m2=A’B’CD’ M2=A+B+C’+D
(3) 0011 0 m3=A’B’CD M3=A+B+C’+D’ [Sum of Minterms]
(4) 0100 0 m4=A’BC’D’ M4=A+B’+C+D
(5) 0 1 01 1 m5=A’BC’D M5=A+B’+C+D’
(6) 0110 0 m6=A’BCD’ M6=A+B’+C’+D
(7) 0111 1 m7=A’BCD M7=A+B’+C’+D’
Z=Π(M0,M3,M4,M6,M9,
(8) 1000 1 m8=AB’C’D’ M8=A’+B+C+D M10,M12)
(9) 1001 0 m9=AB’C’D M9=A’+B+C+D’
(10) 1010 0 m10=AB’CD’ M10=A’+B+C’+D
[Product of Maxterms]
(11) 1011 1 m11=AB’CD M11=A’+B+C’+D’
(12) 1100 0 m12=ABC’D’ M12=A’+B’+C+D
(13) 1101 1 m13=ABC’D M13=A’+B’+C+D’
(14) 1110 1 m14=ABCD’ M14=A’+B’+C’+D
(15) 1111 1 m15=ABCD M15=A’+B’+C’+D’ 4
 Exercise

• You are required to design a circuit that has

four inputs, A0, A1, B0, and B1, and one
output F. This circuit is a comparator, it
compares the binary number A which is
(A0A1) to B which is (B0B1). The output is 0 if
A0A1 equals B0B1 and 1 otherwise.

5
A0 A1 B0 B1 F Minterms
Procedure: Write the sum of
0000 0
minterms equation, substituting for
0001 1 m1=A0’A1’B0’B1 the minterm factors defined in the
0010 1 m2=A0’A1’B0B1’ truth table. Then SIMPLIFY to get
0011 1 m3=A0’A1’B0B1 the final function expression.
0100 1 m4=A0’A1B0’B1’ (simplify using Boolean Algebra or
0 1 01 0 K-maps)
0110 1 m6=A0’A1B0B1’
0111 1 m7=A0’A1B0B1 F=Σ(m1,m2,m5,m7,m8,
m11,m13,m14,m15)
1000 1 m8=A0A1’B0’B1’
1001 1 m9=A0A1’B0’B1 = A0B0’ + A0’B0 + A1B1’ +A1’B1
1010 0
To Check: Substitute A0, A1, B0, B1
1011 1 m11=A0A1’B0B1
value combinations for each
1100 1 m12=A0A1B0’B1’ function output and see if the
1101 1 m13=A0A1B0’B1 function given matches the truth
1110 1 m14=A0A1B0B1’ table outcomes.
1111 0 6