116 El III Ec 05
116 El III Ec 05
2023
( CBCS )
( 3rd Semester )
ELECTRONICS
THIRD PAPER
Full Marks : 75
Time : 3 hours
The figures in the margin indicate full marks for the questions
( Use of Simple Calculator allowed )
( SECTION : A—OBJECTIVE )
( Marks : 10 )
/116 1 [ Contd.
3. A UJT is sometimes called _____ diode.
(a) low-resistance ( )
(b) high-resistance ( )
(c) single-based ( )
(d) double-based ( )
5. If a transistor is operated in such a way that output current flows for 60º
of the input signal, then it is _____ operation.
(a) class C ( )
(b) class AB ( )
(c) class A ( )
(d) class B ( )
/116 2 [ Contd.
8. The amplifier parameter which indicates how much the output power is
increased concerning the input power is called
(a) voltage gain ( )
(b) current gain ( )
(c) impedance gain ( )
(d) power gain ( )
10. The output of a particular Op-Amp increases 8 V in 12 ms. The slew rate is
(a) 90 V/ms ( )
(b) 1·5 V/ms ( )
(c) 58 V/ms ( )
(d) 0·67 V/ms ( )
/116 3 [ Contd.
UNIT—II
UNIT—III
RB = 1 K RC = 20 ohms
+ N-P-N
Vin +
–
UNIT—IV
/116 4 [ Contd.
UNIT—V
9. For differential amplifier, the input voltages are v 1 = 300 mV and
v 2 = 250 mV. The differential gain is 5000. Calculate the output voltage
when the CMRR is (a) 200 and (b) 8000.
OR
10. A differential amplifier has a differential gain of 1000 and CMRR of 100 dB.
If the common mode signal is 5 sin 200 pt volts, calculate the common mode
output voltage.
( SECTION : C—DESCRIPTIVE )
( Marks : 50 )
UNIT—I
1. (a) State and explain the main parameters of JFET. Also establish the
relationship between them. 3+2=5
V GS 0 V 0V –0·2 V
V DS 7 V 15 V 15 V
ID 10 mA 10·25 mA 9·65 mA
Determine (i) a.c. drain resistance, (ii) transconductance and
(iii) amplification factor. 4
/116 5 [ Contd.
UNIT—II
3. (a) Explain two-transistor analogy and 90º phase control of SCR. 3+2=5
(b) The intrinsic stand-off ratio for a UJT is determined to be 0·6. If the
inter-base resistance is 10 kW, what are the values of R B1 and R B2 ? 3
(c) What is dynamic resistance of junction diode? Give the condition for
linearity of the junction diode. 1+1=2
OR
4. (a) Explain the construction and operation of SCR. 4
UNIT—III
5. Prove that a transformer coupled class-A power amplifier has maximum
collector efficiency of 50%. A power transistor working in a class-A
operation is supplied from a 12 volts battery. If the maximum collector
current change is 100 mA, find the power transfer to a 5 W loud speaker if
it is (a) directly connected in the collector and (b) transformer coupled for
maximum power transfer. Find the turns ratio in the second case. 5+5=10
OR
6. A class-B push-pull amplifier has an efficiency of 60% and each transistor
has a rating of 2·5 W. Find the a.c. output power and d.c. input power. Also
find out if a class-B push-pull amplifier with transformer coupled load uses
two transistors rated 10 W each. What is the maximum power output one
can obtain at the load from the circuit? 5+5=10
UNIT—IV
7. In the context of transformer-coupled amplifiers, discuss the construction,
operation and classification based on the number of windings. Explain the
concept of transformer impedance and how it affects amplifier
performance. Provide examples of applications for transformer-coupled
amplifiers. 5+5=10
/116 6 [ Contd.
OR
8. Discuss the hybrid equivalent circuit of a transistor, elaborating on how
the hybrid parameters (h fe , hie , hoe , hre ) are defined and used to represent
the transistor’s behaviour in a circuit. Provide examples to illustrate their
significance. 10
UNIT—V
9. Explain the concept of CMRR. Discuss the operation of a differential
amplifier using transistor model. How will you configure an Op-Amp as
differentiator and integrator circuits? 2+2+3+3=10
OR
10. Derive an expression for the voltage gain of inverting and non-inverting
amplifiers. Design an Op-Amp as a logarithmic amplifier. Determine the
output voltage for the summing amplifier shown in the figure below :
2+2+3+3=10
R1 Rf
10 V
5 kW 1 kW
R2
5V +20 V
8 kW
R3 +
8V Vo
10 kW –
–20 V
HHH
/116 7 24G—70