Experiment No: 1.

a
Design and plot the frequency response of an active band pass filters
Apparatus Required:
Sl No Components Quantity
1 Resistors: 4.7k, 6.2k, 100k,100k, 10k Each 01
2 Capacitors: 0.01uF 02
3 uA 741 opamp 01
4 CRO and Function Generator 01
5 Dual DC Source (RPS) 01
6 Bread Board, connecting Wire 01

Circuit Diagram:
Nature of graph :

Tabular Column:
Vi = 2 Vpp
Frequency in Hz Output Voltage (V0) in V Av = 20log(V0 / Vi) in dB

Theory:
A bandpass filter using an operational amplifier (op-amp) typically consists of a combination of
high-pass and low-pass filter stages. High-pass Filter Stage: This stage allows high-frequency
signals to pass while attenuating low-frequency signals. Low-pass Filter Stage: This stage allows
low-frequency signals to pass while attenuating high-frequency signals.

The Q factor (quality factor) is a measure of the bandwidth of a resonant circuit or filter relative to
its center frequency. Q Factor Definition: The Q factor is defined as the ratio of the center
frequency (f0) of the filter to its bandwidth (BW) at the -3 dB points.

Q = f0 / BW

The Q factor determines the selectivity and bandwidth of the bandpass filter. Higher Q factors
result in narrower bandwidths and sharper frequency response curves, while lower Q factors result
in wider bandwidths and more gradual roll-offs. If Q<0.5 is called wideband filter and ifQ> 0.5
is called narrow and filter

Procedure :
1. Setup the circuit and apply a 2 Vpp sine wave at the input
2. Vary the frequency of sine wave in steps of 500 Hz and note down output voltage in
tabular.
3. Plot the frequency response on a Semi-log graph sheet. Marks phase band on it.
Result: Designed and set up BPF and studied its functioning
 Experiment No: 1.b
Design and plot the frequency response of an active band stop (Notch) filters.

Apparatus Required:
Sl No Components Quantity
1 Resistors: 33K, 33K, 15K, 10K Each 01
2 Capacitors: 0.1uF, 0.22 uF 02
3 uA 741 opamp 01
4 CRO and Function Generator, RPS 01

Circuit Diagram:

Nature of graph

Tabular Column:
Vi = 2 Vpp
Frequency in Hz Output Voltage (V0) in V Av = 20log (V0 / Vi) in dB
Procedure :
1. Setup the circuit and apply a 2 Vpp sine wave at the input
2. Vary the frequency of sine wave in steps of 500 Hz and note down output voltage in
tabular.
3. Plot the frequency response on a Semi-log graph sheet.

Result: Designed and set up BSF and studied its functioning,

 Experiment No: 2
Design and test a high-level collector Modulator circuit and Demodulation the signal using
diode detector.

Apparatus Required:
Sl. No Components Quantity
1 Transistor SL100 01
2 Resistor 22KΩ (pot), 47KΩ 01
3 Capacitor : 1µF, 0.1µF 03
4 Inductor 01
5 Bread board Connecting wire 01
6 CRO(40MHz), Signal generator(1MHz), DC supply(30V) 01

Circuit Diagram:
Waveforms:

where, A = Vmax and B = Vmin

Vmax−Vmin
From waveform modulation index, μ is given by μ=
Vmax +Vmin
 Design:
The amplitude modulation definition is, an amplitude of the carrier signal is proportional to (in
accordance with) the amplitude of the input modulating signal.
Amplitude modulation (AM) in a tuned amplifier circuit using a bipolar junction transistor (BJT)
involves varying the amplitude of an input signal to carry information. The BJT acts as an
amplifier, and the tuned circuit filters out unwanted frequencies, leaving only the desired
modulated signal. By adjusting the biasing of the BJT, the modulation depth can be controlled,
allowing for faithful reproduction of the modulating signal. Overall, the tuned amplifier circuit
amplifies the modulated signal while filtering out noise and unwanted frequencies, enabling
efficient transmission or reception of modulated signals.
the detector is a demodulator, It recovers the original signal (what was the modulating signal at the
transmitter end) from the received AM signal. The detector consists of a simple half-wave rectifier
which rectifies the received AM signal. This is followed by a low pass filter which removes
(bypasses) the high-frequency carrier waveform the received signal. The resultant output of the
low pass filter will be the original input (modulating) signal.

Tabular Column:
Fc = Hz, Fm = Hz
Vmax in Vmin in Modulation Index Amplitude of Amplitude of
V max −V min V max −V min V max +V min
volts Volts μ=
V +V Vm = V c=
max min
2 2

Note: Make sure Amplitude of carrier signal Vc is constant

Procedure

1. Rig up the circuit as shown in the figure.

2. Set the amplitude of c(t) = 2Vp and m(t) = 2Vp using different signal generator.
3. Set the frequency of m(t) =100Hz & c(t) = 1KHz to get the AM wave.
4. Note down the Vmax & Vmin.
5. Calculate the modulation index µ along with values of Vm & Vc
6. Repeat step number 4 and 5 for various value of Vmax & Vmin by varying amplitude of
modulating signal m(t).

Result: Designed and verified Amplitude modulation and demodulation circuit

 lOMoARcPSD|274 654 54

Experiment No: 3
Test the Balanced Modulator / Lattice Modulator (Diode ring)

Apparatus Required:

Sl No Components Quantity
1 D1,D2,D3,D4 -0A79 or 1N914 04
2 Two-trifler-winding Transformers 1:2 turns ratio Hexa-Path Magnetics 02
transformer with either HP3, HP4, HP5, or HP6 winding layout is needed

3 Bread board, Connecting wire 01

4 CRO(40MHz), Signal generator(1MHz), DC supply(30V) 01

Circuit Diagram:

Waveforms
 lOMoARcPSD|274 654 54

Theory:
A Diode Ring Modulator, also known as a Lattice Modulator, is a type of balanced modulator
commonly used in electronic communications. Its primary function is to produce double- sideband
suppressed-carrier (DSBSC) signals, which involve suppressing the radio frequency carrier while
preserving the sum and difference frequencies at the output. This modulation technique allows for
efficient transmission of information while conserving power.

The Diode Ring Modulator typically consists of four diodes arranged in a ring configuration, hence
the name "ring modulator." These diodes are interconnected in such a way that they form aclosed
loop or ring structure. The input signals, usually the carrier signal and the modulating signal, are
applied to opposite pairs of diodes in the ring.

The output waveform of the Diode Ring Modulator lacks the carrier signal but contains all the
information present in a traditional amplitude modulated (AM) signal. This makes it an efficient
means of transmitting information, especially in applications where power saving is crucial.

Procedure
1. Connections are made as shown in figure
2. Apply modulating signal (Sine Wave Vm =2Vp) with frequency fm = 1K Hz, and carrier
signal (Square Wave Vmc = 3Vp) with frequency fc = 10KHz (fc = 10fm).
3. Observe the phase reversal of 180o at each Zero Crossing modulating signal in the output
DSBSC signal.

Result: Verified Test the Balanced Modulator using Diode ring.

 lOMoARcPSD|274 654 54

Experiment No: 4
To study Frequency modulation using VCO and PLL FM demodulator

Apparatus Required:
Sl No Components Quantity
1 PLL 565 01
2 Resistor, 12K, 12K, 1KΩ 01
3 Capacitor: 10uF, 0.01uF, 0.01uF 01
4 Bread board, Connecting wire 01
5 CRO (40MHz), Signal generator(1MHz), DC supply(30V) 01
Circuit Diagram:
Modulation Demodulation
 lOMoARcPSD|274 654 54

Tabular Column

Ac in (v) Am in (v) Fmax in Hz Fmin in Hz ∆f mi

Theory

Procedure
1. Setup the FM generator circuit and apply 5Vpp, 1KHz sine wave input and observe the
output.
2. Note maximum and minimum frequency fmax and fmin of FM output. Calculate frequency
deviation ∆ f =f max −f min . Calculate the modulation index mi=∆ f / f m where fm is
modulating signal frequency.
3. Set up FM demodulator and apply the FM signal to it. Observe the demodulated output.

Result : Verified FM modulation and demodulation circuit using PLL.

 lOMoARcPSD|274 654 54

Experiment No: 5. a
Design and test Pulse sampling, flat top sampling and reconstruction.

Apparatus Required:
Sl No Components Quantity
1 n-EMOSFET (TRS740), OP-AMP( μA741) 1
2 Resistor 22KΩ, 10KΩ(POT), 47KΩ 1
3 Bread board, connecting wires 1
4 CRO, Function Generator and DC Supply 1
5 Capacitor 0.1uF (Electrolyte) 1

Circuit
Pulse sampling circuit diagram

Reconstruction of Pulse sampling circuit diagram

 lOMoARcPSD|274 654 54

Design : Sampling circuit is a voltage follower circuit and assume uA741 output current is 20
mA hence assume R and RL value is to assume 1K to 10KΩ as per availability.
Reconstruction circuit: consider frequency of message signal as fm =100 Hz and this is the
cutoff frequency of LPF.
1
Choose C = 0.1uF and find R using f =
m
2 πRC

Waveforms

Pulse sampling Flat top sampling

Theory
The sampling theorem can be defined as the conversion of an analog signal into a
discrete form by taking the sampling frequency as twice the input analog signal
frequency. Input signal frequency denoted by Fm and sampling signal frequency
denoted by Fs. If the sampling frequency (Fs) equals twice the input signal frequency
(Fm), then such a condition is called the Nyquist Criteria for sampling. When sampling
frequency equals twice the input signal frequency is known as “Nyquist rate”. If the
sampling frequency (Fs) is less than twice the input signal frequency, such criteria called
an Aliasing effect.
In flat-top sampling or rectangular pulse sampling, the top of the samples remains
constant and isequal to the instantaneous value of the baseband signal x(t) at the start of
sampling. During transmission, noise is introduced at top of the transmission pulse
which can be easily removed if the pulse is in the form of flat top. Here, the top of the
samples are flat i.e. they have constant amplitude. Hence, it is called as flat top sampling
or practical sampling. Flat top sampling makes use of sample and hold circuit.”

Procedure
1. Before wiring the circuit checks all the components using multi meter.
2. As per design set the values and do the connections as shown in circuit diagram.
3. Set the carrier amplitude or sampling signal to around 4 Vp and frequency, fs =
1KHz.
4. Set the message signal amplitude to around 2 Vp and frequency, fm = 100 HZ.
5. Connect the CRO at the pin number 6 of OP-AMP and observe the
waveform for both circuits.
 lOMoARcPSD|274 654 54

6. Connect this output to the reconstruction filter and observe the waveforms.

Result: Verified and tested Pulse sampling, flat top sampling and reconstruction circuits.
 lOMoARcPSD|274 654 54

Experiment No: 5. b
Design and test Pulse amplitude modulation and demodulation.

Apparatus Required:
Sl No Components Specification
1 Transistor SL100
2 Resistor 22K, 10K,47K
3 Capacitor 0.1µF
4 Bread board Connecting wire
5 CRO (40MHz), Signal generator(1MHz), DC supply(30V)
Circuit diagram
Pulse Amplitude Modulation Circuit

Demodulation circuit

Design
Reconstruction circuit: concider frequency of message signal as fm =100 Hz abd this is the cutoff
1
frequency of LPF. Choose C = 0.1uF and find R using f m=
2 πRC
 lOMoARcPSD|274 654 54

Waveforms

Theory :
Pulse amplitude modulation is a technique in which the amplitude of each pulse is controlled by
the instantaneous amplitude of the modulation signal. It is a modulation system in which the signal
is sampled at regular intervals and each sample is made proportional to the amplitude ofthe
signal at the instant of sampling. This technique transmits the data by encoding in the amplitude
of a series of signal pulses. In PAM, the signal amplitudes can be changed based onthe
modulating signal. The pulse train works like a periodic switching signal toward the modulator.
Once it is switched ON, and then allows the samples of modulating signals to supply toward the
output. The pulse train’s periodic time is called the sampling period.
PAM is mostly applied in non-based modulating transmission of digital data and applications
replaced by pulse-code modulation and pulse-position modulation. Particularly all phone modems
faster than 300 bit/s use quadrature amplitude modulation.

Procedure
1. Before wiring the circuit checks all the components using multi meter.
2. As per design set the values and do the connections as shown in circuit diagram.
3. Set the pulsed carrier amplitude to around 5V (p-p) and frequency, fs = 1 KHz.
4. Set the message signal amplitude to around 3 V (p-p) and frequency, fm = 100KHZ.
5. Check the modulated and demodulated output waveform.

Result: Verified and tested Pulse Amplitude Modulation circuit and its reconstruction circuit.
 lOMoARcPSD|274 654 54

Experiment No: 6
To Design and test the Time Division Multiplexing of two bandlimited signals

Apparatus Required:
Sl No Components Quantity
1 IC CD4051 2
2 Resistor, 5.4KΩ, 3.3KΩ 1
3 Capacitor 0.1 uF 2
4 Bread board Connecting wire -
5 CRO (40MHz), Signal generator(1MHz), DC supply(30V) -

Circuit Diagram

Design :
To reconstruct the original signal from thesamples design reconstruction filter (LPF) using the
1 1
suitable design steps of filter 𝑓𝑚1 = fm1= 100Hz C1=0.1 uF Find R1, 𝑓𝑚2 =
2𝜋𝑅𝐶 2𝜋𝑅𝐶
fm2=400Hz C1 = 0.1uF Find R2.
Waveforms
 lOMoARcPSD|274 654 54

Theory
Multiplexing is a technique is used to combine various signals into a single signal using a shared
medium. There are different types of multiplexing techniques like TDM, FDM, CDMA & WDM
which are utilized in data transmission systems.
Time-division multiplexing or TDM definition is; a multiplexing technique that is used totransmit
two or above streaming digital signals above a common channel. In this type of multiplexing
technique, incoming signals are separated into equivalent fixed-length time slots. Once
multiplexing is done, these signals are sent over a shared medium & after de-multiplexing, they
are reassembled into their original format. TDM is commonly used in telecommunications,
broadcasting, and computer networking to increase data transmission efficiency.
The CD4051 is an analog multiplexer/demultiplexer integrated circuit (IC) commonly used in
electronic circuits. It has eight channels, allowing it to selectively route one of eight analog signals
to a single output based on digital control inputs. It's often used in applications where multiple
analog signals need to be processed or switched, such as in audio systems, instrumentation, and
data acquisition systems. The CD4051 operates over a wide range of 5V - 15V voltages and is
relatively easy to use, making it a popular choice in various electronic projects.

Procedure
1. Connections are made as shown in the circuit diagram.
2. Apply a square wave (TTL) carrier signal of 2 kHz (or >2 kHz) of 5V amplitude.
3. Apply m1(t) and m2(t) whose frequencies are f1 (200 Hz, with DC offset) and f2 (400
Hz, with DC offset).
4. Observe TDM waveform at pin number 3 of IC CD4051.
5. Observe the reconstructed message waveforms m1(t) and m2(t) at pin numbers 13 and 14
of 2nd IC CD4051

6. The ripples in the demodulated signals can be reduced by increasing the order of the
Filter or by increasing the carrier frequency.
Note: TTL compatible output clock pulse since it has ideal rise time (<25 μsec) and fall Time
(<10 μsec).

Result: Deigned and verified the Time Division Multiplexing of two bandlimited signals
 lOMoARcPSD|274 654 54

Experiment No: 7
To Design and test BJT/FET Mixer

Apparatus Required:
Sl No Components Quantity
1 Transistor SL100 01
2 Resistors 47K, 10K, 470, 2.2K, 22K, 10KΩ 01
3 Capacitors: 1uF, 47uF, 4.7uF, 47uF, 0.01uF 01
4 Bread board Connecting wire -
5 CRO (40MHz), Signal generator(1MHz), DC supply(30V) -

Circuit Digram

Design
 lOMoARcPSD|274 654 54

Note : Choose coupling cpacitorsin such way that Reactance of coupling capacitors Xc1 and
Xc5 should be less than 15Ω

Tabular Column
Frequncy F1 in Hz Frequency F2 in Hz Output frequency ∆ f =f 1−f 2 in Hz
16Hz 14Hz
16Hz 13Hz
16Hz 12Hz
16Hz 11Hz
16Hz 10Hz
16 Hz 09Hz

Theory
In electronics, a mixer, or frequency mixer, is an electrical circuit that creates new frequencies
from two signals applied to it. In its most common application, two signals are applied to a mixer,
and it produces new signals at the sum and difference of the original frequencies. Active mixers
use an amplifying device (such as a transistor or vacuum tube) that may increase the strength of
the product signal. Active mixers improve isolation between the ports, but may have higher noise
and more power consumption. Mixers may also be classified by their topology:
An unbalanced mixer, in addition to producing a product signal, allows both input signals to pass
through and appear as components in the output.
A single balanced mixer is arranged with one of its inputs applied to a balanced (differential) circuit
so that either the local oscillator (LO) or signal input (RF) is suppressed at the output, but not both.
A double balanced mixer has both its inputs applied to differential circuits, so that neither of the
input signals and only the product signal appears at the output.[1] Double balanced mixers are
more complex and require higher drive levels than unbalanced and single balanced designs.
Procedure
1. Connections are made as shown in the circuit diagram.
2. Apply the input signals as mentioned in the circuit diagram.
3. Observe the output waveforms in CRO
4. Measure the output frequency, it has to be equal to ∆ f =f 1−f 2
5. Repeat the steps 3 and 4 by decreasing frequency of V2 in the step of 1KHz.
Result: Design and tested BJT frequency Mixer
 lOMoARcPSD|274 654 54

Experiment No: 8
To Design and test the Pulse width Modulation and Pulse Position Modulation.
Apparatus Required:
Sl No Components Quantity
1 Op-Amp µA741 02
2 555 Timer 01
3 Resistor, 10K, 10K,10K, 10K, 18K 01
4 Capacitor 0.1uF 01
5 Bread board , Connecting wire -
6 CRO (40MHz), Signal generator(1MHz), DC supply(30V) 01
7 Diode 1N4007 01

Circuit Diagram

Pulse width Modulation Circuit

Pulse Position Modulation Circuit

Design
Design of Summing amplifier for PWM and PPM

Assume R1=R2=Rf= 10KΩ because resistor value in

an op-amp adder circuit helps maintain high input
impedance, ensures unity gain for each input. Higher
input impedance is generally desirable because it
minimizes the loading effect on the input sources,
allowing them to deliver their signals with minimal distortion.
Design of 555 timer
Here 555 timer function as monostable multivibrator
we have T =1.1 RC =1.1 ×18 K ×0.01 μ=198 μSec
for Triggering circuit RiCi<<0.0016Tt, where Tt is
the time period of signal
choose Ri = 10K Ohms and Ci = 0.01uF

Waveform of PWM and PPM

Theory
Pulse width modulation (PWM) is a method of changing the duration of a pulse with respect to the
analog input. The duty cycle of a square wave is modulated to encode a specific analog signallevel.
The PWM signal is digital because at any given instant of time, the full DC supply is either ON or
OFF completely. one input of the comparator is fed by the input message or modulating signal and
the other input by a sawtooth signal which operates at carrier frequency. Considering both ±ve
sides, the maximum of the input signal should be less than that of sawtooth signal. The comparator
will compare the two signals together to generate the PWM signal at its output as shown in the
third waveform
The PWM pulses obtained at the comparator output are applied to a monostable multivibrator. The
monostable is negative edge triggered. Hence, corresponding to each trailing edge of PWM signal,
the monostable output goeshigh. It remains high for a fixed time decided by its own RC components.
Thus, as the trailing edges of the PWM signal keep shifting in proportion with the modulating signal
m(t), the PPM pulses also keep shifting, as shown in Waveform of PWM and PPM
Procedure
a. Make the connection as per Circuit diagram.
b. Set the M(t) = 2Vp and C(t) = 2Vp amplitudes using different signal generator.
c. Vary the frequency of M(t) =100 Hz and C(t) = 1KHz and adjust until we get proper output.
d. Observe the PWM output waveforms.
e. After getting PWM then the output of PWM is fed to triggering input of IC 555 timer to
result is PPM.
f. The output is taken at terminal 3 of timer 555 IC.
g. The wave is observed on CRO and Toff is noted during +Ve & -Ve peak of message signal
M(t).

Result: Verified the output of the Pulse width Modulation and Pulse Position Modulation circuits
using opamp and 555 timers.
 Experiment No: 9
To realize PLL Frequency Synthesizer

Apparatus Required:
Sl No Components Quantity
1 CRO, Function Generator, Breadboard 1
2 Resistance : 12K, 1
3 Capacitor: 0.001uF, 10uF and 0.01uF 1
4 RPS and connecting wires 1

Circuit Diagram

Nature of Graph and Pin Diagram

Theory
A frequency synthesizer is an electronic circuit used to generate precise and stable output
frequencies based on a reference frequency or multiple reference frequencies. It's widely used in
communication systems, radar systems, and various electronic devices.
A frequency synthesizer generates an output frequency by combining and manipulating the
frequency of one or more reference signals using various techniques such as phase-locked loops
(PLLs), direct digital synthesis (DDS), or fractional-N synthesis.
Initially, the PLL is unlocked, and the output frequency may differ from the reference frequency.
The phase detector compares the phases of the reference and output signals, generating an error
voltage proportional to the phase difference. The LPF filters and smoothes this error voltage to
provide a DC voltage that represents the frequency error. This voltage is then fed to the VCO,
which adjusts its frequency in response to minimize the phase error. As the loop continues to
operate, the PLL locks, maintaining a stable phase and frequency relationship between the
reference and output signals.
Procedure
1. Setup the circuit and observe the output at pin 4 or pin 5 and note down the VCO
frequency. It is the free running frequency f0 without any input signal.
2. Apply a signal input to pin 2 either a sine or square wave of 5 Vpp, 1 KHz and vary its
frequency from low to high and note down fc1 and fL2.
3. Decrease the input frequency from a high value to low value and note down fc2 and fL1
4. Mark the obtained value on straight line. calculate lock range fL = fL2 -fL1 and capture
range fc = fc2 – fc1.

Result: Free running frequency, f0 = Hz, Lock Range fL = Hz

Capture Range fc = Hz
 Experiment No: 10
PAM Multiplexer and Demultiplexer

Apparatus Required:

Circuit Diagram