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21CS403Notes 1

The document outlines the teaching practices for a Computer Organization and Architecture course at GMR Institute of Technology, detailing the course objectives, intended learning outcomes, and teaching methodologies. It covers key topics such as components of a computer system, instruction set architecture, micro-operations, and logical operations, providing a comprehensive overview of computer architecture concepts. The document also includes performance measures and classifications of instruction set architectures, emphasizing the importance of understanding these foundational elements in computer science education.

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0% found this document useful (0 votes)
8 views18 pages

21CS403Notes 1

The document outlines the teaching practices for a Computer Organization and Architecture course at GMR Institute of Technology, detailing the course objectives, intended learning outcomes, and teaching methodologies. It covers key topics such as components of a computer system, instruction set architecture, micro-operations, and logical operations, providing a comprehensive overview of computer architecture concepts. The document also includes performance measures and classifications of instruction set architectures, emphasizing the importance of understanding these foundational elements in computer science education.

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kalpananakka35
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© © All Rights Reserved
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GMR Institute of Technology

GMRIT/ADM/F-44
Rajam, AP REV.: 00
(An Autonomous Institution Affiliated to JNTUGV, AP)

Cohesive Teaching – Learning Practices (CTLP)

Class 4th Sem. – B. Tech Department: CSE/AIML/AIDS


Course Computer Organization and Architecture Course Code 21CS403
Prepared by Dr. K. Srividya, Ms. Santhoshini Sahu, Mrs. A Vineela, Mrs. A Bhavani, Mr. B. M.
Sreenivasa Rao
Lecture Topic Components of a computer system, performance measures, Instruction set
architecture, Representing instructions, Micro operations, Logical operations, Shift
operations
Course Outcome (s) CO1, CO2 Program Outcome (s) PO1, PO12
Duration 50 Min Lecture 1-6 Unit I
Pre-requisite (s) Digital Logic Design

1. Objective

❖ Understand the Computer Architecture and microoperations used in the architecture.

2. Intended Learning Outcomes (ILOs)

At the end of this session the students will be able to:

1. Summarize the components of the computer.


2. Understand the performance measures.
3. Understand how to classify the ISA.
4. Summarize what are instructions.
5. Summarize the usage of micro operations.

3. 2D Mapping of ILOs with Knowledge Dimension and Cognitive Learning Levels of RBT

Cognitive Learning Levels


Knowledge
Remember Understand Apply Analyse Evaluate Create
Dimension
Factual
Conceptual A,B, C
Procedural
Meta Cognitive

4. Teaching Methodology

❖ Power Point Presentation, Chalk Talk, visual presentation

5. Evocation
6. Deliverables

Lecture -1: Components of a computer system, performance measures


Computer systems consist of three components as shown in below image: Central Processing Unit,
Input devices and Output devices. Input devices provide data input to processor, which processes
data and generates useful information that’s displayed to the user through output devices. This is
stored in computer’s memory.

Central Processing Unit

The Central Processing Unit (CPU) is called "the brain of computer" as it controls operation of all
parts of computer. It consists of two components: Arithmetic Logic Unit (ALU), and Control Unit.
Arithmetic Logic Unit (ALU)

Data entered into computer is sent to RAM, from where it is then sent to ALU, where rest of data
processing takes place. All types of processing, such as comparisons, decision-making and
processing of non-numeric information takes place here and once again data is moved to RAM.

Control Unit

As name indicates, this part of CPU extracts instructions, performs execution, maintains and directs
operations of entire system.
Functions of Control Unit
Control unit performs following functions −

• It controls all activities of computer


• Supervises flow of data within CPU
• Directs flow of data within CPU
• Transfers data to Arithmetic and Logic Unit
• Transfers results to memory
• Fetches results from memory to output devices

Memory Unit

This is unit in which data and instructions given to computer as well as results given by computer
are stored. Unit of memory is "Byte".
1 Byte = 8 Bits

System Performance Measurement

There are three metrics for any system performance measure and these are Performance, Execution
Time and Thruput.

Total time taken for execution of a program = CPU Time + I/O Time + Others (like Queuing time
etc.) ... Eqn 7.1

Generally, Time taken to execute a program (maybe a standard program or application program) is a
thumb measure for System performance. This is said to be Execution time.
Performance = 1/Execution Time

Thruput is the measure of work done in a unit of time.

CPU Time
CPU Time is the time for which the CPU was busy executing the program under consideration i.e.
the CPU time utilized by the program to execute the instructions. We know that any program is
converted into a set of machine instructions executable by the CPU. The larger the program, more the
instructions, more the time taken by CPU. This is exactly why we need a standard program with
which a system or CPU is evaluated in addition to the target application program. Such a standard
program is known as Benchmark Program.

CPU Time in seconds (TCPU) = Number of Instructions in the program / average number of
instructions executed per second by the CPU. OR

Number of Instructions in the program x Average clock cycles per instructions x time per clock
cycle. This is written rhythmically as below.

CPU Time equation 2


Time per clock cycle = 1/ CPU clock frequency.

Lecture -2: Instruction set architecture

The ISA of a processor can be described using 5 catagories:

Operations

What operations the processor will perform. (eg. Integer Addition, Floating Point Addition,
Multiplication, String Comparison, etc)

Operand Storage in the CPU

Where are the operands kept other than in memory? (Register, Stack, Accumulator)

Operand location

Can any ALU instruction operand be located in memory? Or must all operands be kept internally in
the CPU? (Register-Memory, Memory-Memory, Register-Register architectures)

Number of explicit named operands

How many operands are there in a typical instruction. (Three, Two, One and Zero address
instructions)

Type and size of operands

What is the type and size of each operand and how is it specified? (Integer – 2 bytes, etc)

Classification of ISA (or) Types of ISA


Based on the internal storage of operands, the ISA can be classified as: Stack, Accumulator and
General Purpose Register Architecture.

Stack Architecture: The operands are implicitly on the top of the stack. It uses zero address
instruction for ALU operations.
E.g: ADD Top two elements of the stack are added and result is pushed back into the top
of the stack.
Advantage: Simple model with short instructions
Disadvantage: Hard to generate efficient code

Accumulator Architecture: One of the operand is implicitly in the Accumulator. It uses one address
instruction.
E.g: ADD B The content of memory location B is added with the content of Accumulator and
the result is stored back into the accumulator.
Advantage: Short instruction
Disadvantage: Since Accumulator is the only temporary storage, memory traffic is more
General Purpose Register Architecture: All the operands are explicitly mentioned, they are either
registers or memory locations.

Register – Register Architecture: Also called LOAD-STORE architecture where all the operands
are in the processor register. It uses three address instructions for ALU operations

ADD R1, R2, R3 ; R3 <- [R1] + [R2]

Advantages:
• Simple, fixed-length instructions
• The average CPI (cycles per instruction) is less and hence enables efficient pipelining
Disadvantages:
• More number of instructions
• Since it uses fixed length instructions, bit encoding may be wasteful for small instructions

Register – Memory Architecture: One of the operand is in memory and the other operand is in
register

ADD A, R1 ; R1 <- [A] + [R1]


A denotes memory location and R1 denotes register
Advantage: Easy to encode
Disadvantage: CPI varies based on operand location
Memory – Memory Architecture: All the operands are in the memory

ADD A, B, C ; C <- [A] + [B]

A and B denotes memory locations.


Advantages:
• Less instruction count
• Uses variable length instructions
Disadvantages:
• Average CPI is larger so pipelining is not very efficient
• Memory traffic is more

Classification of CPU Architecture based on the Internal Storage of Operands.

TOS : Top of Stack


The assembly code of C = A + B in all the above architectures is given below:

Stack Accumulator General Purpose Register Architecture


Architecture Architecture Register- Register Register-Memory Memory-
Memory
PUSH A LOAD A LOAD A, R1 LOAD A, R1 ADD A,B,C
PUSH B ADD B LOAD B,R2 ADD B,R2
ADD STORE C ADD R1,R2,R3 STORE R2,C
POP C STORE R3,C

Lecture -3: Representing instructions

➢ Representing Instruction:
Register is a very fast computer memory, used to store data/instruction in-execution.
A Register is a group of flip-flops with each flip-flop capable of storing one bit of information. An n-
bit register has a group of n flip-flops and is capable of storing binary information of n-bits.A register
consists of a group of flip-flops and gates. The flip-flops hold the binary information and gates control
when and how new information is transferred into a register. Various types of registers are available
commercially. The simplest register is one that consists of only flip-flops with no external gates.These
days registers are also implemented as a register file.

➢ Register Transfer Language

The symbolic notation used to describe the micro-operation transfers amongst registers is
called Register transfer language.The term register transfer means the availability of hardware
logic circuits that can perform a stated micro-operation and transfer the result of the operation to
the same or another register.The word language is borrowed from programmers who apply this
term to programming languages. This programming language is a procedure for writing symbols to
specify a given computational process.

Following are some commonly used registers:

1. Accumulator: This is the most common register, used to store data taken out from the
memory.

2. General Purpose Registers: This is used to store data intermediate results during program
execution. It can be accessed via assembly programming.

3. Special Purpose Registers: Users do not access these registers. These registers are for
Computer system,

o MAR: Memory Address Register are those registers that holds the address for
memory unit.

o MBR: Memory Buffer Register stores instruction and data received from the
memory and sent from the memory.

o PC: Program Counter points to the next instruction to be executed.

o IR: Instruction Register holds the instruction to be executed.

➢ Register Transfer

Information transferred from one register to another is designated in symbolic form by means of
replacement operator.

R2 ← R1

It denotes the transfer of the data from register R1 into R2.

Normally we want the transfer to occur only in predetermined control condition. This can be shown
by following if-then statement: if (P=1) then (R2 ← R1)

➢ Control Function:A control function is a Boolean variable that is equal to 1 or 0.


The control function is shown as:

P: R2 ← R1
The control condition is terminated with a colon. It shows that transfer operation can be executed
only if P=1.

Computer registers are high-speed memory storing units. It is an element of the computer processor.
It can carry any type of information including a bit sequence or single data.
A register should be 32 bits in length for a 32-bit instruction computer. Registers can be numbered
relies upon the processor design and language rules.
The instructions in a computer are saved in memory locations and implemented one after another at
a time. The function of the control unit is to fetch the instruction from the memory and implement it.
The control does the similar for all the instructions in the memory in sequential order.
A counter is needed to maintain a path of the next instruction to be implemented and evaluate its
address. The figure shows the registers with their memories. The memory addresses are saved in
multiple registers. These requirements certainly state the use for registers in a computer.

Lecture -4: Micro operations

➢ Micro-operations :
In computer central processing units, micro-operations (also known as micro-ops) are the functional
or atomic, operations of a processor. These are low level instructions used in some designs to
implement complex machine instructions. They generally perform operations on data stored in one
or more registers. They transfer data between registers or between external buses of the CPU, also
performs arithmetic and logical operations on registers.
In executing a program, operation of a computer consists of a sequence of instruction cycles, with
one machine instruction per cycle. Each instruction cycle is made up of a number of smaller units
– Fetch, Indirect, Execute and Interrupt cycles. Each of these cycles involves series of steps, each of
which involves the processor registers. These steps are referred as micro-operations. the prefix micro
refers to the fact that each of the step is very simple and accomplishes very little. Figure below depicts
the concept being discussed here.
Summary: Execution of a program consists of sequential execution of instructions. Each instruction
is executed during an instruction cycle made up of shorter sub-cycles(example – fetch, indirect,
execute, interrupt). The performance of each sub-cycle involves one or more shorter operations, that
is, micro-operations.
Add Micro-Operation
It is described by the following statement −
R3 → R1 + R2
The following statement instructs the information or contents of register R1 to be inserted to data or
content of register R2 and the sum must be converted to register R3.
Subtract Micro-Operation
Example −
R3 → R1 + R2' + 1
Subtract micro-operation are using minus operator we create 1's complement and add 1 to the
register which obtains subtracted, i.e R1 - R2 is similar to R3 → R1 + R2' + 1
Increment/Decrement Micro-Operation
In Increment and decrement micro-operations, it is usually implemented by adding and subtracting 1
to and from the register respectively.
R1 → R1 + 1
R1 → R1 – 1
The following table demonstrates the symbolic representation of several Arithmetic Micro-
operations.
The increment and decrement micro-operations are symbolized by plus one and minus-one
operations, respectively. These micro-operations are performed with a combinational circuit or with
a binary up-down counter.
The arithmetic operations of multiply and divide are not shown in the table. These two operations are
valid arithmetic operations but are not contained in the essential set of micro-operations.
In this case, the signals that implement these operations propagate by gates, and the result of the
operation can be transferred into a destination register through a clock pulse immediately after the
output signal propagates by the combinational circuit.
The multiplication operation is performed with a series of add and shift micro-operations. The
division is executed with a series of subtracting and shift micro-operations.

Lecture -5: Logical operations

➢ Logic operations
Logic operations are binary micro-operations implemented on the bits saved in the registers. These
operations treated each bit independently and create them as binary variables.
For example, the exclusive-OR micro-operation with the contents of two registers R1 and R2 is
denoted by the statement
P: R1←R1⊕⊕R2
It determines a logic micro-operation to be implemented on the single bits of the registers supported
that the control variable P = 1. Consider that each register has four bits. Let the content of R1 be 1010
and the content of R2 be 1100.
The exclusive-OR micro-operation stated above represent the following logic computation −
1010 Content of R1
1100 Content of R2
0110 Content of R1 after P = 1
The content of R1, after the implementation of the micro-operation, is similar to the bit-by-bit
exclusive-OR operation on pairs of bits in R2 and previous values of R1.
• Logic microoperations specify binary operations for strings of bits stored in registers.
• These operations consider each bit of the register separately and treat them as binary
variables.
• For example, the exclusive-OR microoperation with the contents of two registers R 1 and R2
is symbolized by the statement P: R1 ← R1 ⊕ R2
• It specifies a logic microoperation to be executed on the individual bits of the registers
provided that the control variable P = 1. As a numerical example, assume that each register
has four bits. Let the content of R1 be 1010 and the content of R2 be 1100.
• The exclusive-OR microoperation stated above symbolizes the following logic
computation:

• There are 16 different logic operations that can be performed with two binary variables.
• They can be determined from all possible truth tables obtained with two binary variables as
shown in Table below.

• In this table, each of the 16 columns F0 through F15 represents a truth table of one possible
Boolean function for the

two variables x and y.


Hardware Implementation
• The hardware implementation of logic rnicrooperations requires that logic gates be inserted
for each bit or pair of bits in the registers to perform the required logic function.
• Although there are 16 logic rnicrooperations, most computers use only four-AND, OR,
XOR (exclusive-OR), and complement from which all others can be derived.
• Figure below shows one stage of a circuit that generates the four basic logic rnicrooperations.
• It consists of four gates and a multiplexer. Each of the four logic operations is generated
through a gate that performs the required logic.
• The outputs of the gates are applied to the data inputs of the multiplexer. The two selection
inputs S1 and S0 choose one of the data inputs of the multiplexer and direct its value to the
output.
• The diagram shows one typical stage with subscript i. For a logic circuit with n bits, the
diagram must be repeated n times for i = 0, 1, 2, ... , n - 1.
• The selection variables are applied to all stages. The function table in Fig. below lists the
logic rnicrooperations obtained for each combination of the selection variables.

Some Applications
• Logic microoperations are very useful for manipulating individual bits or a portion of a word
stored in a register.
• They can be used to change bit values, delete a group of bits, or insert new bit values into a
register. The following examples show how the bits of one register (designated by A) are
manipulated
• by logic microoperations as a function of the bits of another register (designated by B).
• In a typical application, register A is a processor register and the bits of register B constitute
a logic operand extracted from memory and placed in register B.
• The selective-set operation sets to 1 the bits in register A where there are corresponding 1's
in register B. It does not affect bit positions that have 0's in B.
• The following numerical example clarifies this operation:

• The two leftmost bits of B are 1' s, so the corresponding bits of A are set to 1.
• One of these two bits was already set and the other has been changed from 0 to 1. The two
bits of A with corresponding 0' s in B remain unchanged. The example above serves as a truth
table since it has all four possible combinations of two binary variables.
• From the truth table we note that the bits of A after the operation are obtained from the
logic-OR operation of bits in B and previous values of A. Therefore, the OR rnicrooperation
can be used to selectively set bits of a register.
• The selective-complement operation complements bits in A where there are selective-clear
corresponding 1's in B. It does not affect bit positions that have 0's in B. For example:

• Again the two leftmost bits of B are 1's, so the corresponding bits of A are complemented.
• This example again can serve as a truth table from which one can deduce that the selective-
complement operation is just an exclusive-OR microoperation.
• Therefore, the exclusive-OR rnicrooperation can be used to selectively complement bits of a
register.
• The selective-clear operation clears to 0 the bits in A only where there are corresponding 1's
in B. For example:

• Again the two leftmost bits of B are 1' s, so the corresponding bits of A are cleared to 0.
• One can deduce that the Boolean operation performed on the individual bits is AB'. The
corresponding logic microoperation is A ← A ∧ B
• The mask operation is similar to the selective-clear operation except that the bits of A are
cleared only where there are corresponding 0's in B. The mask operation is an AND micro
operation as seen from the following numerical example:

The two rightmost bits of A are cleared because the corresponding bits of B are 0' s. The two
leftmost bits are left unchanged because the corresponding bits of B are 1's.
• The mask operation is more convenient to use than the selective clear operation because
most computers provide an AND instruction, and few provide an instruction that executes the
microoperation for selective-clear.
• The insert operation inserts a new value into a group of bits. This is done by first masking
the bits and then ORing them with the required value. For example, suppose that an A register
contains eight bits, 0110 1010.
• To replace the four leftmost bits by the value 1001 we first mask the four unwanted bits:

• and then insert the new value:

• The mask operation is an AND microoperation and the insert operation is an OR


microoperation.
• The clear operation compares the words in A and B and produces an all 0' s result if the two
numbers are equal. This operation is achieved by an exclusive-OR microoperation as shown
by the following example:

When A and B are equal, the two corresponding bits are either both 0 or both 1. In either
case the exclusive-OR operation produces a 0. The all-0's result is then checked to determine
if the two numbers were equal.

Lecture -6: Shift operations

➢ Shift Microoperations
• Shift microoperations are used for serial transfer of data. They are also used in conjunction
with arithmetic, logic, and other data-processing operations.
• The contents of a register can be shifted to the left or the right. At the same time that the bits
are shifted, the first flip-flop receives its binary information from the serial input.
• During a shift-left operation the serial input transfers a bit into the rightmost position.
• During a shift-right operation the serial input transfers a bit into the leftmost position.
• The information transferred through the serial input determines the type of shift.
• There are three types of shifts: logical, circular, and arithmetic.
• A logical shift is one that transfers 0 through the serial input. We will adopt the symbols shl
and shr for logical shift-left and shift-right microoperations. For example:
R1 ← shl R1
R2 &arr; shr R2
• are two microoperations that specify a 1-bit shift to the left of the content of register R 1 and
a 1-bit shift to the right of the content of register R2. The register symbol must be the same
on both sides of the arrow.
• The bit transferred to the end position through the serial input is assumed to be 0 during
a logical shift. The circular shift (also known as a rotate operation) circulates the bits of the
register around the two ends without loss of information.
• This is accomplished by connecting the serial output of the shift register to its serial input.
• We will use the symbols cil and cir for the circular shift left and right, respectively. The
symbolic notation for the shift rnicrooperations is shown in Table below.

• An arithmetic shift is a microoperation that shifts a signed binary number to the left or right.
An arithmetic shift-left multiplies a signed binary number by 2. An arithmetic shift-right
divides the number by 2.
• Arithmetic shifts must leave the sign bit unchanged because the sign of the number remains
the same

• when it is multiplied or divided by 2. The leftmost bit in a register holds the sign bit, and
the remaining bits hold the number. The sign bit is 0 for positive and I for negative. Negative
numbers are in 2's complement form.
• Figure above shows a typical register of n bits. Bit Rn-1 in the leftmost position holds the
sign bit. Rn-2 is the most significant bit of the number and R0 is the least significant bit.
• The arithmetic shift-right leaves the sign bit unchanged and shifts the number (including
the sign bit) to the right.
• Thus Rn-1 remains the same, Rn-2 receives the bit from Rn-1 and so on for the other bits in the
register. The bit in R0 is lost.
• The arithmetic shift-left inserts a 0 into R0, and shifts all other bits to the left. The initial bit
of Rn-1 is lost and replaced by the bit from Rn-2. A sign reversal occurs if the bit in Rn-1 changes
in value after the shift.
• This happens if the multiplication by 2 causes an overflow. An overflow occurs after an
arithmetic shift left if initially, before the shift, Rn-1 is not equal to Rn-2.
• An overflow flip-flop Vs, can be used to detect an arithmetic shift-left overflow. Vs = Rn-1 ⊕
Rn-2
• If Vs = 0, there is no overflow, but if Vs = 1, there is an overflow and a sign reversal after the
shift. Vs must be transferred into the overflow flip-flop with the same clock pulse that shifts
the register.
➢ Hardware Implementation
• A possible choice for a shift unit would be a bidirectional shift register with parallel load
• Information can be transferred to the register in parallel and then shifted to the right or left.
• In this type of configuration, a clock pulse is needed for loading the data into the register,
and another pulse is needed to initiate the shift.
• In a processor unit with many registers it is more efficient to implement the shift operation
with a combinational circuit.
• In this way the content of a register that has to be shifted is first placed onto a common bus
whose output is connected to the combinational shifter, and the shifted number is then loaded
back into the register.
• This requires only one clock pulse for loading the shifted value into the register.
• A combinational circuit shifter can be constructed with multiplexers as shown in Fig. below.
The 4-bit shifter has four data inputs, A0 through A3, and four data outputs, H0 through H3.
• There are two serial inputs, one for shift left

• (IL) and the other for shift right (IL). When the selection input S = 0, the input data are
shifted right (down in the diagram). When S = 1, the input data are shifted left (up in the
diagram). The function table in Fig. above shows which input goes to each output after the
shift.
• A shifter with n data inputs and outputs requires n multiplexers. The two serial inputs can
be controlled by another multiplexer to provide the three possible types of shifts.

7. Keywords

❖ Microoperation.
❖ Instruction
❖ ISA

8. Sample Questions

Remember:

1. Define Computer Organization.


2. Define Micro Operation.
3. What is ISA?
4. List types of Microoperations.

Understand

1. Explain the difference between CO and CA.


2. Explain the applications of logic microoperations.
3. Explain the hardware implementation of shift microoperations.

9. Stimulating Question (s)


1. -

10. Mind Map


11. Student Summary

At the end of this session, the facilitator (Teacher) shall randomly pick-up few students to
summarize the deliverables.

12. Reading Materials

13. Scope for Mini Project

NIL ---------------

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