CHAPTER 1 - Introduction to OP-AMP:

Basic introduction to block diagram of a typical op-amp

Basic introduction to equivalent circuit of the 741 op-amp,

Schematic symbol and 8 pin functions and power supply of op-amp.

The positive terminal of the input is called the “non-inverting” input and the negative
terminal is called the “inverting” input. They have their names according to the
functions performed by them.
Inverting Input: A positive voltage applied to this input terminal will lead to a negative
swing at the output.

Non-Inverting Input: A positive voltage applied to this input terminal will lead to a
positive swing at the output.

The output voltage is proportional to the difference of the input voltages and is given by

Vout ∝ (V+ – V–)

Vout = AOL (V+ – V–)

where, AOL is the open-loop gain of the amplifier.

Pin Diagram

IC-741 is a general-purpose op-amp. It is built of various resistors, capacitors and

transistor stages. Three main stages of a general-purpose op-amp are a differential
input stage, a push-pull output stage and an intermediate gain stage.

Ideally, the pin description can be divided into 4 broad categories:

Pin diagram of IC-741 is shown in the figure 4. This is a general-purpose operational

amplifier. It has a total of 8 pins.

Pin Description

» Pin4 & Pin7 (Power Supply): Pin7 is the positive voltage supply terminal and Pin4 is
the negative voltage supply terminal. The IC draws in power from these pins. The voltage
between these two pins lies between 5V and 18V.

» Pin6 (Output): This is the output pin for the IC. The voltage at this pin depends on the
input signal and the feedback mechanism used.

» Pin2 & Pin3 (Input): These are input pins. Pin2 is the inverting input and Pin3 is the
non-inverting input. If the voltage at inverting input is higher than non-inverting input,
the voltage at the output signal stays low. Likewise, if the voltage at the non-inverting
input is high, the output goes high.

» Pin1 & Pin5 (Offset Null): Because of high gain provided by Op-Amp, even slight
variations in voltages at the inverting and non-inverting inputs, caused due to
irregularities in the manufacturing process or external disturbances, will affect the
output. To nullify this effect, an offset voltage can be applied at pin1 and pin5 and is
typically done employing a potentiometer.

» Pin8 (N/C): This pin is not connected to any circuit inside 741 IC. It’s just a dummy
lead used to fill the void space in standard 8 pin packages.

The following are the basic specifications of 741 IC:

• Power Supply: needs a minimum voltage of 5V and might face up to 18V

• Input Impedance: ~2 MΩ
• Output impedance: ~75Ω
• Slew Rate: 0.5V/µs
• Maximum Output Current: 20mA
• Recommended Output Load: >2 kΩ
• Input Offset: Between 2mV and 6mV
• Voltage Gain: 200,000 for low frequencies

Open loop op-amp configuration, the differential amplifier, the inverting amplifier, the non-
inverting amplifier, positive saturation output, negative saturation output
Definition and explanation to the terms of op-amp as:- Input offset voltage, Input offset current, Input bias
current, Total output offset voltage, Thermal drift, Differential input resistor, Input capacitance, Offset
voltage adjustment range, Input voltage range, Common mode rejection ratio, Supply voltage rejection
ratio, Output voltage swing, Output resistance, Output short circuit current, Supply current, Slew Rate,
Average temperature coefficient of input offset voltage (and current), Long-term input offset voltage(and
current).

Total Output Offset Voltage: The output voltage when both inputs are grounded,
representing the combined effect of input offset voltage and other internal imbalances.
Thermal Drift

• The change in parameters like input offset voltage with temperature (°C).

• A measure of thermal instability.

Basic ideas about compensating network for offset voltages compensation, CMRR compensation, SVRR
compensation, Temperature compensation

1. Offset Voltage Compensation

Problem:

Input offset voltage (VOS) causes a non-zero output when both inputs are grounded.

Solution:

Offset nulling circuits or external potentiometers connected to specific pins (e.g.,

pins 1 and 5 in the 741 op-amp).

• Method:

o Connect a potentiometer across offset null pins.

o Wiper connected to negative supply.

o Adjust to cancel input offset voltage.

Internal implementation may include symmetrical resistors or transistors for

balance.
 2. Common-Mode Rejection Ratio (CMRR) Compensation

Problem:

CMRR is reduced due to mismatches in the differential input stage (e.g., differences in
transistor gains, resistor values).

Solution:

Use of matched transistor pairs and precision resistor networks.

• Techniques:

o Use laser-trimmed or diffused resistors for symmetry.

o Current mirrors to keep collector currents equal.

o Matched monolithic transistor pairs for balance.

Better matching → better CMRR (ideally > 90 dB).

3. Supply Voltage Rejection Ratio (SVRR/PSRR) Compensation

Problem:

Fluctuations in supply voltage affect the input offset voltage and output stability.

Solution:

Regulated bias circuits and power supply isolation.

• Techniques:

o Use of constant current sources (instead of resistors) for biasing.

o On-chip voltage regulators or bandgap references.

o Use of decoupling capacitors between supply rails and ground.

Improves PSRR, especially important in analog sensor circuits.

4. Temperature Compensation

Problem:

Temperature changes cause drift in offset voltage, bias current, and other parameters.
 Solution:

Design with temperature-compensating components and layouts.

• Techniques:

o Use thermally matched transistors on the same chip.

o Add temperature-dependent resistors (e.g., thermistors or PTAT

circuits).

o Implement differential pairs symmetrically to reduce thermal gradients.

o Use of feedback and calibration at the system level.

Reduces thermal drift and maintains long-term stability.

Summary Table (Optional for Notes)

Compensation Type Problem Solved Main Techniques Used

Offset Voltage Input offset causing non- Offset null pins, trimpots,
zero output internal balancing

CMRR Poor rejection of Matched transistors, precision

common-mode signals resistors, current mirrors

SVRR/PSRR Output affected by supply Current sources, internal

changes regulation, decoupling

Temperature Drift in parameters with Thermal symmetry, PTAT

Compensation temperature elements, feedback calibration