Scribd
Upload
89 views5 pages

CTS 04

This document defines and provides examples of different types of clock pins in clock tree synthesis: Non-stop pins trace through endpoints normally considered clock tree endpoints. Exclude pins are excluded from clock tree timing calculations and optimizations. Float pins have special insertion delay requirements and balancing is done according to macro modeling. Stop pins are used for delay balancing and are the endpoints used in clock tree calculations and optimizations. Don't touch sub-trees preserve existing clock tree portions by preventing optimizations on those sub-trees.

Uploaded by

divyang_p
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
89 views5 pages

CTS 04

This document defines and provides examples of different types of clock pins in clock tree synthesis: Non-stop pins trace through endpoints normally considered clock tree endpoints. Exclude pins are excluded from clock tree timing calculations and optimizations. Float pins have special insertion delay requirements and balancing is done according to macro modeling. Stop pins are used for delay balancing and are the endpoints used in clock tree calculations and optimizations. Don't touch sub-trees preserve existing clock tree portions by preventing optimizations on those sub-trees.

Uploaded by

divyang_p
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 5

Non- Stop Pin:

• Nonstop pins trace through the endpoints that are normally considered as
endpoints of the clock tree.
• Example :
– The clock pin of sequential cells driving generated clock are implicit non-stop
pins.
– Clock pin of ICG cells.
Exclude pin:
• Exclude pin are clock tree endpoints that are excluded from clock tree
timing calculation and optimization.
• The tool considers exclude pins only in calculation and optimizations for
design rule constraints.
• During CTS, the tool isolates exclude pins from the clock tree by inserting a
guide buffer before the pin.
Float Pin:
• Float pins are clock pins that have special
insertion delay requirements and balancing is
done according to the delay.[Macro
modeling].
Stop Pin:
• Stop pins are the endpoints of clock tree that are used for delay balancing.
• CTS, the tool uses stop pins in calculation & optimization for both DRC and
clock tree timing.
• Example:
– Clock sink are implicit stop pins.
Don’t Touch Sub-tree:
• If we want to preserve a portion of an existing clock tree, we put don’t touch
exception on the sub-tree
• CLK1 is the pre-existing clock and path 1 is optimized with respect to CLK1.
• CLK2 is the new generated clock. Don’t touch sub-tree attribute is set w.r.t C1.
• Example:
– If path1 is 300ps and path2 is 200ps, during balancing delay are added in
path2.
– If path1 is 200ps and path2 is 300ps, during balancing delay can’t be
added on path1 because on path1 don’t touch attribute is set and we get
violation.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy