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Presentation2 Chapter 9

Here are the key steps to solve this problem: 1) The MOSFET threshold voltage is given as 2 V. This means the gate-source voltage (VGS) must be at least 2 V for the MOSFET to turn fully on. 2) A gate voltage of +5 V is applied. 3) For the MOSFET to remain fully on, the most negative voltage that can appear at the source is VG - VTH = 5 V - 2 V = 3 V. 4) Therefore, the maximum signal voltage that can be switched without the MOSFET entering the triode region is 3 V. So in summary, with a gate voltage of +5 V and

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0% found this document useful (0 votes)
58 views21 pages

Presentation2 Chapter 9

Here are the key steps to solve this problem: 1) The MOSFET threshold voltage is given as 2 V. This means the gate-source voltage (VGS) must be at least 2 V for the MOSFET to turn fully on. 2) A gate voltage of +5 V is applied. 3) For the MOSFET to remain fully on, the most negative voltage that can appear at the source is VG - VTH = 5 V - 2 V = 3 V. 4) Therefore, the maximum signal voltage that can be switched without the MOSFET entering the triode region is 3 V. So in summary, with a gate voltage of +5 V and

Uploaded by

soethurein227
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PPTX, PDF, TXT or read online on Scribd
You are on page 1/ 21

MANDALAY TECHNOLOGICAL UNIVERSITY

DEPARTMENT OF ELECTRONIC ENGINEERING

CHAPTER 9

FET AMPLIFIERS AND SWITCHING CIRCUITS

The Class D Amplifier


MOSFET Analog Switching
MOSFET Digital Switching
DAW MYA SANDAR AUNG
LECTURER
The Cascode Amplifier

• A cascode amplifier is one in which a common-source


amplifier and a common-gate amplifier are connected in a
series arrangement as shown below. As noted from figure,
the input resistance (1/gm) for CG amplifier represent the
drain resistance Rd for CS amplifier
• „The cascode amplifier using JFETs provides a very high
input resistance and significantly reduces capacitive
effects to allow for operation at much higher frequencies,
used for RF (radio frequency), than a common-source
amplifier alone
• The voltage gain,
The input resistance to the cascade amplifier
Av  Av (CS ) Av (CG )  ( g m (CS ) Rd )( g m (CG ) X L ) is the input resistance to the CS stage.
1  VGS 
Av  ( g m (CS ) ( ))  g m (CG ) X L   g m (CG ) X L Rin  R3 / /  
g m (CG ) I
 GSS 
11/23/2023 DAW MYA SANDAR AUNG 2
The Class D Amplifier

MOSFETs are useful as class-D amplifiers, which are very efficient because they
operate as switching amplifiers. They use pulse width modulation, a process in which
the input signal is converted to a series of pulses. The pulse width varies
proportionally to the amplitude of the input signal.

Figure: Basic class D audio amplifier.

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Modulation

 Modulation is the process of converting data into radio waves by adding


information to an electronic or optical carrier signal. A carrier signal is one with
a steady waveform -- constant height, or amplitude, and frequency.

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Pulse-Width Modulation (PWM)

Pulse-width modulation is a process in which an input


signal is converted to a series of pulses with widths that
vary proportionally to the amplitude of the input signal.
Pulse width is wider for positive amplitude of signal and
narrow for negative amplitude of signal.
Where input is zero, output is square form.

Pulse-width modulated sine wave.

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 The pulse width modulation is normally generated with the use of comparator circuitry.
 There are 2 inputs and 1 output of comparator as shown in below figure.
 The input denoted as + is known as non inverting and the input denoted as ‘-‘ is called inverting input.

 If the voltage at inverting input is larger than the voltage at


non inverting input the comparator moves to its negative
saturated output condition.
 If the voltage on non-inverting input is larger than the voltage
at the inverting the comparator is switched to the positive
output saturated condition.
 Where 1 cycle of sine waveform is given at the non inverting
terminal and large frequency triangle shape wave is given to
the inverting

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Frequency Spectrum
All waves other than sine waveform are created with the harmonic frequency.
The frequency element of specific wave is known as spectrum.
When the triangle shape wave modulated the input sinusodial wave the resultant spectrum comprises
the sine waveform frequency f input with that fundamental frequency of triangle modulating wave f m
and harmonic frequency over the fundamental frequency.
These harmonic frequencies are due to rise and fall time of pulse width modulation signal and flat
regions among the signal pulses.
In below figure simplified frequency spectrum of pulse width modulation signal is shown.
The frequency of triangular waveform should be larger than the largest input signal frequency so
that the less frequency harmonic is over the range of input signal frequency.

11/23/2023 DAW MYA SANDAR AUNG Frequency spectrum of a PWM signal 7


The Complementary MOSFET Stage
The MOSFETs are configured in common source complementary arrangement to give power gain.
Every transistor changes condition among on and off state when one transistor is on other will be
off. It shown in below figure.
When transistor is operating or on then voltage about is less so very less power drop even if it has
large current.
When transistor is off current is not flowing through it and zero power dissipation.
The power dissipation occur in transistor for less switching time.
Power given to the load can be large since load have a voltage it almost equal to the voltage of
supply and large current flow through it.

Complementary MOSFETs operating


11/23/2023 DAW MYA SANDAR AUNG
as switches to amplify power. 8
Efficiency

• Efficiency When Q1 is on, it is providing current to the load. However, ideally the
voltage across it is zero so the internal power dissipated by Q1 is
• PDQ = VQ1IL = (0 V)IL = 0 W
• At the same time, Q2 is off and the current through it is zero, so the internal power is
• PDQ = VQ2IL = VQ2(0 A) = 0 W
• Ideally, the output power to the load is 2VQ IL. The maximum ideal efficiency,
Pout Pout 2VQ I L
max    1
Pin Pout  PDQ 2VQ I L  0W
• As a percentage, hmax = 100%.

11/23/2023 DAW MYA SANDAR AUNG 9


Low-Pass Filter

The function of low pass filter is that it eliminates the modulating frequency and
harmonics and allow to pass original signal to the output.
The filter has bandwidth which passes only the input signal frequency as shown in
below figure.

The low-pass filter removes all but


11/23/2023
the input signal frequency from the
DAW MYA SANDAR AUNG 10
PWM signal.
Signal Flow

A small audio signal is applied and pulse-width modulated to produce a PWM signal
at the output of the modulator where voltage gain is achieved.
 The PWM drives the complementary MOSFET stage to achieve power
amplification. The PWM signal is filtered and the amplified audio signal appears on
the output with sufficient power to drive a speaker.

11/23/2023
Signal flow in a class D amplifier.
DAW MYA SANDAR AUNG 11
MOSFET Analogue Switching

 MOSFETs are widely used in analog and digital switching applications.


 Generally, they exhibit very low on-resistance, very high off-resistance, and fast switching times.

MOSFET Switching Operation


 E-MOSFETs are generally used for switching applications:
 When < MOSFET is off very high
 When > MOSFET is on very low ( must be sufficiently higher than to be in the upper end of load
line in the Ohmic region)

Switching operation on the load line


11/23/2023 12
DAW MYA SANDAR AUNG
MOSFET Switching Operation

 n-channel E-MOSFET operation as a switch


 is + V switch on
 is 0 switch off

 p-channel E-MOSFET operation as a switch


 is 0 switch on
 is +V switch off

The MOSFET as a switch.


11/23/2023 DAW MYA SANDAR AUNG 13
The analogue switch
 A basic n-channel MOSFET analog switch is shown in the figure.
 The signal at the drain is connected to the source when the MOSFET is turned on by a positive and is
disconnected when is 0, as indicated.

Operation of an n-channel MOSFET


analog switch.

 Variable voltage at the source cause variation in VGS VGS


must be ≥ to keep MOSFET maintain conduction (on).
 Minimum voltage occurs at –ve peak voltage of the output
())

𝑉 𝐺𝑆 =𝑉 𝐺 −𝑉 𝑝(𝑜𝑢𝑡 ) ≥ 𝑉 𝐺𝑆( 𝑡h)


Signal amplitude is limited by .

11/23/2023 DAW MYA SANDAR AUNG 14


Example 9-13 A certain analog switch similar to the one shown in Figure 9–31 uses an n-channel MOSFET with 2
V. A voltage of +5 V is applied at the gate to turn the switch on. Determine the maximum peak-to-
peak input signal that can be applied, assuming no voltage drop across the switch.

Solution
The difference between the gate voltage and the negative peak of the signal voltage must equal or
exceed the threshold voltage. For maximum .
𝑉 𝐺 −𝑉 𝑝 ( 𝑜𝑢𝑡 ) =𝑉 𝐺𝑆 ( 𝑡h )

𝑉 𝑝(𝑜𝑢𝑡 )=𝑉 𝐺 −𝑉 𝐺𝑆 (𝑡h )=5 𝑉 − 2 𝑉 =3 𝑉


𝑉 𝑝𝑝(𝑖𝑛)=2𝑉 𝑝(𝑜𝑢𝑡 )=2 ( 3 𝑉 ) =6 𝑉

11/23/2023 DAW MYA SANDAR AUNG 15


Analog Switch Applications
Sampling Circuit
 Use in analog-to-digital conversion.
 use in a sample-and-hold circuit to sample the input
signal at a certain rate.
 The minimum sampling frequency is called the
Nyquist frequency.

Switched-Capacitor Circuit: where switch


MOSFETs with a capacitor can be used to
replace a resistor Analogue multiplexer: two or more signals are to be routed to the same
11/23/2023 DAW MYA SANDAR AUNG 16
output
Example 9-14 An analog switch is used to sample an audio signal with a maximum frequency of 8 kHz. Determine the
minimum frequency of the pulses applied to the MOSFET gate.

Solution

𝑓 𝑠𝑎𝑚𝑝𝑙𝑒(𝑚𝑖𝑛) > 2 𝑓 𝑠𝑖𝑔𝑛𝑎𝑙(𝑚𝑎𝑥) =2 ( 8 𝑘𝐻𝑧 )=16 𝑘𝐻𝑧


The sampling frequency must be greater than 16 kHz.

11/23/2023 DAW MYA SANDAR AUNG 17


MOSFET DIGITAL SWITCHING
 MOSFETs are also used in switching applications in digital integrated circuits.

CMOS (Complementary MOS)


 CMOS combines n-channel and/or p-channel E-MOSFETs in a series arrangement.
 The shown figure represent a logic Inverter Gate.

CMOS inverter operation


a) can be 0 or 1 b) = 0 on and c) = + off
(+) is the off =+ and on =0
inverse
11/23/2023 DAW MYA SANDAR AUNG 18
CMOS (Complementary MOS): NAND Gate

CMOS NAND gate operation.

 Two additional MOSFETs and a second input are added to the CMOS pair to create a digital circuit
known as a NAND gate.
 When AND are high , the output is low; otherwise, the output is high.
11/23/2023 DAW MYA SANDAR AUNG 19
CMOS (Complementary MOS): NOR Gate

CMOS NOR gate operation.


 Two additional MOSFETs and a second input are added to the CMOS pair to create a digital circuit known
as a NOR gate.
 When OR both are high, the output is low; otherwise, the output is high.

11/23/2023 DAW MYA SANDAR AUNG 20


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