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 Why study The Intel 8086 Microprocessor

 The 8086’s architecture
 The 8086’s/8088’s registers
 The 8086’s memory management
 The 8086’s Assembly Program Structure
 The 8086’s addressing mode

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 1
 Memory Organization
 The 1MB memory of the 8086 is organized as follows:
FFFFF
 The operating system is located starting Rom BIOS
from address 0000 A0000
 After OS, the Residents programs installed
by the OS is located
 The last area of the memory from address
Applications
A0000 to FFFFF is reserved for the ROM
BIOS
 ROM BIOS usually contains the startup
program that enable the computer to boot- Residents
up probably Programs
 The remaining area is free for user’s
applications Operating System
00000

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 2
 Memory Segmentation
 Two types of memory organizations are commonly used
 Linear Addressing  Segmented Addressing
 In Linear addressing the whole memory is available as one linear array
 In Segmented addressing, memory space is divided into segments where
only one segment can be accessed at a time
Segmented Addressing Linear Addressing
FFFFF FFFFF
PC size can be
Segment
less
3 then 20
where it only
PC must have
addresses part
Segment 20 bits to
of the
2 memory address the
entire memory
Segment
1
PC

Segment
0
Chapter 3 : The Intel 8086 Microprocessor 00000 PC
Dr. Tarek ALthami CCSE YANBU 00000
3
 8086 Memory Segmentation
 The total memory “1 MB” is divided into 64 kb segments
 Each segment is addressed by one of the segment registers
 The 16-bit contents of the segment register gives the starting/base address
of a particular segment
 Another part called offset-address is used to address a byte within the
selected segment
 The offset address is also 16-bit wide, so it can select one byte out of bytes
(64KB)
 The offset address can be one of the index/pointer registers
 In 8086, an address is presented always in the form [segment : offset]

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 4
 Accessible memory by the 8086
FFFF:FFFF
 At a given moment, the 8086 has
access to four segments whose
addresses are in the segment registers Extra ES:DI
CS, DS, ES and SS. Segmen OFFSET = DI
t
ES:0000
 The code segment contains the program
instructions Stack SS:SP
Segmen OFFSET = SP
 The data segment contains the data t SS:0000
manipulated by the program

 The stack segment Data DS:SI

contains the
Segmen OFFSET = SI
backup stack t
DS:0000
 The extra segment ES may also contain
Code CS:IP
additional data Segmen OFFSET = IP
t
CS:0000
00000H
Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 5
 Rules of 8086 Memory Segmentation
 The four segments can overlap for small programs
 In a minimum system all segments can start at address 0000H
 The segment can start at any memory address divisible by 16
FFFF:FFFF

ES:DI
SS:SP
DS:SI
CS:IP
ES SP DS CS 0000:0000
Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 6
 Advantages of Memory Segmentation

 It allows the addressing of 1MB memory with only 16-bit registers

 It facilitates the use of separate memory areas of code, data and
stack
 It permits a program or its data to be put in different areas of
memory, each time the program is executed
 Program can be relocated which is a very useful feature for
multiprogramming

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 7
 How does 8086 generate 20-bit address?
 Consider that :
 Left shifting one hex digit of (SR)
 Performs the addition of two registers
 Send the physical address on the address bus of 20 bits

S3 S32 S21 S10 S00 Segment 2 0 0 0 0 Segment

+ O3 O2 O1 O0 Offset + 0 3 5 0 Offset

S3 Y3 Y2 Y1 O 0 Physical Address 2 0 3 5 0 Physical Address

This technique called memory segmentation

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 8
 How does 8086 generate 20-bit address?
 An address as a 20-bit quantity (5 hex digits) is called the physical address
because it is the actually value sent on the address bus A0 - A19
 The physical address is calculated by the expression:
FFFFF
𝒑𝒉𝒚𝒔𝒊𝒄𝒂𝒍 𝒂𝒅𝒅𝒓𝒆𝒔𝒔=𝟏𝟔× 𝒔𝒆𝒈𝒎𝒆𝒏𝒕+𝒐𝒇𝒇𝒔𝒆𝒕
16 bits 4 bits 2FFFF
Segment 0000

kB
64
20 bits
20000
+ Offset
16 bits

Physical address
20 bits 00020
00010
Note : inject 4 zeros ≡ multiplication by 2 = 16 4
00000
Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 9
 Segment Starts every 16-Bytes
left shifting of 1 hex digit the Segment register
Bit : 11-15 Bit : 8-11 Bit : 4-7 Bit : 0-3 Offset 4 Segment starting
bits
0000 0000 0000 0000 0000 0
0000 0000 0000 0001 0000 16
 1 MB of addressable 0000 0000 0000 0010 0000 32
memory, divided into 0000 0000 0000 0011 0000 48
segments of 64 KB (216) 0000 0000 0000 0100 0000 64
0000 0000 0000 0101 0000 80
 A segment starting
every 16 bytes because 0000 0000 0000 1111 0000 240
of offset 4-bits 0000 0000 0001 0000 0000 256
0000 0000 0001 0001 0000 272
 We can place a
segment anywhere in 0000 0000 0001 1111 0000 496
the memory every 16 0000 0000 0010 0000 0000 512
bytes, then access at 0000 0000 0010 00001 0000 528
64 kb space from the
segments position 0111 1111 1111 1111 0000 1048560
1111 1111 1111 1111 0000 1048575

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 10
 Overlap of Segments
 Areas allocated to segments can overlap.
 The only rule when selecting a segment is the hex LSD is zero.
 So we can begin a segment every 16 bytes
0000:FFFF

F0FFF E100:FFFF
EFFFF E000:FFFF

Overla
E1000 E100:0000
p
E0000 E000:0000

0000:0000
 We can address the same physical address 00105 with various
[segment : offset] combinations (0010:0005, 0000:0105, 0002:00E5 )

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 11
 Your Turn (Example)

What physical address corresponds to logical address 028F:0030?

Solution: 028F0 + 0030 = 02920 (hex)

Always use hexadecimal notation for addresses

What logical address corresponds to the physical address

28F30h?

Many different segment: offset (logical) addresses can produce

the same physical address 28F30h. Examples:
28F3:0000, 28F2:0010, 28F0:0030, 28B0:0430, . . .

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 12
 Accessible memory by the 8086

 The CS register is associated with the instruction pointer IP, and the next
instruction to run is at the logical address CS: IP
 The segment registers DS and ES may be associated with an index
register.
 Example: DS:SI, ES:DI.
 The DS/ES segments allow the processor to fetch data stored at an
address.
 The stack segment register may be associated with the pointer registers:
SS: SP or SS: BP

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 13
 Initial Values of Segment Registers
 Contents of registers after a RESET of the microprocessor:
 IP = 0000H
 CS = FFFFH
 DS = 0000H
 ES = 0000H
 SS = 0000H
 Since CS contains the value FFFFH and IP the value 0000H,
the first instruction executed by 8086 is at the logical address
FFFFH:0000H, corresponding to the physical address FFFF0H
(bootstrap loader)
 This statement is typically a jump to the main program that
start up the computer and initializes other segment registers

Chapter 3 : The Intel 8086 Microprocessor Dr. Tarek ALthami CCSE YANBU 14