Chapter 2
Chapter 2
Selective-complement
In a selective complement operation, the bit pattern in B is used to complement
certain bits in A. If a bit in B is set to 1, that same position in A gets
complemented from its original value, otherwise it is unchanged.
Selective-clear
In a selective clear operation, the bit pattern in B is used to clear certain bits in
A. If a bit in B is set to 1, that same position in A gets set to 0, otherwise it is
unchanged.
Mask Operation
In a mask operation, the bit pattern in B is used to clear certain bits in A. If a
bit in B is set to 0, that same position in A gets set to 0, otherwise it is
unchanged.
Clear Operation
In a clear operation, if the bits in the same position in A and B are the same,
they are cleared in A, otherwise they are set in A.
Insert Operation
An insert operation is used to introduce a specific bit pattern into A register,
leaving the other bit positions unchanged. This is done as mask operation to
clear the desired bit positions, followed by An OR operation to introduce the
new bits into the desired positions
Example
» Suppose you wanted to introduce 1010 into the low order four
bits of A:
1101 1000 1011 0001 (Original)
1101 1000 1011 1010 (Desired)
2.4 Shift Microoperation
• The operation that changes the adjacent bit position of the
binary values stored in the register is known as shift
microoperation. They are used for serial transfer of data. The
shift microoperations are classified into 3 types:
1. Logical Shift
2. Circular Shift
3. Arithmetic Shift
1. Logical
Shift: A logical shift is the one that transfers 0 through the serial
input. In RTL, following notation is used
- shr for logical shift right (R3 shr R3)
- shl for logical shift left (R4 shl R4)
Example
44 = 01000101
shr = 00100010
shl = 10001010
2. Circular Shift:
Circular shift circulates the bits of the register around the two ends
without the loss of information. It is also known as rotate operation.
Example
00101100
cir =
00010110
cil =
01011000
3. Arithmetic Shift Operation
An arithmetic shift is meant for signed binary numbers
(integer). An arithmetic left shift multiplies a signed number by
two and an arithmetic right shift divides a signed number by two.
The main distinction of an arithmetic shift is that it must keep the
sign of the number the same as it performs the multiplication or
division.
a. Arithmetic Shift Right:
It leaves the signed bit unchanged and shifts the number
including the signed bit to the right.
Eg: 10110010
ashr : 11011001
b. Arithmetic Shift Left:
It inserts a 0 into last bit and shifts all other bits to the left.
The initial bit is lost.
Eg: 10110100
ashl : 01101000
Overflow Case during arithmetic shift
left
Hardware Implementation of shift
microoperations
A combinational circuit shifter can be constructed with multiplexers as shown below:
Arithmetic Logic Shift Unit
• Arithmetic logic shift unit is a digital circuit that performs
arithmetic calculations, logical manipulation and shift
operation. It is often abbreviated as ALU. The above figure
shows the one stage of arithmetic logic shift unit.
• The block diagram of ALU includes one stage of arithmetic
circuit, one stage of logic circuit and one 4*1 multiplexer. The
subscript i designates a typical stage.
• Inputs Ai and Bi are applied to both the arithmetic and logic
units. A particular microoperation is selected with inputs S1
and S0. A 4*1 MUX selects the final output. The two inputs of
the MUX are received from the output of the arithmetic circuit
and logic circuit. The other two is Ai-1 for the shift-right
operation and Ai+1 for the shift left operation. The circuit is
repeated n times for n-bit ALU. The output carry Ci+1 is
connected to the input carry Cin. In every stage the circuit
specifies 8 arithmetic operations, 4 logical operations and 2
shift operations, where each operation is selected by the five
variables S3, S2, S1, S0 and Cin.
• The operations of ALU can be summarized in table below:
Three State Buffer
A three state gate is a digital circuit that exhibits three state. Two
of the states are signed equivalent to logic 1 and 0 as in a
conventional gate. The third state is a high impedance state. The
high impedance state behaves likes an open circuit which means
that the output is disconnected and does not have a logic
significance.
Three state gate may perform any conventional logic such
as AND or NAND. However, the most commonly used in the
design of bus system is the buffer gate,
Numerical
Numerical
SOLUTION: