8085 MICROPROCESSOR

ARCHITECTURE

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8085 MICROPROCESSOR
ARCHITECTURE
Accumulator
Arithmetic and logic Unit
General purpose register
Program counter
Stack pointer
Temporary register
Flags
Instruction register and Decoder
Timing and Control unit
Interrupt control
Serial Input/output control
Address buffer and Address-Data 3

buffer
Address bus and Data bus
Incrementer/Decrementer Address
INTEL 8085 CPU BLOCK
DIAGRAM

AL
U

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 Registers
The 8085 has 6 general purpose registers to
store 8-bit data during program execution.
These 6 registers are identified as B, C, D, E,
H and L.
They can be combined as register pairs BC,
DE and HL to perform some 16-bit operations.
These registers are programmable. It can use
to load or transfer data from the registers by 5

using instructions.
 Accumulator

 The accumulator (A) is an 8-bit register that is part of

ALU.
 It is used to store 8-bit data and to perform ALU
operations.
 The result of an operation is stored in Accumulator.
 The Accumulator is identified as register A.
 The data on which operations is to be performed is
operand. One of the operands must be Accumulator. 6
 3.Special REGISTERS
Purpose
Registers

Instruction Accumulator (A) (8) Flags (F) (8)

Registers
B (8) C (8)
1.General
Purpose D (8) E (8)
Registers H (8) L (8)
Program Counter (16) 4.Sixtee
n Bit
Stack Pointer (16) Register
s
16 8
Data
Addres
s
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2.Temporary Registers
(Temp Data, W & Z)
GENERAL PURPOSE
REGISTERS
Six general purpose 8-bit registers: B, C, D,

E, H, L
Data Pointer or
They can also be combined as register pairs
Memory Pointer to
(M)
perform

16-bit operations: BC, DE, HL

B (8) C (8)
Registers are programmable
16 (Data load,
High
Low order
order
register Move etc.) register

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 TEMPORARY
REGISTERS
TEMPORARY DATA REGISTER
THE ALU HAS TWO INPUTS. ONE IS ACCUMULATOR &
OTHER FROM TEMP DATA REGISTER
First B is
EX : ADD B  ( A A+B ) transferred
to Temp
 W & Z (16) then add
with A
EX : CALL, XCHG ( HL  DE)
NOTE

First DE
transferred to 9
The programmer WZ then
Can not access this exchange with
temp Registers HL
SPECIAL PURPOSE
REGISTERS
1.Accumulator (A)
 Single 8-bit register that is part of the
ALU
 Used in
Arithmetic/logic operations
Load
store
As well as I/O operation

2. Instruction Registers
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 SPECIAL PURPOSE
REGISTERS
3.FLAG
S Z AC P CY

S = After the execution of an arithmetic operation, if bit 7

of the
result is 1, then sign flag is set. ( 1 Negative 0
Positive)
Z = Bit is set if ALU operation results a zero in the
Accumulator 11

 AC = Bit is set, when a carry is generated by bit 3 & passed

on bit 4.
 Program Counter (PC)
This 16-bit register deals with sequencing the execution of
instructions.
This register is a memory pointer. Memory locations have 16-
bit address.
The microprocessor uses this register to sequence the
execution of the instructions.
The function of the program counter is to point to the memory
address from which the next byte is to be fetched.
When a byte is being fetched, the program counter is
automatically incremented by one to point to the next memory
location. 12
 Stack Pointer
(SP)
The stack pointer is also a 16-bit register, used
as a memory pointer.
It points to a memory location in R/W memory,
called stack.
The beginning of the stack is defined by loading
16- bit address in the stack pointer.

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PROGRAM COUNTER &
STACK POINTER
PC ACTS AS A POINTER TO THE NEXT INSTRUCTION DEPENDS ON
UPON NATURE OF INSTRUCTION ( 1 OR 2 OR 3 BYTES)

PC AUTOMATICALLY INCREMENTS TO POINT TO THE NEXT

MEMORY DURING THE EXECUTION OF THE PRESENT INSTRUCTION.

( IN JUMP OR CALL , PC CHANGES TO ADDRESS OF SUBPROGRAM)

STACK IS RESERVED AREA OF THE MEMORY

( TEMPORARY INFORMATION STORAGE - LIFO ALGORITHM)

AFTER EVERY STACK OPERATION SP POINTS TO NEXT AVAILABLE

LOCATION OF THE STACK (RECENT ENTRY)

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ALU (ARITHMETIC & LOGIC
UNIT)
To perform arithmetic operations like
Addition & Subtraction

 To perform logical operations like

AND
OR
NOT (Complement)
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Instruction Register & Decoder

The processor first fetches the opcode of

instruction from memory & stores opcode in the
instructions registers , it is then sent to
instruction decoder

The Instruction decoder decodes the it &

accordingly gives for further processing
depending on nature of instructions 16
 ADDRESS BUFFER &
ADDRESS/DATA BUFFER
ADDRESS BUFFER
8 BIT UNIDIRECTIONAL BUFFER
THE ADDRESS BITS ARE ALWAYS SENT FROM THE MPU TO PERIPHERAL
DEVICES, NOT REVERSE
USED TO DRIVE EXTERNAL HIGH ORDER ADDRESS BUS (A8-A15)

ADDRESS BUFFER & ADDRESS/DATA BUFFER

8 BIT BIDIRECTIONAL BUFFER
THE DATA BITS ARE SENT FROM THE MPU TO PERIPHERAL DEVICES, AS
WELL AS FROM THE PERIPHERAL DEVICES TO THE MPU
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USED TO DRIVE MULTIPLEXED ADDRESS/DATA BUS
I.E LOW ORDER ADDRESS BUS (A0-A7) & DATA BUS (D0-D7)
Bus: A shared group of wires used for communicating signals among
devices

•Address Bus : The device and the location within the

device that is being accessed
Total 216 = 65,536 (64k) Memory
Locations
Address Locations: 0000H– FFFFH
• Data Bus : The data value being communicated
Data Range: 00H – FFH
• Control Bus : Describes the action on the address & data
buses

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INCREMENTER/
DECREMENTER ADDRESS
LATCH
THIS 16 BIT REGISTER IS USED TO
INCREMENT OR
DECREMENT THE CONTENTS OF THE
PC OR SP AS A
PART OF EXECUTION INSTRUCTIONS
RELATED TO THEM 19
INTERRUPT CONTROL
When the Microprocessor receives an interrupt
signal, it suspends the currently executing program
and jumps to ( Special Routine or Sub program) an
Interrupt Service Routine (ISR) to respond to the
incoming interrupt
 Five Interrupt inputs & one
Acknowledge signal

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INTA
SERIAL I/O CONTROL
IT PROVIDES TWO LINES SOD & SID FOR
SERIAL COMMUNICATION
1.SOD (SERIAL OUTPUT DATA)
USED TO SEND DATA SERIALLY
2.SID (SERIAL INPUT DATA)
USED TO RECEIVE DATA SERIALLY

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 TIMING & CONTROL
/CIRCUITRY
TIMING AND CONTROL UNIT IS A VERY
IMPORTANT UNIT AS IT SYNCHRONIZES THE
REGISTERS AND FLOW OF DATA THROUGH
VARIOUS REGISTERS AND OTHER UNITS

CONTROL SIGNALS : READY, RD, WR, ALE

STATUS SIGNALS : S0, S1, IO/ M
DMA SIGNALS : HOLD, HLDA
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RESET SIGNALS : RESET IN, RESET OUT

INTEL 8085
PIN 808
CONFIGURATI 5

ON

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CLASSIFICATIONS OF
PINS
8085 has 40 PIN IC
1. POWER SUPPLY & FREQUENCY Signals
2. DATA Bus & ADDRESS Bus
3. CONTROL & STATUS Signals
4. INTERRUPT Signals
5. SERIAL I/O Signals
6. DMA Signals
7. RESET Signals

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808
5

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 POWER SUPPLY &
FREQUENCY SIGNALS
• VCC : +5 Power Supply
• Vss : Ground Reference
• X1 and X2 : Determine the Clock
Frequency
• CLOCK OUT : Half the crystal or
Oscillator Frequency (Used
as a system clock for other
devices) +5 V 8085

X1 CLK 3
6
OUT MHz
MHz
X2 26
GND
 DATA BUS & ADDRESS BUS
8085 μp consists of 16pins use as Address Bus & 8 pins use
as
Data Bus

Divide into 2 part : A8 – A15 (Upper)

: AD0 – AD7 (Lower)

A8 – A15 : Unidirectional, known as ‘High Order Address’

AD0 – AD7 : Bidirectional and Dual purpose
(Address and Data are Multiplexed)
A0– A7  Low Order Address
D0 – D7  Data Bus

The method to change from address bus to data bus

known
as “Bus Multiplexing”
Multiplexing (Adv : Reduces the Number of Pins)
High -order Address Bus( 8
bits)

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Low -order Address Bus(8 bits) & Data Bus(8
bits)

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CONTROL & STATUS
SIGNALS
ALE : ADDRESS LATCH ENABLE
RD & WR : READ & WRITE OPERATION
IO/M : I/O OPERATION OR MEMORY OPERATION
S0 & S 1 : MACHINE CYCLE PROGRESS
READY : PERIPHERAL IS READY OR NOT FOR
DATA
TRANSFER
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808
5

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ALE USED TO DEMULTIPLEX
ADDRESS/DATA BUS
ALE –Active high output used to latch
the
lower 8 address bits A0 – A7

A8-A15

ALE

808 AD7-AD0 Latch

A0- A7
5

D7- D0

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 CONTROL & STATUS
SIGNALS
RD (Active low) To indicate that the I/O or memory
selected is to be read and data are available on the bus

WR (Active low ) This is to indicate that the data

available on the bus are to be written to memory or I/O

IO/M  To differentiate I/O or memory operations

‘0’ - indicates a memory operation
‘1’-indicates an I/O operation

S0 & S1  Status signals, similar to IO/M

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 IO/M MEMR

IOWR
RD

8085
MEMWR

WR
IOWR

RD WR IO/M Operation
Never Exists
0 0 0 (RD,WR do not go low
-
0 0 1 simultaneously) -
0 1 0 Memory Read MEMR
0 1 1 I/O Device Read IOR
1 0 0 Memory Write MEMW
1 0 1 I/O Device Write IOW
1 1 0 - -
1 1 1 - - 34
35
INTERRUPT & DMA SIGNALS

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808
5

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 SERIAL I/O CONTROL
SID (SERIAL INPUT DATA)
USED TO RECEIVE OR ACCEPT DATA SERIALLY BIT BY
BIT FROM THE EXTERNAL DEVICE

SOD (SERIAL OUTPUT DATA)

USED TO TRANSMIT OR SEND DATA SERIALLY BIT BY
BIT TO THE EXTERNAL DEVICE

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808
5

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 RESET SIGNALS
RESET IN an active low input signal
1.Set Program Counter to Zero PC=0000H(μp will reset)
2.Reset interrupt & HLDA Flip-flops
3.Tri states the address, data &control bus
4. Affects the contents of internal registers randomly

RESET OUT to indicate that the μp was reset (RESET IN =0 )

It also used to reset external devices.

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