Boolean Algebra

Logic and Digital System Design - CS 303

Erkay Savaş
Sabanci University

1
 Boolean Algebra
• Algebra: A deductive mathematical system
1. set of elements
2. set of operators
3. Number of unproved axioms (postulates)
• Set of elements
– a set with countable number of elements
– S = {a, b, c, d}
– x ∈ S, and y ∉ S
• Operators
– binary operators: x and y ∈ S
z ∈ S
– unary operators: x ∈ S
z ∈ S
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 Axioms of Algebra
1. Closure:
• A set is closed w.r.t. a binary operation *
• Example: natural numbers are closed w.r.t. (+)
2. Associative law:
• (x * y) * z = x * (y * z) for all x, y, z ∈ S
3. Commutative law:
• x*y=y*x for all x, y ∈ S
4. Identity element:
• S is said to have a identity element e if ∃ e ∈ S such
that e * x = x * e = x for any x ∈ S
• Set of integers: e = 1 w.r.t. × and e = 0 w.r.t. +
3
 Axioms of Algebra (cont.)
5. Inverse
• S having an identity element e w.r.t. * is said to have
an inverse for every x ∈ S, whenever there exists an
element y ∈ S such that
x*y=e
• Example: set of integers
6. Distributive law
• If * and • are two binary operators on S, * is said to
be distributed over • whenever
• x * (y • z) = (x * y) • (x * z)

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An Example of Algebraic Structure
• S = {0, 1, 2} with × and + forms a algebraic
structure

+ 0 1 2 × 0 1 2
0 0 1 2 0 0 0 0
1 1 2 0 1 0 1 2
2 2 0 1 2 0 2 1

• additive identity 0
• multiplicative identity 1
• we have additive and multiplicative inverses
• × is distributed over + (not vice versa)
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 Boolean Algebra - 1
• A set of elements B
– There exist at least two elements x, y ∈ B s. t. x ≠ y
• Binary operators: + and ·
– closure w.r.t both + and ·
– additive identity 0
– multiplicative identity 1
– commutative w.r.t. both + and ·
– Associative w.r.t. both + and ·
• Distributive law:
– · is distributive over +
– + is distributive over ·
– We do not have both in ordinary algebra 6
 Boolean Algebra - 2
• Complement
– For every element x ∈ B, there exist an element x ’ ∈
B s. t.
a. x + x ’ = 1 and
b. x · x ’ = 0.
– Not available in ordinary algebra
• Differences btw ordinary and Boolean algebra
– Ordinary algebra with real numbers
– Boolean algebra with elements of set B
– Complement
– Distributive law
– Do not substitute laws from one to another where
they are not applicable
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 Two-Valued Boolean Algebra - 1
• To define a Boolean algebra
– The elements of B
– Rules for two binary operations
– The elements of B and rules should conform to our
axioms
• Two-valued Boolean algebra
– B = {0, 1}
x y x · y X y x + y x x’
0 0 0 0 0 0 0 1
0 1 0 0 1 1 1 0
1 0 0 1 0 1
1 1 1 1 1 1
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 Two-Valued Boolean Algebra - 2
• Check the axioms
– Two distinct elements, 0 ≠ 1
– Closure, associative, commutative, identity elements
– Complement
• x + x ’ = 1 and x · x ’ = 0
– Distributive law
x y z y·z x+(y·z) x + y x + z (x + y) · (x + z)
0 0 0 0 0 0 0 0
0 0 1 0 0 0 1 0
0 1 0 0 0 1 0 0
0 1 1 1 1 1 1 1
1 0 0 0 1 1 1 1
1 0 1 0 1 1 1 1
1 1 0 0 1 1 1 1
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1 1 1 1 1 1 1 1
 Two-Valued Boolean Algebra - 2
• Two-valued Boolean algebra is actually equivalent
to the binary logic defined heuristically before
– Operations:
• ·
AND
• +
OR
• Complement
NOT
• Binary logic is application of Boolean algebra to
the gate-type circuits
– Two-valued Boolean algebra is developed in a formal
mathematical manner
– This formalism is necessary to develop theorems and
properties of Boolean algebra
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 Duality Principle
• An important principle
– every algebraic expression deducible from the axioms
of Boolean algebra remains valid if the operators and
identity elements are interchanged
• Example:
– x + x = x.
– x + x = (x + x) · 1 (identity element)
= (x + x)(x + x’) (complement)
= x + xx’ (+ over ·)
=x (complement)
– duality principle
x+x=x  x·x=x

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 Duality Principle & Theorems
• Theorem a:
– x+1=1
– x + 1 = 1 · (x + 1)
= (x + x’)(x + 1)
= x + x’ · 1
= x + x’
=1
• Theorem b: (using duality)
– x·0=0
• Absorption Theorem
a. x + xy = x
b. x · (x+y) = x
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Involution & DeMorgan’s Theorems
• Involution Theorem:
– (x ’ ) ’ = x
– x + x’ = 1 and x · x’ = 0
– Complement of x’ is (x ’ ) ’
– Complement is unique
• DeMorgan’s Theorem:
– (x + y)’ = x’ · y ’
– (x · y)’ = x’ + y ’

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Truth Tables for DeMorgan’s Theorem
–(x + y)’ = x’ · y ’ x y x+y (x+y)’ x · y (x · y)’
0 0 0 1 0 1
–(x · y)’ = x’ + y ’
0 1 1 0 0 1
1 0 1 0 0 1
1 1 1 0 1 0

x’ y’ x’ · y ’ x’ + y’
1 1 1 1
1 0 0 1
0 1 0 1
0 0 0 0 14
 Operator Precedence
1. Parentheses
2. NOT
3. AND
4. OR
• Example:
– (x + y)’
– x’ · y ’
– x+x·y’

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 Boolean Functions
• Consists of
– binary variables (normal or complement form)
– the constants, 0 and 1
– logic operation symbols, “+” and “·”
• Example:
– F1(x, y, z) = x + y ’ z
– F2(x, y, z) = x’ y ’ z + x’ y z + xy ’
x y z F1 F2
0 0 0 0 0
0 0 1 1 1
0 1 0 0 0
0 1 1 0 1
1 0 0 1 1
1 0 1 1 1
1 1 0 1 0
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1 1 1 1 0
Logic Circuit Diagram of F1
F1(x, y, z) = x + y ’ z

x+y’z
y’

y ’z

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 Logic Circuit Diagram of F2
F2 = x’ y ’ z + x’ y z + xy ’

y
F2
z

– Algebraic manipulation
– F2 = x’ y ’ z + x’ y z + xy ’
= x’ z (y ’ + y) + xy ’
= x’ z + xy ’
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Alternative Implementation of F2

F2 = x’ z + xy ’

y
F2
z

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 OTHER LOGIC OPERATORS - 1
• AND, OR, NOT are logic operators
– defined by Boolean functions
– three of the 16 possible Boolean functions
x y F0 F1 F2 F3 F4 F5 F6 F7
0 0 0 0 0 0 0 0 0 0
0 1 0 0 0 0 1 1 1 1
1 0 0 0 1 1 0 0 1 1
1 1 0 1 0 1 0 1 0 1

x y F8 F9 F10 F11 F12 F13 F14 F15

0 0 1 1 1 1 1 1 1 1
0 1 0 0 0 0 1 1 1 1
1 0 0 0 1 1 0 0 1 1
1 1 0 1 0 1 0 1 0 1 20
 OTHER LOGIC OPERATORS - 2
• Some of the Boolean functions with two variables
– Constant functions: F0 = 0 and F15 = 1
– AND function: F1 = xy
– OR function: F7 = x + y
– XOR function:
• F6 = x’ y + xy’ = x ⊕ y (x or y, but not both)
– XNOR (Equivalence) function:
• F9 = xy + x’ y’ = (x ⊕ y)’ (x equals y)
– NOR function:
• F8 = (x + y) ’ = (x ↓ y) (Not-OR)
– NAND function:
• F14 = (x y) ’ = (x ↑ y) (Not-AND)
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Logic Gate Symbols
NOT TRANSFER

AND XOR

OR XNOR

NAND

NOR

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 Universal Gates
• NAND and NOR gates are universal
• We know any Boolean function can be written in
terms of three logic operations:
– AND, OR, NOT
• In return, NAND and NOR gate can implement
these three logic gates
x y (xy)’ x’ y ’ (x’ y’ )’
0 0 1 1 1 0
0 1 1 1 0 1
1 0 1 0 1 1
1 1 0 0 0 1
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 NAND Gate

x (x x)’ = x’  NOT

x [ (x y)’ ]’ = x y  AND
y

x
(x’ y ’ )’ = x + y  OR
y

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 NOR Gate

x (x + x)’ = x’  NOT

x [ (x + y)’ ]’ = x + y  OR
y

x
(x’ + y’ )’ = x · y  AND
y

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 Example - 1
• Two functions:
– F1 = x’ y + xy’ and F2 = x’ y ’ + xy’

x’ (x’ y)’
x

F1 = [ (x’ y)’ (x y’)’]’

y (x y’)’ = (x’ y) + (x y’)
y’

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 Example - 2
– F2 = x’ y ’ + xy’

x’ (x’ y’ )’
x

F2 = [ (x’ y’ )’ (x y’)’]’
y (x y’ )’
y’ = x’ y’ + x y’

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 Multiple Input Gates
• AND and OR gates:
– they are both commutative and associative
– No problem with extending the number of inputs
• NAND and NOR gates
– they are both commutative but not associative
– Extending the number of inputs is not obvious
• Example:
– (x ↑ y) ↑ z ≠ x ↑ (y ↑ z)
– (x ↑ y) ↑ z = [ (x y)’ z ]’
= (x y) + z’ = x y + z’
– x ↑ (y ↑ z) = [ x (y z)’ ]’
= x’ + y z
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Nonassociativity of NOR operation

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 Multiple Input Universal Gates
• To overcome this difficulty, we define multiple-
input NAND and NOR gates in slightly different
manner
x
x↑y↑z = (x y z)’ y (x y z)’
z

x
x↓y↓z = (x + y + z)’ y (x + y + z)’
z

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Multiple Input Universal Gates

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 XOR and XNOR Gates
• XOR and XNOR operations are both commutative
and associative.
• No problem manufacturing multiple input XOR and
XNOR gates
• However, they are more costly from hardware
point of view.
• Therefore, we usually have 2 input XOR and
XNOR gates
x
y x⊕y⊕z

z
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3-input XOR Gates

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 Algebraic Manipulations
• Previous example:
– F(x,y,z) = x’ y’ z + x y z + x y’
= x’z + xy’
• The goal:
– The reduce the number of terms
– The reduce the number of literals in a term
– to simplify the circuit
• Examples:
– x(x’+y) = xy and x+x’ y = (x+x’)(x+y) = x+y
– (x+y)(x+y’) = xx + xy’ + xy + yy’
= x + xy’ + xy
= x + x (y+y’)
=x+x=x 34
 Consensus Theorem
• xy + x’z + yz
= xy + x’ z + yz (x + x’)
= xy + x’ z + xyz + x’yz
= xy (1 + z) + x’z(1+y)
= xy + x’z
• From duality:
(x + y)(x’ + z)(y + z) = (x + y)(x’ + z)

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 Complement of a Function - 1
• F’ is complement of F
– We can obtain F’, by interchange of 0’s and 1’s in the
truth table
– We can also utilize DeMorgan’s Theorem
– (x+y)’ = x’ y’
– (A+B+C)’
= (A+x)’
= A’ x’
= A’ (B+C)’ = A’B’C’
• We can generalize DeMorgan’s Theorem
1. (x1 + x2 + … + xN )’ = x1’ · x2’ · … · xN’
2. (x1 · x2 · … · xN )’ = x1’ + x2’ + … + xN’ 36
 Complement of a Function - 2
• Example:
– F1 = x’yz’ + x’y’z
– F1’ = (x’yz’ + x’y’z)’
= (x’yz’)’(x’y’z)’
= (x + y’ + z)(x + y + z’)
– F2 = x(y’z’ + yz)
– F2’ = (x(y’z’ + yz))’
= x’ + (y’z’ + yz)’
= x’ + (y’z’)’ (yz)’
= x’ + (y + z) (y’ + z’)
• Important: Somewhat easier method is to take
the dual of the function and complement each
literal 37
 Canonical & Standard Forms
• Minterms
– A binary variable may appear in its normal (x) and its
complement form (x’)
– How many different terms we can get with x and y?
– x’y’, x’y, xy’, and xy
00, 01, 10, 11
– m0, m1, m2, m3 (AND terms or minterms, standard
product)
– n variables can be combined to form 2n minterms
• Maxterms (OR Terms, standard sums)
– M0 = x+y
– M1 = x + y’
– M2 = x’ + y
– M3 = x’ + y’
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 Min- & Maxterms with n = 3

Minterms Maxterms
x y z term designation term designation
0 0 0 x’y’z’ m0 x+y+z M0
0 0 1 x’y’z m1 x + y + z’ M1
0 1 0 x’yz’ m2 x + y’ + z M2
0 1 1 x’yz m3 x + y’ + z’ M3
1 0 0 xy’z’ m4 x’ + y + z M4
1 0 1 xy’z m5 x’ + y + z’ M5
1 1 0 xyz’ m6 x’ + y’ + z M6
1 1 1 xyz m7 x’ + y’ + z’ M7
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Boolean Functions in Standard Form
x y z F1 F2
0 0 0 0 1
0 0 1 1 0
0 1 0 0 0
0 1 1 0 1
1 0 0 1 0
1 0 1 0 1
1 1 0 0 1
1 1 1 1 1

• F1(x, y, z) = m1 + m4 + m7 = Σ (1, 4, 7)
• F2(x, y, z) = m0 + m3 + m5 + m6 + m7 = Σ (0, 3, 5, 6, 7)
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 Important Properties
• Any Boolean function can be expressed as a sum
of minterms
• Example:
– F1’ = Σ (0, 2, 3, 5, 6)
= x’y’z’ + x’yz’ + x’yz + xy’z + xyz’
– How do we find the complement of F1’?
– F1 = (x + y + z)(x + y’ + z)(x + y’ + z’)(x’ + y + z’)(x’ + y’ + z)
= M0 + M2 + M3 + M5 + M6
= Π (0, 2, 3, 5, 6)
• Any Boolean function can be expressed as a
product of maxterms
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 Canonical Form
• If a Boolean function is expressed as a sum of
minterms or product of maxterms the function is
said to be in canonical form.
• Example: F = x + y ’ z
canonical form?
– No
– But we can put it in canonical form.
– F = x + y ’ z = Σ (7, 6, 5, 4, 1)
• Alternative way:
– Obtain the truth table first and then the canonical
term.

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 Example: Product of Maxterms
• F = xy + x’z
– Use the distributive law + over ·
– F = (xy + x’) · (xy + z)
= (x + x’) · (y + x’) · (x + z) · (y + z)
= (y + x’) · (x + z) · (y + z)
= (y + x’ + zz’) · (x + z + yy’) · (y + z + xx’)
= (x’ + y + z) · (x’ + y + z’) · (x + y + z) · (x + y’ + z)
· (x + y + z) ·(x’ + y + z)
– = Π (4, 5, 0, 2)

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Conversion Between Canonical Forms
• Fact:
– The complement of a function (given in sum of
minterms) can be expressed as a sum minterms missing
from the original function
• Example:
– F(x, y, z) = Σ (1, 4, 5, 6, 7)
– F’(x, y, z) = Σ (0, 2, 3) = m0 + m2 + m3.
– Now take the complement of F’ and make use of
DeMorgan’s theorem
– (F ’ )’ = (m0 + m2 + m3 )’ = (m0 ’ · m2 ’ · m3 ’ )
– F = M0 · M2 · M3 = Π (0, 2, 3)

44
 General Rule for Conversion
• Important relation:
– mj’ = Mj.
– Mj’ = mj.
• The rule:
– Interchange symbols Π and Σ, and
– list those terms missing from the original form
• Example: F = xy + x’z
– derive the truth table
– Obtain the sum of minterms form
– F = Σ(1, 3, 6, 7)
– F = Π(0, 2, 4, 5)
45
 Standard Forms
• Fact:
– Canonical forms are very seldom the ones with the
least number of literals
• Alternative representation:
– Standard form
• a term may contain any number of literals
– Two types
1. the sum of products
2. the product of sums
– Examples:
• F1 = y’ + xy + x’yz’
• F2 = x(y’ + z)(x’ + y + z’)
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 Example: Standard Forms
• F1 = y’ + xy + x’yz’
• F2 = x(y’ + z)(x’ + y + z’)

47
 Nonstandard Forms
• Example:
– F3 = AB + C(D + E)
– This hybrid form yields three-level implementation
A
B F3
C
D
E

– We can always get the standard form

– F3 = AB + CD + CE
A
B
C
D
F3
C 48
E
 Positive & Negative Logic
• In digital circuits, we have two digital signal level:
– H – (higher signal level; e.g. 3 ~ 4 V)
– L - (lower signal level; e.g. 0 ~ 1 V)
• There is no logic-1 or logic-0 at the circuit level
• We can do any assignment we wish
– For example:
• H
logic-1
• L
logic-0

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 Signal Designation - 1

x y F
x digital
F L L L
y gate
L H H
H L H
H H H

• What kind of logic function does it implement?

50
 Signal Designation - 2

x y F
x
0 0 0 F
y
0 1 1
1 0 1 positive logic
1 1 1
polarity
indicator
x y F
1 1 1 x
F
1 0 0 y
0 1 0
0 0 0 negative logic
51
 Integrated Circuits
• IC – silicon semiconductor crystal (“chip”) that
contains gates.
– gates are interconnected inside to implement a Boolean
function
– Chip is mounted in a ceramic or plastic container
– Inputs & outputs are connected to the external pins of
the IC.
– Many external pins (14 to several thousands)

52
 Levels of Integration
• SSI (small-scale integration):
– Up to 100 electronic components per chip
• MSI (medium-scale integration):
– From 100 to 3,000 electronic components per chip
• LSI (large-scale integration):
– From 3,000 to 100,000 electronic components per chip
• VLSI (very large-scale integration):
– From 100,000 to 1,000,000 electronic components per
chip
• ULSI (ultra large-scale integration):
– More than 1 million electronic components per chip
53
 Digital Logic Families
• Circuit Technologies
• TTL
transistor-transistor logic
• ECL
Emitter-coupled logic
– fast
• MOS
metal-oxide semiconductor
– high density
• CMOS
Complementary MOS
– low power

54
 Parameters of Logic Gates - 1
• Fan-out
– load that the output of a gate drives
– standard load may be defined as the amount of current
needed by the input of a gate of the same family.
– Maximum fan-out specifies the fan-out that the output
can drive without impairing the gate performance
– Example: the input to an inverter can have load equal to
1.0 standard load.
• If a, say NAND, gate drives six such inverters, then
the fan-out is equal to 6.0 standard loads.
– The transition time of a gate is affected by the fan-
out in CMOS technology
– Thus, maximum fan-out is the standard load with which
the transition time is no greater than the maximum
allowable value. 55
 Parameters of Logic Gates - 2
• Fan-in
– number of inputs that a gate can have in a particular
logic family
– In principle, we can design a CMOS NAND or NOR gate
with a very large number of inputs
– In practice, however, we have some limits
– 4 for NOR gates
– 6 for NAND gates
• Power dissipation
– power consumed by the gate that must be available
from the power supply

56
 Parameters of Logic Gates - 3
• Propagation delay:
– the time required for a change in value of a signal to
propagate from input to output.
logic-1
logic-0 logic-1
x logic-0
logic-1 F
y
tPHL tPLH

x time

F
57
 Computer-Aided Design - 1
• CAD
– Design of digital systems with VLSI circuits containing
millions of transistors is not easy and cannot be done
manually.
• To develop & verify digital systems we need CAD
tools
– software programs that support computer-based
representation of digital circuits.
• Design process
– design entry
– …
– database that contains the photomask used to
fabricate the IC
58
 Computer-Aided Design - 2
• Different physical realizations
– ASIC (application specific integrated circuit)
– FPGA
– PLD
• For every piece of device we have an array of
software tools to facilitate
– design,
– testing,
– and even programming

59
Xilinx Foundation

60
 Schematic Editor
• Editing programs for creating and modifying
schematic diagrams on a computer screen
– schematic capturing or schematic entry
– you can drag-and-drop digital components from a list in
an internal library (gates, decoders, multiplexers,
registers, etc.)
– You can draw interconnect lines from one component to
another

61
Schematic Editor

62
 Hardware Description Languages
• HDL
– Verilog
– VHDL
– resembles a programming language
– designed to describe digital circuits so that we can
develop and test digital circuits

63