Experiment-1

Objective: - To determine the various resistors and verify their value.

Required apparatus: - Various resistors, connecting wires, multimeter etc.

Principle:-

Theory:-

Observation Table:-

Serial Resistors Theoretical value Practical valve by

numbe multimeter
r

Result:-All theoretical and practical values of resistors are approximately same.

Conclusion:-We can easily find the resistor’s value theoretically which is

approximately to the real value.

Precautions:-

1) Wires should be tightly connected in the circuit.

2) Before using multimeter, we should check it.
3) Take the correct reading from the multimeter.
4) Calculate the theoretical value according the given table.
 Experiment-2
Objective: - To verify operation and truth table of all Logic Gates.

Required apparatus: - Logic Gates kit, connecting patch cord, AC power supply.

Principle:-

Theory:-

Observation Table:-

Name Graphic Symbol Function Truth Table

A B F
A 0 0

AND Gate F=A.B 0 1

1 0
B
1 1

A B F
A
0 0

OR Gate F=A+B 0 1

B
1 0

1 1

A A’

Inverter or
NOT Gate 1
A=A’
A A’
0
 A B F

0 0

NAND F=(AB)’ 0 1
Gate
1 0

1 1

A B F

0 0

NOR Gate F=(A+B)’ 0 1

1 0

1 1

A B F

0 0

EX-OR 0 1
Gate
1 0

1 1

A B F

0 0

EX-NOR 0 1
Gate
1 0

1 1
Result:-

Conclusion:-

Procedure:-

1) Connect inputs 00,01,10,11 as per the truth table to the input pins of the
different gates.
2) Switch on the power supply.
3) Observe output of different gates on LED display of digital lab mother board
and prove the truth tables.

Precautions:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Connecting cords should not be defective.

Experiment-3
Objective:- To verify the Demorgan’s law and its truth table.

Apparatus required:- Demorgan’s kit, wires, power supply etc.

Principle:-

Theory:-

Observation Table:-

Circuit Design:-

Truth-Table:-

For the first law:-

1) (A+B)’ = A’.B’

A B Y=(A+B)’ A B Y=A’.B’
0 0 0 0
0 1 0 1
1 0 1 0
1 1 1 1
For the second law:-

2) (A.B)’ = (A’+B’)

A B Y=(A.B)’ A B Y=A’+B’
0 0 0 0
0 1 0 1
1 0 1 0
1 1 1 1

Results:-Both the table show the same value in their respective column.

Conclusion:- After observing the truth-table, we can say Demorgan’s law verified.

Precaution:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Connecting cords should not be defective.
 Experiment-4
Objective:-To study the application of 16-line to 1-line multiplexer for the generation
of Boolean functions.

Apparatus required:- Logic trainer, 16-line to 1- line multiplexer, wires, power supply
etc.

Principle:-

Theory:-

Observation table:-

Truth table:-

Input MSB LSB Output

In Y
S3 S2 S1 S0
I0 0 0 0 0
I1 0 0 0 1
I2 0 0 1 0
I3 0 0 1 1
I4 0 1 0 0
I5 0 1 0 1
I6 0 1 1 0
I7 0 1 1 1
I8 1 0 0 0
I9 1 0 0 1
I10 1 0 1 0
I11 1 0 1 1
I12 1 1 0 0
I13 1 1 0 1
I14 1 1 1 0
I15 1 1 1 1
Pin Diagram:-
Result:- One of the output line is selected by according combination of selection line.

Conclusion:-Circuit works as a multiplexer, i.e. it select one input among the group of
16 line.

Precautions:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.
 Experiment-5
Objective:-To study the application of 1-line to 16-line Demultiplexer for the
generation of Boolean functions.

Apparatus required:- Logic trainer, 16-line to 1- line multiplexer, wires, power supply
etc.

Principle:-

Theory:-

Observation table:-

Truth table:-
Data Control Input Output
input
S3 S2 S1 S0 Y Y Y2 Y Y Y5 Y Y7 Y Y9 Y1 Y1 Y12 Y1 Y14 Y15
0 1 3 4 6 8 0 1 3

1 0 0 0 0
1 0 0 0 1
1 0 0 1 0
1 0 0 1 1
1 0 1 0 0
1 0 1 1 0
1 0 1 1 1
1 1 0 0 0
1 1 0 0 1
1 1 0 1 0
1 1 0 1 1
1 1 1 0 0
1 1 1 0 1
1 1 1 1 0
1 1 1 1 1
Logic Diagram:-
Pin Diagram:-
Result:- One of the output line is selected by according combination of selection line.

Conclusion:- Circuit works as a Demultiplexer, i.e. it select one output among the
group of 16 line.

Precautions:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.
 Experiment-6

Aim: - To study and verify the truth tables of JK Master Slave Flip-Flop using gates.

Apparatus required: - J-K flip-flop trainer kit, wires etc.

Principle: - A flip-flop is a device with two stable states. It remains in one of these
states until triggered into other. It is the ideal element for the entire counter. I.e. all
the counter is design by J-K flip-flop. For this the output of flip-flop are cross
coupled with the input of flip-flop.

Theory:-

The Master-Slave Flip-Flop is basically two gated SR flip-flops connected together

in a series configuration with the slave having an inverted clock pulse. The outputs
from Q and Q from the "Slave" flip-flop are fed back to the inputs of the "Master"
with the outputs of the "Master" flip-flop being connected to the two inputs of the
"Slave" flip-flop. This feedback configuration from the slave's output to the master's
input gives the characteristic toggle of the JK flip-flop as shown below.

The input signals J and K are connected to the gated "master" SR flip-flop which
"locks" the input condition while the clock (Clk) input is "HIGH" at logic level "1". As
the clock input of the "slave" flip-flop is the inverse (complement) of the "master"
clock input, the "slave" SR flip-flop does not toggle. The outputs from the "master"
flip-flop are only "seen" by the gated "slave" flip-flop when the clock input goes
"LOW" to logic level "0". When the clock is "LOW", the outputs from the "master"
flip-flop are latched and any additional changes to its inputs are ignored. The gated
"slave" flip-flop now responds to the state of its inputs passed over by the "master"
section. Then on the "Low-to-High" transition of the clock pulse the inputs of the
"master" flip-flop are fed through to the gated inputs of the "slave" flip-flop and on
the "High-to-Low" transition the same inputs are reflected on the output of the
"slave" making this type of flip-flop edge or pulse-triggered.

Then, the circuit accepts input data when the clock signal is "HIGH", and passes the
data to the output on the falling-edge of the clock signal. In other words, the
Master-Slave JK Flip-flop is a "Synchronous" device as it only passes data with
the timing of the clock signal.
Diagram:

Procedure:

1. Switch ON the experimental board by connecting power card to the AC mains.

2. Apply mono pulse output to CLK and press the push button.

3. Verify the truth table by giving the inputs from the logic input switches and
observe the outputs Q and Q’.
Observation table:-

Clock Functional Remarks

J K Q Q’
Pulse State

Present
0 - - Q Q’
state

Reset
1 0 0 0 1
State
Present
State
1 0 0 1 0 Set state

Reset
1 0 1 0 1
State
Stable
Reset
State
Reset
1 0 1 1 0
State

1 1 0 0 1 Set State
Stable Set
Sate
1 1 0 1 0 Set State

1 1 1 0 1 Set State Toggle

State or
Race
Reset around
1 1 1 1 0
State condition

Result:-

When J=0 and K=0 we get present state.

When J=0 and K=1 we get Reset state i.e stable reset state.

When J=1 and k=0 we get set state i.e stable set state.

When J=1 and k=1 we get the toggle states or race around condition
Conclusion:-

The circuit accepts input data when the clock signal is "HIGH", and passes the data
to the output on the falling-edge of the clock signal. In other words, the Master-
Slave JK Flip-flop is a "Synchronous" device as it only passes data with the timing
of the clock signal.

Precautions:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.
 Experiment-7
Aim:- To study the operation of Astable Multivibrator and observe the wave forms

Apparatus Requirements: - Astable Multivibrator kit, wires, CRO etc.

Principle:- When an input signal to one amplifier is large enough, the transistor can
be driven into cutoff, and its collector voltage will be almost V CC. However, when the
transistor is driven into saturation, its collector voltage will be about 0 volts. A circuit
that is designed to go quickly from cutoff to saturation will produce a square or
rectangular wave at its output. This principle is used in multivibrators

Theory:-

Astable Multivibrator is a two stage switching circuit in which the output of the first
stage is fed to the input of the second stage and vice versa. The outputs of both the
stages are complementary. This free running multivibrator generates square wave
without any external triggering pulse. The circuit has two stable states and switches
back and forth from one state to another, remaining in each state for a time
depending upon the discharging of the capacitive circuit.

The multivibrator is one form of relaxation oscillator, the frequency of which may be
controlled by external synchronizing pulses.

In our experiment we are using transistor, as the amplifying device and also it is a
collector coupled multivibrator.

Diagram:-
Observation:-

Result:-

Periodic time:-

Frequency of Oscillation :-

Conclusion:-

The output voltage has a shape that approximates a square waveform. To approach
the needed square waveform, the collector resistors have to be low resistance.

Precautions:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.
 Experiment-8
Aim: - To study the operation of Bistable Multivibrator and observe the wave forms

Apparatus Requirements: - Bistable Multivibrator kit, wires, CRO etc.

Principle:-

The bistable multivibrator can be switched over from one stable state to the other by
the application of an external trigger pulse thus, it requires two external trigger
pulses before it returns back to its original state. As bistable multivibrators have two
stable states they are more commonly known as Latches and Flip-flops for use in
sequential type circuits.

Theory:-

The discrete Bistable Multivibrator is a two state non-regenerative device

constructed from two cross-coupled transistor switches. In each of the two states,
one of the transistors is cut-off while the other transistor is in saturation, this means
that the bistable circuit is capable of remaining indefinitely in either stable state. To
change over from one state to the other the circuit requires a suitable trigger pulse
and to go through a full cycle, two triggering pulses, one for each stage are required.
Its more common name or term of "flip-flop" relates to the actual operation of the
device, as it "flips" into one logic state, remains there and then changes or "flops"
back into its first original state.

Diagram:-
Observation:-

Conclusion:-

The output voltage has a shape that approximates a square waveform. To approach
the needed square waveform, the collector resistors have to be low resistance.

Precaution:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.

Experiment-9
Aim: - To study the 4-bit up-down counter and its functioning.
Apparatus Requirements: - 4-bit up -down counter kit, wires etc.

Principle:- A counter is a device which stores (and sometimes displays) the number of
times a particular event or process has occurred, often in relationship to a clock signal.

Theory:- All the counters as we know the counting is done in upward sequence i.e.
the count sequence is 0-1-2-3-4. Sometime it is required to count in downward
sequence. A counter which can count in upward and downward sequence is called an
up-down counter. If that counter count up to 1111 i.e. 15 then such type of counter is
called 4-bit up-down counter. For this we design a parallel up-down counter such
counter are called synchronous up-down counter. Such counter is shown in below. In
this counter flip-flop toggles only when J=K=1. And do not change the state when
these inputs are low. Also in parallel counter the time at which any flip-changes its
state is determined by the states of all the previous flip-flop in the counter.

Diagram:--

Block diagram:-

Pin Diagram:-
Logic Diagram:-

Observation:-

MR PL CPU CPD
 MODE

H - - - Reset

L L - - Preset

L H H H No Change

L H L-H H Count Up

L H H L-H Count Down

Result:- When CPU goes low to high counting to be done in upward direction

When CPD goes low to high counting to be done in downward direction

Conclusion:- 4- bit up down synchronous counter can count 0000-1111 in upward

direction while in downward direction it can count 1111-0000.

Precaution:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.

Experiment-10
Aim: - To study the Left shift & right shift register.

Apparatus Requirements: - universal shift register kit, wires etc.

Principle:-A register that is used to store binary information is known as memory

register. A register capable of shifting binary information either to the right or to the
left is called shift register.

Theory:-A register which is capable of shifting data both to the right and left is called
bi-directional shift register. A register that can shift in only one direction is called a
unidirectional shift register. If the register has shift and parallel load capabilities
then it is called a shift register with parallel load or universal shift register. Shift
registers can be used for converting serial data to parallel data and vice versa. If
parallel load capabilities are added to shift register, then data entered in parallel can
be taken out in serial fashion by shifting the data stored in the register.

Diagram:-

Pin Diagram:-

Block Diagram:-

Observation:-
 Mode Control Register Operation

S1 S2

No change
0 0 Shift Right
0 1 Shift Left
1 0 Parallel Load
1 1

Result:-

When S1=0 and S2=1 then bit shifts to the right.

When S1=1 and S2=0 then bit shifts to the left.

Conclusion:-

In shift register, the flip-flop are connected in such a way that the bits of a binary
number are entered into the shift register, shifted from one position to another and
finally shifted out.

Precaution:-

1) Make sure that connections are correct and according to the circuit.
2) Switch on power supply after making proper connections.
3) Take the correct reading from the circuit.