UNIT 2

LOGIC CIRCUITS
 COMBINATIONAL CIRCUITS
Characteristics :
1. A circuit in which different types of logic gates are connected
together is known as combinational logic circuit.
2. The output of a combinational circuit depends only on the
present inputs.
3. Memory element and clock signals are not present in
combinational circuits.
4. Examples – Adders, multiplexers, encoders, decoders.
 COMBINATIONAL CIRCUITS
1. Half Adder : Half adder accepts two binary digits on its input and
produces two binary digits on its output – sum bit and carry bit.
Logic symbol :

Truth table :
 COMBINATIONAL CIRCUITS
Logic expressions :
Cout = AB
Sum= A’B+AB’= A⊕B
Logic circuit :
 COMBINATIONAL CIRCUITS
2. Full Adder : Full adder accepts two input bits and an input carry
and generates a sum output and an output carry.

Logic symbol :
 COMBINATIONAL CIRCUITS
Truth table :

Logic Expressions :
Sum = A ⊕ B ⊕ Cin
Cout = AB+ (A ⊕ B ) Cin
 COMBINATIONAL CIRCUITS
Logic circuit :
 COMBINATIONAL CIRCUITS
3. Half Subtractor : Half subtractor is a combinational circuit that
accepts 2 binary digits on its input and produces 2 binary digits on
its output – diff and borrow
Logic symbol :

Truth table :
 COMBINATIONAL CIRCUITS
Logic expressions:

Diff= A'B+AB'
Borrow = A'B

Logic circuit :
 COMBINATIONAL CIRCUITS
4. Comparator :
Logic symbol :

Truth table :
 COMBINATIONAL CIRCUITS
Logic expression :
A<B= A’B
A=B= A’B’+AB= A XNOR B
A>B= AB’

Logic circuit :
Working of a 4 bit Comparator :

First examine the highest order bit(MSB) in each number. The

following conditions are possible:
1. If A3=1 and B3= 0, number A is greater than B
2. If A3=0 and B3=1, number A is less than number B
3. If A3=B3, then you must examine the next lower bit position
for inequality.
4. When inequality is found, any other inequalities in lower bit
positions is ignored.
 COMBINATIONAL CIRCUITS
5. Multiplexer : Multiplexer also called Data Selector is a logic
circuit that switches digital data from several input lines onto a
single output line.
4:1 MUX : A 4:1 MUX is a multiplexer circuit having 4 input data
lines , 1 output line and 2 data select lines.
Logic Symbol :
Truth Table :

Logic Expression :
Y = S0’ S1’ D0 + S0 S1’ D1 + S0’ S1 D2 + S0 S1 D3
 COMBINATIONAL CIRCUITS
6. DeMultiplexer : DeMultiplexer also called Data Distributor
basically reverses the function of multiplexing. It is a logic circuit
that takes digital information from one line and distributes it to a
given number of output lines.
1:4 DEMUX :
A 1:4 DEMUX is a circuit having single input data line , 4 output
lines and 2 data select lines.
Logic Symbol :
 COMBINATIONAL CIRCUITS
Truth Table:

Logic Expression and Circuit :

 COMBINATIONAL CIRCUITS
7. Encoder : Encoder is a combinational logic circuit that converts a
decimal number into some coded form such as binary or BCD.
Decimal to BCD Encoder : This type of encoder has 10 inputs- one
for each decimal digit and four outputs for BCD code. It’s also called
10 line to 4 line encoder.
Logic Symbol :
 COMBINATIONAL CIRCUITS
Truth table :

Logic Expression :
A3 = 8 + 9
A2 = 4 + 5 + 6 + 7
A1 = 2 + 3 + 6 + 7
A0 = 1 + 3 + 5 + 7 + 9
 COMBINATIONAL CIRCUITS
Logic Circuit :
 COMBINATIONAL CIRCUITS
7. Decoder – A decoder is a combinational logic circuit that
performs the reverse of an encoder. A decoder converts coded
information such as binary/ BCD into recognizable form such as
decimal.
BCD to Seven Segment Decoder :
 COMBINATIONAL CIRCUITS
BCD to Seven Segment Decoder Truth table :
 SEQUENTIAL CIRCUITS
Characteristics :
1. Sequential circuits are logic circuits whose output depends on
both present inputs and previous output.
2. This means sequential circuits are capable of storing binary
information in memory.
3. Clock signal is required for sequential circuits.
4. Examples – Flip flops, shift registers, counters.
Types of Sequential Circuits :
1. Asynchronous sequential circuits- clock signals are not used
by asynchronous sequential circuits. The asynchronous circuit
is operated through pulses. So, the changes in the input can
change the state of the circuit. The asynchronous sequential
circuit is similar to the combinational circuits with feedback.
2. Synchronous sequential circuits- In synchronous sequential
circuits, synchronization of the memory element's state is done
by the clock signal. The output is stored in either flip-flops or
latches(memory devices).
Difference between combinational and sequential circuits :
Combinational circuits Sequential circuits
1. The output of combinational circuit The output of sequential circuits
depends only on the present inputs depends on both present inputs and
previous output.

2. The feedback path is not present in The feedback path is present in the
the combinational circuit. sequential circuits.

3. In combinational circuits, memory In the sequential circuit, memory

elements are not required. elements play an important role and
require.
4. The clock signal is not required for The clock signal is required for
combinational circuits. sequential circuits.

5. The combinational circuit is simple It is not simple to design a sequential

to design. circuit.
6. Example – adders, encoders, Example – Flip flops, counters.
decoders, multiplexers. Registers.
 Flip flops
•A flip-flop is a sequential circuit that samples the input and changes
the output at a particular instance of time. It has two stable states
and can be used to store state information.
•It is the basic storage element in sequential logic and fundamental
building blocks of digital electronic systems.
•Flip flop types :
1. S-R Flip Flop
2. J-K Flip Flop
3. Master-slave J-K Flip Flop
4. D Flip Flop
5. T Flip Flop
 1. S-R Flip flop
The S-R flip-flop is the simplest flip-flop.
• It has two outputs, one output is the reverse of the other, and two
inputs. The two inputs are Set and Reset.
•Set word means that the output of the circuit is equal to 1 and the
word reset means that the output is 0.
•Flip flop word means that it can be “FLIPPED” into one logic state
or “FLOPPED” back into another.
• The R-S flip flop is formed with 2 cross coupled NAND gates.
Logic symbol :
Circuit diagram :
SET state RESET state :
When Q output is high, the flip flop is in the SET state. This can be
achieved by applying S=1 and R=0
Similarly, when Q output is low, the flip flop is in the RESET state. This
can be achieved by applying S=0 and R=1
Q and Q are always complementary to each other.
When inputs S=0 and R=0, both Q= Q =1 which is invalid, and should
not be allowed.
TRUTH TABLE :
S R Q REMARKS
0 0 1
Q1 INVALID
0 1 0 1 RESET
1 0 1 0 SET
1 1 NC NC NO
CHANGE
 2. J-K FLIP FLOP
•J-K flip flop is an improvement over clocked S-R flip flop.
•The working is similar to S-R flip flop in the “SET”, “RESET” and “NO
CHANGE” conditions. But J-K flip flop has no “invalid state”.
•J input is similar to S input and K is similar to R input of S-R flip flop.
•J-K flip has 2 inputs J and K, 2 outputs Q and Q and 1 clock signal
input.
•LOGIC SYMBOL :
CIRCUIT DIAGRAM :

TRUTH TABLE :

When J=1 and K=1, on each clock spike, the flip flop changes to the
opposite state. This mode is called toggle operation.
 3. J-K MASTER SLAVE FLIP FLOP
• J-K Master slave flip flop is a combination of 2 J-K flip flops.
• One flip flop acts as the master and second is called slave.
• The output from the master flip flop is connected to the two
inputs of the slave flip flop whose output is fed back to inputs of
the master flip flop.
• Logic Symbol :
 3. J-K MASTER SLAVE FLIP FLOP
Circuit diagram :

Truth Table :
 3. J-K MASTER SLAVE FLIP FLOP
Working :
1. J-K master slave flip flop is used to overcome the “race around
condition “ in digital circuits.
2. When positive clock pulse is applied to master flip-flop, the
master flip flop is enabled.
3. At the same time, the clock pulse is inverted and applied to the
slave , therefore slave is inactive
4. When low clock pulse is applied to the master, the master is
inactive and the inverted clock pulse is applied to the slave. Now
the slave is enabled.
5. At the end of clock pulse, the slave flip flop follows and copies
the output of the master.
Applications of flip flops :
1. Counters
2. Shift registers
3. Bounce elimination switch
4. Data storage and transfer
5. Latch
6. Storage devices in memory
7. Frequency dividers
 Shift registers
•Flip flops can be used to store a single bit of binary
data (1or 0). However, in order to store multiple bits of
data, we need multiple flip flops.
• Shift register is a group of flip flops used to store
multiple bits of data. The bits stored in such registers
can be made to move within the registers and in/out of
the registers by applying clock pulses.
• Shift registers are basically of 4 types. These are:
1. Serial In Serial Out shift register
2. Serial In parallel Out shift register
3. Parallel In Serial Out shift register
4. Parallel In parallel Out shift register
 Shift registers
1. Serial-In Serial-Out Shift Register (SISO) :
•The shift register, which allows serial input (one bit after the other through a
single data line) and produces a serial output is known as Serial-In Serial-Out
shift register.
• Since there is only one output, the data leaves the shift register one bit at a
time in a serial pattern.
•The circuit consists of four D flip-flops which are connected in a serial manner.
•All these flip-flops are synchronous with each other since the same clock
signal is applied to each flip flop.
 Shift registers
Serial-In Serial-Out Shift Register (SISO) :
• All flip flops are cleared , forcing all 4 outputs to 0.
•When the clock pulse occurs, each flip flop is set or reset according
to the data at the flip flop input.
• During the 1st clock pulse, input data bit is applied to FF1. At the
same time, the data of FF1 is shifted into FF2 and so on.
•For each clock pulse, data is moved to the right by one flip flop.
 Shift registers
2. Serial-In-Parallel-Out Shift Register (SIPO) :
•The shift register, which allows serial input (one bit after the other
through a single data line) and produces a parallel output is known as
Serial-In Parallel-Out shift register.
•The circuit consists of four D flip-flops which are connected.
•The clear (CLR) signal is connected in addition to the clock signal to
all the 4 flip flops in order to RESET them.
• The output of the first flip flop is connected to the input of the next
flip flop and so on. All these flip-flops are synchronous with each
other since the same clock signal is applied to each flip flop.
•The data is available on 4 output lines and maybe read
simultaneously. Hence its called SIPO.
 Shift registers
2. Serial-In-Parallel-Out Shift Register (SIPO) :
 Shift registers
3. Parallel-In-Serial-Out Shift Register (PISO) :
•The shift register, which allows parallel input (data is given
separately to each flip flop and in a simultaneous manner) and
produces a serial output is known as Parallel-In Serial-Out shift
register.
•The circuit consists of four D flip-flops which are connected.
•The clock input is directly connected to all the flip flops but the
input data is connected individually to each flip flop through a
multiplexer at the input of every flip flop.
• The output of the previous flip flop and parallel data input are
connected to the input of the MUX and the output of MUX is
connected to the next flip flop.
 Shift registers
3. Parallel-In-Serial-Out Shift Register (PISO) :
 Shift registers
4. Parallel-In-Parallel-Out Shift Register (PIPO) :
• The shift register, which allows parallel input (data is given
separately to each flip flop and in a simultaneous manner) and
also produces a parallel output is known as Parallel-In parallel-Out
shift register.
• The circuit consists of four D flip-flops which are connected.
• The clear (CLR) signal and clock signals are connected to all the 4
flip flops.
• In this type of register, there are no interconnections between the
individual flip-flops since no serial shifting of the data is required.
• Data is given as input separately for each flip flop and in the same
way, output also collected individually from each flip flop.
 Shift registers
4. Parallel-In-Parallel-Out Shift Register (PIPO) :
 Shift registers
Applications of shift registers :
1. The shift registers are used for temporary data storage.
2. The shift registers are also used for data transfer and data
manipulation.
3. The serial-in serial-out and parallel-in parallel-out shift registers
are used to produce time delay to digital circuits.
4. The serial-in parallel-out shift register is used to convert serial
data into parallel data thus they are used in communication lines
where demultiplexing of a data line into several parallel line is
required.
5. A Parallel in Serial out shift register us used to convert parallel
data to serial data.
 Counters
A counter is a sequential logic circuit in which a group of flip flops are
connected in cascade.
The basic function of a counter is to count the number of input clock
pulses applied.
Counters are classified as :
1. Asynchronous counters
2. Synchronous counters
Asynchronous counters – are also called serial counters or ripple
counters.
In asynchronous counters, the first flip flop is given an input clock
pulse by an external clock. The other flip flops are given clock input
by the output of the previous flip flop. They do not have a common
clock.
They are called ripple counters because a single clock pulse ripples
through the counter, flip flop by flip flop due to propagation delay.
 Counters
In synchronous counters , clock input is connected in parallel to all
flip flops of the counter.
Thus, every flip flop changes its state in synchronization with the
clock.
Synchronous counters require more hardware, but they have high
speed of operation because of reduced propagation delay.
 Counters
4 bit Asynchronous Binary Ripple Counter :
 Counters
4 bit Asynchronous Ripple Counter :
1. It consists of 4 master slave J-K flip flops
2. Each flip flop is negative edge triggered, which means each flip
flop will change state at the falling edge of the clock pulse.
3. Since it is an asynchronous flip flop, only the first flip flop gets
clock input. The outputs of the other flip flops change only when
output of previous flip flop changes from 1 to 0.
4. Initially all flip flops are reset to 0
5. Q0 represents LSB and Q3 represents MSB
6. The first clock pulse makes Q0=1, the counter becomes 0001
7. The second clock pulse causes FF0 to toggle, the Q0 changes its
state from 1 to 0, which in turn causes FF1 to change its output
Q1 to 1. Now the counter output becomes 0010.
8. Through subsequent clock pulses, the counter continues to
generate outputs till 1111 and then recycles to state 0.
 Clock Q3 Q2 Q1 Q0 DECIMAL
pulse
input
0 0 0 0 0 0
1 0 0 0 1 1
2 0 0 1 0 2
Truth Table of 3 0 0 1 1 3
4 0 1 0 0 4
4 bit asynchronous
5 0 1 0 1 5
Counter : 6 0 1 1 0 6
7 0 1 1 1 7
8 1 0 0 0 8
9 1 0 0 1 9
10 1 0 1 0 10
11 1 0 1 1 11
12 1 1 0 0 12
13 1 1 0 1 13
14 1 1 1 0 14
15 1 1 1 1 15
 Counters
Applications of counters :
• Frequency counters.
• Digital clocks.
• Analog to digital convertors.
• With some changes in their design, counters can be used
as frequency divider circuits. ...
• In time measurement. ...
• We can design digital triangular wave generator by using
counters.