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Lab12 Voting Machine Design

This document outlines a lab experiment on implementing a voting machine using multiplexers. The objectives are to understand multiplexer functions, use BCD-to-seven-segment decoders to drive numeric displays, design combinational logic circuits, and consider ethics and safety. Students complete pre-lab tasks, implement the voting machine in lab, and participate in a post-lab viva. The lab instructions provide details on the voting machine problem, using multiplexers and NAND gates to design the circuit, and assessing students' lab performance on various program learning outcomes.

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Muneeb Asif
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174 views

Lab12 Voting Machine Design

This document outlines a lab experiment on implementing a voting machine using multiplexers. The objectives are to understand multiplexer functions, use BCD-to-seven-segment decoders to drive numeric displays, design combinational logic circuits, and consider ethics and safety. Students complete pre-lab tasks, implement the voting machine in lab, and participate in a post-lab viva. The lab instructions provide details on the voting machine problem, using multiplexers and NAND gates to design the circuit, and assessing students' lab performance on various program learning outcomes.

Uploaded by

Muneeb Asif
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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Department of Electrical Engineering

Faculty Member:____________________ Dated: ________________

Semester:__________________________ Section: ________________

Group No.:

EE-221: Digital Logic Design

Assessment Rubrics for Lab 12: Voting Machine

PLO4/CLO4 PLO4/CLO4 PLO5/CLO5 PLO8/CLO6 PLO9/CLO7


Name Reg. No Viva / Lab Analysis Modern Ethics and Individual Total
Performanc of data in Tool Usage Safety and Team marks
e Lab Report Work Obtained

5 Marks 5 Marks 5 Marks 5 Marks 5 Marks 25 Marks

EE-221: Digital Logic Design Page 1


Lab12: Voting Machine

This Lab experiment has been designed to familiarize the students with use of multiplexers to
implement a voting macine. This lab requires some knowledge of SSI/MSI combinational circuits
like Multiplexers, decoders, and Numeric Read-out Display.

Objectives

 Understand the function of Multiplexers and their uses in implementing a given Boolean
function.
 Familiarization with BCD-to-Seven-Segment Decoder IC as a driver to drive Numeric
Read-out.
 Transform any problem statement to truth table description, and choose output functions
that need Multiplexers implementation or other simplification techniques using logic gates.
 Design and verify combinational circuit design.

Lab Instructions

 This lab activity comprises three parts, namely Pre-lab, Lab tasks, and Post-Lab Viva
session.
 The lab report will be uploaded on LMS three days before scheduled lab date. The
students will get hard copy of lab report, complete the Pre-lab task before coming to
the lab and deposit it with teacher/lab engineer for necessary evaluation.
 The students will start lab task and demonstrate design steps separately for step-
wise evaluation( course instructor/lab engineer will sign each step after ascertaining
functional verification)
 Remember that a neat logic diagram with pins numbered coupled with nicely
patched circuit will simplify trouble-shooting process.
 After the lab, students are expected to unwire the circuit and deposit back
components before leaving.
 The students will complete lab task and submit complete report to Lab Engineer
before leaving lab.
 There are related questions at the end of this activity. Give complete answers.

EE-221: Digital Logic Design Page 2


A. Pre-Lab Tasks 5 marks.

1. For implementing a Boolean function of n variables, a MUX with how many Selection
Lines and Inputs are needed?

2. For implementing the Function F(x,y,z)=∑(1,2,6,7), a MUX with how many selection
lines is needed?

3. Implement the above function (Draw its Logic Diagram) F with the MUX suggested in
answer to above question.

B. Lab Tasks 10 marks

Voting Machine Problem:

A small corporation has 9 shares of stock. The corporation board consists of 4 members
(A Chairman, 2 senior members and 1 junior member).Each member of the Corporation
Board has a voting right at a Corporation Financial meeting. The committee has agreed
to assign the following share(s) to vote of each member.

EE-221: Digital Logic Design Page 3


Chairman : 4 shares

Senior Member : 2shares

Senior Member : 2 shares

Junior Member : 1 shares

The Committee wants to automate the voting process and get a voting machine that
gets input from each member and then display the total number of shares. Each of
these persons has a switch to close when voting yes (Logic 1) and to open when voting
No (Logic 0) for his share.

You are a Design Engineer in the same corporation and have been asked to design
such a voting machine. The only ICs available to you are two 8x1 multiplexers, 3-input
NAND gates.

5. Draw a simplified Block Diagram of such a voting machine (You do not need to make
exact Logic Diagram).

EE-221: Digital Logic Design Page 4


6. There are four inputs to this machine (one for each member) and the output is a
binary number (4-bit). Draw the truth table for the Output Function.

Input Output
W X Y Z A B C D
0 0 0 0 0 0 0 0

0 1 1 0 0 1 0 0

1 0 0 0 0 1 0 0

1 1 1 1 1 0 0 1

7. You are provided with two 8- to-1 MUXs, so how many functions can you implement with
them?

8. Which of the following functions would you implement with MUX? Specify and also give their
Logic Diagram using MUX.

EE-221: Digital Logic Design Page 5


9. Give the PIN Configuration of the 8-to-1 MUX provided to you. IC name is 74151.

10. Give the Boolean expressions for the remaining two functions and also give their Logic
Diagram (You can only use 3-input NAND Gates).

Conclusion/Comments

EE-221: Digital Logic Design Page 6

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