Scribd
Upload
93 views

DLD LabReport2 (CSE 204) PDF

This lab report describes a digital logic design experiment to find sum of products (SOP) and product of sums (POS) expressions for Boolean functions. The student is asked to design circuit diagrams for four different functions using SOP and POS forms and verify the outputs match the truth tables. The student confirms that each circuit works correctly. In the analysis, the student notes they gained knowledge on topics like SOP, POS, truth tables, circuit implementation and design. The objectives of learning Boolean expressions and verifying truth tables using integrated circuits were achieved.

Uploaded by

Nahid Raihan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
93 views

DLD LabReport2 (CSE 204) PDF

This lab report describes a digital logic design experiment to find sum of products (SOP) and product of sums (POS) expressions for Boolean functions. The student is asked to design circuit diagrams for four different functions using SOP and POS forms and verify the outputs match the truth tables. The student confirms that each circuit works correctly. In the analysis, the student notes they gained knowledge on topics like SOP, POS, truth tables, circuit implementation and design. The objectives of learning Boolean expressions and verifying truth tables using integrated circuits were achieved.

Uploaded by

Nahid Raihan
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 6

Green University of Bangladesh

Department of Computer Science and Engineering(CSE)


Faculty of Sciences and Engineering
Semester: (Spring, Year:2023), B.Sc. in CSE (Day)

LAB REPORT NO #01


Course Title: Digital Logic Design Lab
Course Code: CSE-204 Section: 221-D10

Lab Experiment Name: Consider the truth tables in the given figure and find the SOP
and POS expressions for them.

Student Details

Name ID
1. Nahid Raihan 221002304

Lab Date : 22-03-2023


Submission Date : 17-04-2023
Course Teacher’s Name : Mahmuda Rahman

For Teachers use only:


Lab Report Status
Marks: ………………………………… Signature:.....................
Comments:.............................................. Date:..............................
1. TITLE OF THE LAB EXPERIMENT
Consider the truth tables in the given figure and find the SOP and POS expressions for them.

2. OBJECTIVES
● To attain knowledge on Boolean expression.
● To implement Boolean expression using integrated circuits (IC’s) and verify the truth
table.
● To implement De-Morgan’s Law and verify the truth table.

3. DESIGN
The canonical sum-of-products
(SOP) form for F is,
F (A, B, C) = m1 + m2 + m3 + m5 + m6 + m7
= A’B’C + A’BC’ + A’BC
+ AB’C + ABC’ + ABC
The canonical product-of-sums
(POS) form for F is
F (A, B, C) = M0 • M4
= (A + B + C) • (A’ + B + C)

The canonical SOP form for F is,


F (A, B, C) = m0 + m2 + m4 + m5 + m6
= A’B’C’ + A’BC’ + AB’C’
+ AB’C + ABC’
The canonical POS form for F is
f(A, B, C) = M1 • M3
= (A+ B + C’) • (A+ B’ + C’)
4. IMPLEMENTATION

Fig. A’B’C + A’BC’ + A’BC + AB’C + ABC’ + ABC

Fig. (A + B + C) • (A’ + B + C)
Fig. A’B’C’ + A’BC’ + AB’C’ + AB’C + ABC’

Fig. (A+ B + C’) • (A+ B’ + C’)


5. TEST RESULT
1. Design a circuit diagram for F (A, B, C) = A’B’C + A’BC’ + A’BC + AB’C + ABC’
+ ABC: By testing, it is confirmed that the gate is working as truth table.

2. Design a circuit diagram for F (A, B, C) = (A + B + C) • (A’ + B + C): By testing, it


is confirmed that the gate is working as truth table.
3. Design a circuit diagram for F (A, B, C) = A’B’C’ + A’BC’ + AB’C’ + AB’C +
ABC’: By testing, it is confirmed that the gate is working as truth table.

4. Design a circuit diagram for F (A, B, C) = (A+ B + C’) • (A+ B’ + C’): By testing, it
is confirmed that the gate is working as truth table.

6. ANALYSIS AND DISCUSSION


1. Every result is expected. Output of every gate gives the exact same output as the truth
tables.
2. Implication of SOP and POS went well.
3. Combining the gates has caused trouble.
4. Adding the inverted gates was the most difficult part.
5. The assignment helps to implement functions using SOP and POS.
6. I’ve learned SOP, POS, truth table, implementation, designing a circuit, and canonical
forms.
7. We have attained knowledge on DeMorgan's Law, basic gates, universal gates, truth
table, canonical forms, implementation, designing a circuit, SOP, POS and function
simplification. using an IC circuit , making gates and verified the truth tables. That
means, we've achieved our objectives.

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy