Syllabus of CMOS & VLSI DESIGN EC-415

Course Unit Title: CMOS & VLSI DESIGN

Course Unit Code: EC-415
Type of Course Unit: Technical Subject
Level of Course Unit: Undergraduate (Second Cycle)
Year of Study: 2
Semester/Trimester: Fall, Spring
Number of HimTU
Credits Allocated: 4

Course Coordinator: Er. Ankush Kapoor

Course Catalog VLSI Design flow, Circuit Characterization and Performance Estimation, CMOS Process
Description: Enhancement & Layout Considerations, Field Programmable Devices.

Course Description:
To understand basic fabrication process, with an emphasis on VLSI circuitry.

Learning Outcomes: Upon successful completion of the course, students will be able to:
A student who successfully fulfills the course requirements will have demonstrated:
1. An ability to design logic circuit layouts for both static CMOS and dynamic clocked CMOS circuits.
2. An ability to extract the analog parasitic elements from the layout and analyze the circuit timing
using a logic simulator and an analog simulator.
3. An ability to build a cell library to be used by other chip designers.
4. An ability to insert elementary testing hardware into the VLSI chip.
5. An ability to analyze VLSI circuit timing using Logical Effort analysis.
6. An ability to design elementary data paths for microprocessors, including moderate-speed adders,
subtracters, and multipliers.
7. An ability to estimate and compute the power consumption of a VLSI chip.
8. An ability to assemble an entire chip and add the appropriate pads to a layout
9. An ability to explain the chip technology scaling process

N = none S = Supportive H = highly related

Outcome Level Proficiency assessed by
(a) an ability to apply knowledge of Mathematics, science, and
H HW Problems, Exams
engineering
Design Problems in HW
(b) an ability to design and conduct experiments and interpret data H
and Exams
(c) an ability to design a system, component or process to meet desired
needs within realistic constraints such as economic, environmental,
N
social, political, ethical, health and safety, manufacturability, and
sustainability
(d) an ability to function as part of a multi-disciplinary team N
(e) an ability to identify, formulate, and solve ECE problems H HW Problems, Exams
(f) an understanding of professional and ethical responsibility N
(g) an ability to communicate in written and oral form S HW Problems -- Written
(h) the broad education necessary to understand the impact of electrical
and computer engineering solutions in a global, economic, N
environmental, and societal context
(i) a recognition of the need for, and an ability to engage in life-long Homework, discussions
H
learning during lectures
 (j) a knowledge of contemporary issues N
(k) an ability to use the techniques, skills, and modern engineering
H HW Problems, Exams
tools necessary for electrical and computer engineering practice
Basic disciplines in Electrical Engineering H HW Problems, Exams
Depth in Electrical Engineering H HW Problems, Exams
Verilog Simulations,
Basic disciplines in Computer Engineering H chip layout design,
layout simulations
Depth in Computer Engineering H HW Problems
Laboratory equipment and software tools H HW Problems
Lecture, office hour
Variety of instruction formats S
discussions
Mode of Delivery: Face-to-Face
Prerequisites and None
Co-requisites:

Course Contents: Week Topics

( Weekly Lecture Plan )
1 Introduction / Orientation
2 VLSI Design flow, Design Hierarchy, Regularity, Modularity and Locality.
3 VLSI design styles, Design quality, Packaging technology.
4 MOS device design equations, second order effects, the complementary
CMOS Inverter DC characteristics.
5 Circuit Characterization and Performance Estimation: Parasitic effect in Integrated Circuits,
Resistance estimation.
6 Capacitance estimation, Inductance. Switching characteristics, CMOS - Gate transistor sizing.
7 Midterm Exam
8 Power dissipation, CMOS Logic Structures, Clocking Strategies
9 CMOS Process Enhancement & Layout Considerations: Interconnect circuit elements.
10 Stick diagram, Layout design rules, Latch up, latch up triggering, latch up prevention,
Technology related CAD issues.
11 Subsystem Design: Structured design of combinational logic-parity generator
12 Multiplexer, code converters .Clocked sequential circuits-two phase clocking, charge storage,
dynamic register element, dynamic shift register.
13 Subsystem design process, Design of ALU subsystem, Adders, Multipliers. Commonly used
storage/ memory elements.
14 Field Programmable Devices: Definitions of Relevant Terminology, Evolution of
Programmable Logic Devices, User-Programmable Switch Technologies.
15 Computer Aided Design (CAD) Flow for FPDs, Programmable Logic, Programmable Logic
Structures, Programmable Interconnect.
16 Reprogrammable Gate Array, Commercially Available SPLDs, CPLDs and FPGAs, Gate
Array Design, Sea-of-Gates
Recommended or
Introduction to VLSI Circuits and Systems, John P. Uyemura John Wiley & Sons.
Required Reading:

Planned Learning
Activities and Teaching
Methods: Lectures, Presentation, Recitation, Demonstration
Assessment Methods Method Quantity (Marks)
and Criteria:
Quiz/Seminar/Tutorial/Assignments 10 25
12.5
Midterm Exam(s) 2
each
Final Exam 1 100
Language of
English
Instruction:
Work Placement(s): N/A
ECE Workload Total
Calculation Table: Time Period Workload
Activity Quantity (Hours/Unit) Hours
Class Participation
Course Period (15 Weeks for Classes + 2 Weeks for
Final Exams) 39 1 52
Preparation for EACH Assignment, Exam and Activity
Quiz/Seminar/Tutorial/Assignments 13
Midterm Exam(s) 4 (2 each)
Final Exam 1
Class Preparation
Weekly Time Spent Outside Classroom for Reading,
Review, Research and Other Activities 17
Total Workload 52