Exp2 - ARM Data Processing Instructions
Exp2 - ARM Data Processing Instructions
Each ARM instruction is encoded into a 32-bit word. Access to memory is provided only by Load and Store
instructions.
ARM data-processing instructions operate on data and produce new value.
They are not like the branch instructions that control the operation of the processor and sequencing of
instructions.
Arithmetic Instructions
Arithmetic instructions are very basic and frequently used in your ARM programming.
Here is a table that demonstrates the usage of the ARM processor's arithmetic instructions
with examples.
Mnemonic Meaning
------------------------------------------------------------------------
MOV R1, #0xFA05 ; Write value of 0xFA05 to R1, flags are not updated
------------------------------------------------------------------------
MOVS R11, #0x000B ; Write value of 0x000B to R11, flags get updated
------------------------------------------------------------------------
MOVS R10, R12 ; Write value in R12 to R10, flags get updated
------------------------------------------------------------------------
MOV R3, #23 ; Write value of 23 to R3
------------------------------------------------------------------------
MOV R8, SP ; Write value of stack pointer to R8
------------------------------------------------------------------------
MVNS R2, #0xF ; Write value of 0xFFFFFFF0 (bitwise inverse of 0xF)
; to the R2 and update flags.
------------------------------------------------------------------------
------------------------------------------------------------------------
AND R9, R2, R1 ; R9 = R2 AND R1
------------------------------------------------------------------------
AND R9, R2, #0xFF00 ; R9 = R2 AND #0xFF00
------------------------------------------------------------------------
ORR R9, R2, R1 ; R9 = R2 OR R1
------------------------------------------------------------------------
ORR R9, R2, #0xFF00
------------------------------------------------------------------------
ORREQ R2, R0, R5
------------------------------------------------------------------------
ANDS R9, R8, #0x19
------------------------------------------------------------------------
EOR R7, R11, R10 ; R7 = R11 XOR R10
------------------------------------------------------------------------
EORS R7, R11, #0x18181818
------------------------------------------------------------------------
BIC R0, R1, #0xab ; R0 = R1 AND (NOT(#0xab))
------------------------------------------------------------------------
ORN R7, R11, R14, ROR #4 ; R7 = R11 OR (NOT(R14 ROR #4))
------------------------------------------------------------------------
ORNS R7, R11, R14, ROR #2 ; update the flags
------------------------------------------------------------------------
Conditional Execution of Instructions
Each ARM instruction is encoded into a 32-bit word.
The basic encoding format for the instructions such as
Load, Store, Move, Arithmetic, and Logic instructions, is as follows:
An instruction specifies a conditional execution code (Condition), the OP code, two or three registers (Rn, Rd,
and Rm), and some other information.
Here is a more detailed description.
All the ARM instructions are conditionally executed depending on a condition specified in the
instruction(bits 31-28).
The instruction is executed only if the current state of the processor condition code
flag satisfies the condition specified in bits b31-b28 of the instruction.
For example:
CMP R0, #25 ; flags are updated according to (R0 - #25)
ADDGT R1, R2, #12
The instructions whose condition does not meet the processor condition code flag
are not executed.
One of the conditions is used to indicate that the instruction is always executed.
------------------------------------------------------------------------
LSL R4, R5, #2 ; Logical shift left by 2 bits
------------------------------------------------------------------------
LSR R4, R5, #6 ; Logical shift right by 6 bits
------------------------------------------------------------------------
LSLS R1, R2, #3 ; Logical shift left by 3 bits with flag update
------------------------------------------------------------------------
ROR R4, R5, R6 ; Rotate right by the value in the bottom byte of R6
------------------------------------------------------------------------
RRX R4, R5 ; Rotate right with extend (one bit only).
------------------------------------------------------------------------
Here are two links for your references.
;;; Directives
PRESERVE8
THUMB
__Vectors
DCD 0x20001000 ; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector
ALIGN
; The program
; Linker requires Reset_Handler
ENTRY
EXPORT Reset_Handler
Reset_Handler
MOV R0, #7 ; x = 7
MOV R5, #6
MUL R2, R0, R5 ; R2 = 6x
Examples:
LDR R0, NUM ; load R0 with the value of NUM in memory
LDR R6, = NUM ; Load the address of NUM to R6
MOV R0, #0x001C ; Load the value to the R0
STR R0, [R6] ; Store the value in R0 to NUM
Another Example
;;; Directives
PRESERVE8
THUMB
__Vectors
DCD 0x20001000 ; stack pointer value when stack is empty
DCD Reset_Handler ; reset vector
ALIGN
; The program
; Linker requires Reset_Handler
ENTRY
EXPORT Reset_Handler
Reset_Handler
;;;;;;;;;;User Code Start from the next line;;;;;;;;;;;;
MOV R0, #0
LSLS R3, R0, #2 ; Logical shift left by 2 bits with flag update
ALIGN
STOP
B STOP
END
Lab work:
You can convert temperatures from Celsius to Fahrenheit or from Fahrenheit to Celsius. Here are the
two formulas for your reference.
C = 5 * (F - 32) / 9
F = (9 * C / 5) + 32
Write an ARM assembly language program convertF2CandC2F.s.
You will do the following:
1. You can put the Fahrenheit temperature, say 70, in the register R0;
2. and have the converted temperature in Celsius in the register R1.
3. You can put a Celsius temperature, say 22 in register R2;
4. and have the converted temperature in Fahrenheit in the register R3.
5. Build the program if there are any bugs, fix them.
6. Run the program step by step and see how values are changing in the registers.
7. Make a screenshot to capture the results in your designated registers.