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Module 3 Course Material EDAC

This document provides an overview of IC design philosophy, specifically focusing on comparing MOSFETs and BJTs, IC biasing techniques like current sources and mirrors, and improving the performance of current mirror circuits. It describes the typical values and characteristics of MOSFETs and BJTs. It then explains basic current source and current mirror circuits using MOSFETs and BJTs, noting factors like output resistance and current transfer ratio. Finally, it discusses techniques for enhancing the accuracy and output resistance of current mirror circuits.

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0% found this document useful (0 votes)
36 views14 pages

Module 3 Course Material EDAC

This document provides an overview of IC design philosophy, specifically focusing on comparing MOSFETs and BJTs, IC biasing techniques like current sources and mirrors, and improving the performance of current mirror circuits. It describes the typical values and characteristics of MOSFETs and BJTs. It then explains basic current source and current mirror circuits using MOSFETs and BJTs, noting factors like output resistance and current transfer ratio. Finally, it discusses techniques for enhancing the accuracy and output resistance of current mirror circuits.

Uploaded by

Nick Wonka
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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UNIT-III

IC DESIGN PHILOSOPHY
IC Design Philosophy: comparison of the MOSFET and the BJT, IC biasing-current sources,
current mirrors and current-steering circuits, current-mirror circuits with improved
performance.

Learning Outcomes
After completion of this unit the student will be able to
 compare the relative merits and demerits of MOSFETs and BJTs in terms of trans
conductance, output resistance, intrinsic gain and transition frequency (L2).
 design a MOSFET current sink/source for desired current, voltage headroom, output
current and output resistance (L5).
 analyze the voltage headroom, output resistance of cascode current mirror and Wilson
current mirror (L4).

IC Design Philosophy: Introduction

Integrated-circuit fabrication technology poses constraints on-and provides opportunities to-


the circuit designer. Thus, while chip-area considerations dictate that large- and even
moderate-value resistors are to be avoided, constant-current sources are readily available
Very small capacitors, in the Pico farad and fraction of a Pico farad range, however, are easy
to fabricate in IC MOS technology and can be combined with MOS amplifiers and MOS
switches to realize a wide range of signal processing functions. As a general rule, in
designing IC MOS circuits, one should strive to realize as many of the functions required as
possible using MOS transistors only and, when needed, small MOS capacitors. MOS
transistors can be sized; that is, their W and L values can be selected, to fit a wide range of
design requirements.

The MOS-amplifier circuits that we shall study will be designed almost entirely using
MOSFETs of both polarities-that is, NMOS and PMOS-as are readily available in CMOS
technology. As mentioned earlier, CMOS is currently the most widely used IC technology for
analog and digital as well as combined analog and digital (or mixed-signal) applications.
Nevertheless, bipolar integrated circuits still offer many exciting opportunities to the analog
design engineer. This is especially the case for general-propose circuit packages, such as
high-quality op amps that are intended for assembly on printed-circuit (pc) boards (as
opposed to being part of a system-on-chip). As well, bipolar circuits can provide much higher
output currents and are favored for certain applications, such as in the automotive industry,
for their high reliability under severe environmental conditions. Finally, bipolar circuits can
be combined with CMOS in innovative and exciting ways.
Comparison of the MOSFET and the BJT:
Typical Values of MOSFET:

Typical Values of BJT:


IC Biasing—Current Sources, Current Mirrors, and Current-Steering Circuits:

All the circuits studied until now were simple, controlled current sources. Their
analysis has been done under the assumption that all the transistors are correctly biased in the
saturation or Active region. The issue, that has not been discussed, is the method used to
insure the correct biasing of the transistors. Practically the biasing conditions are reduced to
the generation of all the constant voltages in the circuit. The vast majority of the gate/base
potentials are generated by injecting a reference current in one or more diodes connected in
series. The voltage drop on these diodes will serve for stabilizing the gate-source (base-
emitter) voltages of the transistors in the current source. The resulting class of sub-circuits is
called current mirrors. The current mirrors are particularly useful for the distribution of bias
currents in larger circuits. They can also be employed as Active loads.

The performance requirements for current mirrors are similar as for current sources:

 The output resistance must be as large as possible in order to reduce the dependence
of the output current on the output voltage;

 The input resistance must be as small as possible;

 The minimum allowed output voltage must be as small as possible;

 The minimum input voltage must be also as small as possible;

 The current gain must be precisely defined, constant with the supply voltage and
temperature independent.

The Basic MOSFET Current Source:

The above Figure shows the circuit of a simple MOS constant-current source. The heart of
the circuit is transistor Q1, the drain of which is shorted to its gate, thereby forcing it to
operate in the saturation mode with
Where we have neglected channel-length modulation. The drain current of Q1 is supplied by
VDD through resistor R, which in most cases would be outside the IC chip. Since the gate
currents are zero,

Where the current through R is considered to be the reference current of the current source
and is denoted as IREF.

Now consider transistor Q2. It has the same VGS as Q1; thus, if we assume that it is operating
in saturation, its drain current, which is the output current I0 of the current source, will be

The above equations enable us to relate the output current I0 to the reference current IREF as
follows:

This is a simple and attractive relationship: The special connection of Q1and Q2 provides an
output current I0 that is related to the reference current IREF by the aspect ratios of the
transistors. In other words, the relationship between I0 and IREF is solely determined by the
geometries of the transistors. In the special case of identical transistors I0=IREF, and the circuit
simply replicates or mirrors the reference current in the output terminal. This has given the
circuit composed of Q1and Q2 the name current mirror, a name that is used irrespective of
the ratio of device dimensions.

Effect of VO on IO:

In the description above for the operation of the current source, we assumed Q2 to be
operating in saturation. This is essential if Q2 is to supply a constant- current output. To
ensure that Q2 is saturated, the circuit to which the drain of Q2 is to be connected must
establish a drain voltage VO that satisfies the relationship,

Although thus far neglected, channel-length modulation can have a significant effect on the
operation of the current source. Consider, for simplicity, the case of identical devices Q1 and
Q2. The drain current of Q2, IO, will equal the current in Q1, IREF, at the value of VO that
causes the two devices to have the same VDS, that is, at VO=VGS. As VO is increased above
this value, IO will increase according to the incremental output resistance r02 of Q2.
Finally, note that we can express the current IO as

MOS Current-Steering Circuits:

The above circuit represents MOS current steering circuit. Once a constant current has been
generated, it can be replicated to provide dc bias or load currents for the various amplifier
stages in an IC.

Here Q1 together with R determine the reference current IREF. Transistors Q1, Q2, and Q3
form a two-output current mirror,

To ensure operation in the saturation region, the voltages at the drains of Q2 and Q3 are
constrained as follows:

Where VOV1 is the overdrive voltage at which Q1, Q2 and Q3 are operating.
We see that current I3 is fed to the input side of a current mirror formed by PMOS transistors
Q4 and Q5. This mirror provides

Where I4=I5. To keep Q5 in saturation, its drain voltage should be

Finally, an important point to note is that in the circuit current steering, while Q2 pulls its
current I2 from a circuit, Q5 pushes its current I5 into a circuit. Thus Q5 is appropriately
called a current source, whereas Q2 should more properly be called a current sink. In an
IC, both current sources and current sinks are usually needed.

BJT Current Mirror Circuits:

The basic BJT current mirror is shown in above figure. It works in a fashion very similar to
that of the MOS mirror. However, there are two important differences: First, the nonzero base
current of the BJT (or, equivalently, the finite β) causes an error in the current transfer ratio
of the bipolar mirror. Second, the current transfer ratio is determined by the relative areas of
the emitter–base junctions of Q1 and Q2.

Let us first consider the case of β sufficiently high that we can neglect the base currents. The
reference current is passed through the diode-connected transistor Q1 and thus establishes a
corresponding voltage VBE, which in turn is applied between base and emitter of Q2. Now, if
Q2 is matched to Q1 or, more specifically, if the EBJ area of Q2 is the same as that of Q1,
and thus has the same scale current IS as Q1, then the collector current of Q2 will be equal to
that of Q1 that is,

For this to happen, however, Q2 must be operating in the active mode, which in turn is
achieved as long as the collector voltage VO is 0.3 V or so higher than that of the emitter.

We consider the effect of finite transistor β on the current transfer ratio. The analysis for the
case in which the current transfer ratio is nominally unity—that is, for the case in which Q2 is
matched to Q1. The key point here is that since Q1 and Q2 are matched and have the same
VBE their collector currents will be equal. A node equation at the collector of Q1 yields from
the circuit below as

Taking both the finite β and the finite R0 into account, we can express the output current of a
BJT mirror with a nominal current transfer ratio m as

Current-Mirror Circuits with Improved Performance:

As we have seen throughout, current sources play a major role in the design of IC amplifiers:
The constant-current source is used both in biasing and as active load. Simple forms of both
MOS and bipolar current sources and, more generally, current mirrors were analysed above.
The need to improve the characteristics of the simple sources and mirrors has already been
demonstrated. Specifically, two performance parameters need to be addressed: the accuracy
of the current transfer ratio of the mirror and the output resistance of the current source.

The accuracy of the current transfer ratio suffers particularly from the finite β of the BJT. The
output resistance, which in the simple circuits is limited to ro of the MOSFET and the BJT,
also reduces accuracy and, much more seriously.
Cascode MOS Mirrors:

Above figure shows the basic cascode current mirror. Observe that in addition to the diode
connected transistor Q1, which forms the basic mirror Q1–Q2, another diode-connected
transistor, Q4, is used to provide a suitable bias voltage for the gate of the cascode transistor
Q3. To determine the output resistance of the cascode mirror at the drain of Q3, we assume
that the voltages across Q1 and Q4 are constant, and thus the signal voltages at the gates of
Q2 and Q3 will be zero. Thus Ro will be that of the cascode current source formed by Q2 and
Q3,

A drawback of the cascode current mirror is that it consumes a relatively large portion of the
steadily shrinking supply voltage VDD. While the simple MOS mirror operates properly with
a voltage as low as VOV across its output transistor, the cascode circuit requires a minimum
voltage of Vt 2VOV. This is because the gate of Q3 is at 2VGS 2Vt 2VOV. Thus the minimum
voltage required across the output of the cascode mirror is 1 V or so. This obviously limits
the signal swing at the output of the mirror

A Bipolar Mirror with Base-Current Compensation:

Figure shows a bipolar current mirror with a current transfer ratio that is much less dependent
on β than that of the simple current mirror. The reduced dependence on β is achieved by
including transistor Q3, the emitter of which supplies the base currents of Q1 and Q2. The
sum of the base currents is then divided by β3 1, resulting in a much smaller error current
that has to be supplied by IREF. Detailed analysis is shown on the circuit diagram; it is based
on the assumption that Q1 and Q2 are matched and thus have equal collector currents, IC. A
node equation at the node labeled x gives

which means that the error due to finite β has been reduced from 2/β in the simple mirror to
2/β2 a tremendous improvement. Unfortunately, however, the output resistance remains
approximately equal to that of the simple mirror, namely ro.

The Wilson BJT Current Mirror:

A simple but ingenious modification of the basic bipolar mirror results in both reducing the β
dependence and increasing the output resistance. The resulting circuit, known as the Wilson
mirror.
To determine the output resistance of the Wilson mirror, we set IREF = 0 and apply a test
voltage vx to the output node, as shown in Fig. (b). Our purpose is to determine the current ix
and hence as

The Wilson MOS Mirror:


Thus, the Wilson MOS mirror exhibits an increase of output resistance by a factor gm3ro3), an
identical result to that achieved in the cascode mirror. Here the increase in Ro, as demonstrated
in the analysis above, is a result of the negative feedback obtained by connecting the drain of
Q2 to the gate of Q3

The Widlar Current Source:

It differs from the basic current mirror circuit in an important way: A resistor RE is included
in the emitter lead of Q2. Neglecting base currents we can write
We observe that using the Widlar circuit allows the generation of a small constant current
using relatively small resistors. This is an important advantage that results in considerable
savings in chip area. Another important characteristic of the Widlar current source is that its
output resistance is high. The increase in the output resistance, above that achieved in the
basic current source, is due to the emitter-degeneration resistance RE.

The output resistance of the Widlar circuit is given as

Thus the output resistance is increased above r0 by a factor that can be significant.

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