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SN 74 Als 35 A

The document describes the SN74ALS35A integrated circuit which contains six independent non-inverters with open-collector outputs. Each non-inverter performs the Boolean function of Y=A, where the open-collector output requires a pull-up resistor. The IC can be used to implement wired-OR or wired-AND functions. It is characterized to operate between 0-70 degrees Celsius.

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0% found this document useful (0 votes)
60 views10 pages

SN 74 Als 35 A

The document describes the SN74ALS35A integrated circuit which contains six independent non-inverters with open-collector outputs. Each non-inverter performs the Boolean function of Y=A, where the open-collector output requires a pull-up resistor. The IC can be used to implement wired-OR or wired-AND functions. It is characterized to operate between 0-70 degrees Celsius.

Uploaded by

josecente123321
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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SDAS011C − DECEMBER 1983 − REVISED DECEMBER 1994

• Noninverter With Open-Collector Outputs D OR N PACKAGE

• Package Options Include Plastic


(TOP VIEW)

Small-Outline (D) Packages and Standard


1A 1 14 VCC
Plastic (N) 300-mil DIPs
1Y 2 13 6A
2A 3 12 6Y
description
2Y 4 11 5A
The SN74ALS35A contains six independent 3A 5 10 5Y
noninverters with open-collector outputs. They 3Y 6 9 4A
perform the Boolean function Y = A. The GND 7 8 4Y
open-collector outputs require pullup resistors to
perform correctly. These outputs may be
connected to other open-collector outputs to
implement active-low wired-OR or active-high
wired-AND functions. Open-collector devices are
often used to generate higher VOH levels.
The SN74ALS35A is characterized for operation
from 0°C to 70°C.

FUNCTION TABLE
(each buffer)
INPUT OUTPUT
A Y
H H
L L

logic symbol† logic diagram (positive logic)


1 2 1 2
1A 1Y 1A 1Y
3 4
2A 2Y
5 6 3 4
3A 3Y 2A 2Y
9 8
4A 4Y
11 10 5 6
5A 5Y 3A 3Y
13 12
6A 6Y
9 8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and 4A 4Y
IEC Publication 617-12.
11 10
5A 5Y

13 12
6A 6Y

     ! "#$ !  %#&'" ($) Copyright  1994, Texas Instruments Incorporated
(#"! "  !%$""! %$ *$ $!  $+! !#$!
!(( ,-) (#" %"$!!. ($!  $"$!!'- "'#($
$!.  '' %$$!)

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1


POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443

   
      
SDAS011C − DECEMBER 1983 − REVISED DECEMBER 1994

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Input voltage, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Off-state output voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 V
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0°C to 70°C
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

recommended operating conditions


MIN NOM MAX UNIT
VCC Supply voltage 4.5 5 5.5 V
VIH High-level input voltage 2 V
VIL Low-level input voltage 0.8 V
VOH High-level output voltage 5.5 V
IOL Low-level output current 8 mA
TA Operating free-air temperature 0 70 °C

electrical characteristics over recommended operating free-air temperature range (unless


otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP‡ MAX UNIT
VIK VCC = 4.5 V, II = −18 mA −1.2 V
IOL = 4 mA 0.25 0.4
VOL VCC = 4.5 V V
IOL = 8 mA 0.35 0.5
II VCC = 5.5 V, VI = 7 V 0.1 mA
IIH VCC = 5.5 V, VI = 2.7 V 20 µA
IIL VCC = 5.5 V, VI = 0.4 V −0.1 mA
IOH VCC = 4.5 V, VOH = 5.5 V 0.1 mA
ICCH VCC = 5.5 V, VI = 4.5 V 2.7 4.7 mA
ICCL VCC = 5.5 V, VI = 0 4.1 6.3 mA
‡ All typical values are at VCC = 5 V, TA = 25°C.

switching characteristics (see Figure 1)


VCC = 4.5 V to 5.5 V,
CL = 50 pF,
FROM TO RL = 2 k Ω,
PARAMETER UNIT
(INPUT) (OUTPUT) TA = MIN to MAX§
MIN MAX
tPLH 20 50
A Y ns
tPHL 2 14
§ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.

2 •
POST OFFICE BOX 655303 DALLAS, TEXAS 75265

POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443

   
      
SDAS011C − DECEMBER 1983 − REVISED DECEMBER 1994

PARAMETER MEASUREMENT INFORMATION


SERIES 54ALS/74ALS AND 54AS/74AS DEVICES
7V
VCC RL = R1 = R2

S1
RL
R1
From Output Test From Output Test From Output Test
Under Test Point Under Test Point Under Test Point
CL RL CL
CL R2
(see Note A) (see Note A)
(see Note A)

LOAD CIRCUIT FOR


BI-STATE LOAD CIRCUIT LOAD CIRCUIT
TOTEM-POLE OUTPUTS FOR OPEN-COLLECTOR OUTPUTS FOR 3-STATE OUTPUTS

Timing 3.5 V High-Level 3.5 V


Input 1.3 V Pulse 1.3 V 1.3 V
0.3 V 0.3 V
th tw
tsu
3.5 V 3.5 V
Data Low-Level
Input 1.3 V 1.3 V 1.3 V 1.3 V
Pulse
0.3 V 0.3 V

VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS


SETUP AND HOLD TIMES PULSE DURATIONS

3.5 V
Output
Control 1.3 V 1.3 V
(low-level
enabling) 0.3 V 3.5 V
tPZL Input 1.3 V 1.3 V
tPLZ
0.3 V
[3.5 V
Waveform 1 tPLH tPHL
S1 Closed 1.3 V
In-Phase VOH
(see Note B) 1.3 V 1.3 V
VOL Output
tPHZ 0.3 V VOL
tPZH tPLH
VOH tPHL
Waveform 2 VOH
Out-of-Phase
S1 Open 1.3 V 0.3 V 1.3 V 1.3 V
Output
(see Note B) (see Note C) VOL
[0 V
VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS PROPAGATION DELAY TIMES

NOTES: A. CL includes probe and jig capacitance.


B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. When measuring propagation delay items of 3-state outputs, switch S1 is open.
D. All input pulses have the following characteristics: PRR ≤ 1 MHz, tr = tf = 2 ns, duty cycle = 50%.
E. The outputs are measured one at a time with one transition per measurement.

Figure 1. Load Circuits and Voltage Waveforms


POST OFFICE BOX 655303 DALLAS, TEXAS 75265 3

POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443
PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

PACKAGING INFORMATION

Orderable Device Status Package Type Package Pins Package Eco Plan Lead finish/ MSL Peak Temp Op Temp (°C) Device Marking Samples
(1) Drawing Qty (2) Ball material (3) (4/5)
(6)

SN74ALS35AD ACTIVE SOIC D 14 50 RoHS & Green NIPDAU Level-1-260C-UNLIM 0 to 70 ALS35A

SN74ALS35AN ACTIVE PDIP N 14 25 RoHS & Green NIPDAU N / A for Pkg Type 0 to 70 SN74ALS35AN

(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.

(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.

(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.

(6)
Lead finish/Ball material - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead finish/Ball material values may wrap to two
lines if the finish value exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 1
PACKAGE OPTION ADDENDUM

www.ti.com 10-Dec-2020

Addendum-Page 2
PACKAGE MATERIALS INFORMATION

www.ti.com 1-Jul-2023

TUBE

T - Tube
height L - Tube length

W - Tube
width

B - Alignment groove width

*All dimensions are nominal


Device Package Name Package Type Pins SPQ L (mm) W (mm) T (µm) B (mm)
SN74ALS35AD D SOIC 14 50 506.6 8 3940 4.32
SN74ALS35AN N PDIP 14 25 506 13.97 11230 4.32
SN74ALS35AN N PDIP 14 25 506 13.97 11230 4.32

Pack Materials-Page 1
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Copyright © 2023, Texas Instruments Incorporated

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