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23ucc597 Asgn 6

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24 views5 pages

23ucc597 Asgn 6

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23ucc597
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© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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ASSIGNMENT 6

Name: Saurav Kumar Roll No: 23ucc597

Q.1
Design Code:
Half adder:
module half_adder(input A,input B,output Cout,output Sum);
assign Sum=(A^B);
assign Cout= A&B;
endmodule

Full adder:
module full_adder(input A,input B,input Cin,output Cout,output Sum);
assign Sum=Cin^(A^B);
assign Cout= A&B | Cin&B | Cin&A;
endmodule

MH module:
module MH(input A,B,C,output Cout,Sum);
wire w;
assign w=A&B;
half_adder h1(.A(w),.B(C),.Cout(Cout),.Sum(Sum));
endmodule

MF module:
module MF(input A,B,C,sum_in,output Cout,Sum);
wire w;
assign w=A&B;
full_adder f1(.A(w),.B(sum_in),.Cin(C),.Cout(Cout),.Sum(Sum));
endmodule

One Level:
module mul_8x1 (
input [7:0] a,
input b,
output [7:0] o,
output c
);
wire [6:0] w;
MH h1(.A(a[0]), .B(~b), .C(w[0]), .Cout(o[0]), .Sum(w[0]));
MF
f1(.A(a[1]), .B(~b), .C(w[1]), .sum_in(w[0]), .Cout(o[1]), .Sum(o[1]));
MF
f2(.A(a[2]), .B(~b), .C(w[2]), .sum_in(w[1]), .Cout(o[2]), .Sum(o[2]));
MF
f3(.A(a[3]), .B(~b), .C(w[3]), .sum_in(w[2]), .Cout(o[3]), .Sum(o[3]));
MF
f4(.A(a[4]), .B(~b), .C(w[4]), .sum_in(w[3]), .Cout(o[4]), .Sum(o[4]));
MF
f5(.A(a[5]), .B(~b), .C(w[5]), .sum_in(w[4]), .Cout(o[5]), .Sum(o[5]));
MF
f6(.A(a[6]), .B(~b), .C(w[6]), .sum_in(w[5]), .Cout(o[6]), .Sum(o[6]));
MF f7(.A(a[7]), .B(~b), .C(c), .sum_in(w[6]), .Cout(o[7]), .Sum(o[7]));
endmodule

TEST BENCH
module testbench;
reg [7:0] a;
reg [7:0] b;
wire [15:0] product;
multiplier_8x8 y1 (
.a(a),
.b(b),
.product(product)
);
initial begin
a = 8’b00001010; // 10 in decimal
b = 8’b00000110; // 6 in decimal
#10;
$finish;
end

initial begin
$monitor(“At time %d, a = %b, b = %b, product = %b”, $time, a, b, product);
end
endmodule

Waveform:
Schematic diagram

Q-2
Design code:
module ALU(
input [7:0] a,
input [7:0] b,
input [2:0] e,
output reg [7:0] y,
output reg [15:0] u
);
wire [7:0] z;
wire [15:0] k;
wire c1, c2;
cripple r1 (a[3:0], b[3:0], 0, z[3:0], c1);
cripple r2 (a[7:4], b[7:4], c1, z[7:4], c2);
multiplier_8x8 m1 (a, b, k);
always @(a, b, e)
begin
case(e)
0: y = 8'b0;
1: y = a&b;
2: y = a|b;
3: y = ~a;
4: y = a^b;
5: y = z;
6: y = a-b;
7: u = k;
endcase
end
endmodule

Testbench

module ALU_tb( );
reg [7:0] a, b;
reg [2:0] e;
wire [7:0] y;
wire [15:0] u;
integer i;

ALU dut (.a(a), .b(b), .e(e), .y(y), .u(u));


initial begin
for(i=0; i<8; i=i+1)
begin
a=$urandom_range(255, 0);
b=$urandom_range(255, 0);
e = i;
#2;
end
$stop;
end
endmodule

Schematic Diagram:

Output Waveform:

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