Digital Fundamentals
Digital Fundamentals
MENT
using electronic components like diodes,
transistors, resistors, and more.
As the name implies, a logic gate is designed to
AND GATE
In digital electronics, the AND gate is one of the basic logic gate that
performs the logical multiplication of inputs applied to it.
It generates a high or logic 1 output, only when all the inputs applied to it are
high or logic 1. Otherwise, the output of the AND gate is low or logic 0.
𝑍=𝐴.𝐵Z=A.B
For two-input AND gate, the Boolean expression is given by,
Where, A and B are inputs to the AND gate, while Z denotes the output of the AND
gate.
𝑍=𝐴.𝐵.𝐶.𝐷…Z=A.B.C.D…
We can extend this expression to any number of input variables, such as,
A B A AND B
0 0 0
0 1 0
1 0 0
1 1 1
OR GATE
In digital electronics, there is a type of basic logic gate which produces a low
or logic 0 output only when its all inputs are low or logic 0.
For all other input combinations, the output of the OR gate is high or logic 1.
This logic gate is termed as OR gate.
An OR gate can be designed to have two or more inputs but only one output.
The primary function of the OR gate is to perform the logical sum operation.
PROPERTIES OF OR GATE:
A B A OR B
0 0 0
0 1 1
1 0 1
1 1 1
SYMBOL OF OR GATE:
NOT GATE
In digital electronics, the NOT gate is another basic logic gate used to perform
compliment of an input signal applied to it.
It takes only one input and one output. The output of the NOT gate is
complement of the input applied to it.
Therefore, if we apply a low or logic 0 output to the NOT gate is gives a high
or logic 1 output and vice-versa. The NOT gate is also known as inverter, as it
performs the inversion operation.
𝑍=𝐴‾Z=A
is given below.
The bar over the input variable A represents the inversion operation.
The truth table describes the relationship between input and output. The following is
the truth table for the NOT gate:
Input Output
A NOT A
0 1
1 0
The logic circuit symbol of a NOT gate is shown in the following figure. Here, A is
the input line and Z is the output line.
NOR GATE
The NOR gate is a type of universal logic gate that can take two or more
inputs but one output.
It is basically a combination of two basic logic gates i.e., OR gate and NOT
gate. Thus, it can be expressed as,
NOR Gate = OR Gate + NOT Gate
In other words, a NOR gate is an OR gate followed by a NOT gate.
𝐶=𝐴+𝐵‾C=A+B
The boolean expression of a two input NOR gate is given below:
The following is the truth table of a two-input NOR gate showing the relationship
between its inputs and output:
Input Output
A B A NOR B
0 0 1
0 1 0
1 0 0
1 1 0
Symbol of the NOR Gate
NAND GATE
In digital electronics, the NAND gate is another type of universal logic gate
used to perform logical operations.
The NAND gate performs the inverted operation of the AND gate. Similar to
NOR gate, the NAND gate can also have two or more input lines but only one
output line.
The NAND gate is also represented as a combination of two basic logic gates
namely, AND gate and NOT gate. Hence, it can be expressed as
NAND Gate = AND Gate + NOT Gate
NAND gate can take two or more inputs at a time and produces one output based
on the combination of inputs applied.
NAND gate produces a low or logic 0 output only when its all inputs are high or
logic 1.
We can describe the expression of NAND gate through a mathematical equation
called its Boolean expression. Here is the Boolean expression of a two input NAND
𝐶=𝐴𝐵‾C=AB
gate.
In this expression, A and B are the input variables and C is the output variable. We
can extend this relation to any number of input variables like three, four, or more.
The truth table is a table of inputs and output that describes the operation of the
NAND gate and shows the logical relationship between them:
Input Output
A B A NAND B
0 0 1
0 1 1
1 0 1
1 1 0
The logic symbol of a NAND gate is represented as a AND gate with a bubble on its
output end as depicted in the following figure. It is the symbol of a two-input NAND
gate.
XOR GATE
𝑍=𝐴⊕𝐵Z=A⊕B
output of the XOR gate.
Here, Z is the output variable, and A and B are the input variables.
𝑍=𝐴𝐵‾+𝐴‾𝐵Z=AB+AB
This expression can also be written as follows:
Input Output
A B A XOR B
0 0 0
0 1 1
1 0 1
1 1 0
XNOR GATE
The XNOR gate is another type of special purpose logic gate used to
implement exclusive operation in digital circuits.
It is used to implement the Exclusive NOR operation in digital circuits. It is
also called the Ex-NOR or Exclusive NOR gate.
It is a combination of two logic gates namely, XOR gate and NOT gate.
Thus, it can be expressed as,
XNOR Gate = XOR Gate + NOT Gate
The output of an XNOR gate is high or logic 1 when its both inputs are similar.
Otherwise the output is low or logic 0. Hence, the XNOR gate is used as a similarity
detector circuit.
𝑌=𝐴⊙𝐵Y=A⊙B
XNOR gate.
𝑌=𝐴𝐵+𝐴‾𝐵‾Y=AB+AB
We can also write this expression as follows:
The truth table of the XNOR gate is given below. This truth table is describing the
relationship between inputs and output of the XNOR gate.
Input Output
A B A XNOR B
0 0 1
0 1 0
Input Output
1 0 0
1 1 1
The logic symbol of XNOR gate is shown in the following figure. Here, A and B are
inputs and Y is the output.
LOGIC FAMILY
Logic families are different types of technologies being used to build different
logic gates. Logic gates are digital circuits that perform basic logic operations
like AND, OR, NOT, NAND, and NOR.
In other words, it is a group of compatible ICs with the same logic levels and
supply voltages fabricated for performing various logical functions.
Classification of Logic Families
Logic families can be broadly categorized as per the following diagram
UNIPOLAR LOGIC FAMILIES
Low power consumption – CMOS circuit consumes very low power, making
them ideal for battery-powered devices.
Low cost – The CMOS fabrication process is relatively simpler compared to
other semiconductor technologies.
High reliability and noise immunity – They are considered to have a high noise
margin and thus are good for circuits that require high tolerance to noise.
Limited Voltage Swing – They have a low voltage range of operation, making
them less suitable for high voltage operations.
Process Variation – The CMOS fabrication process is highly dependent on
process conditions, leading to variations that can affect the performance and
reliability of the final product.
Vulnerability to electrostatic discharge – CMOS is greatly affected by
electrostatic discharge leading to permanent device damage on exposure.
BIPOLAR LOGIC FAMILIES
In bipolar devices, the conduction happens due to both charge carriers –
electrons and holes. Bipolar logic families use semiconductor diodes and
bipolar junction transistors as the basic building blocks of logic circuits.
The simplest bipolar logic elements use diodes and resistors to perform logic
operations; this is called diode logic. Most TTL logic gates use diode logic
internally and boost their output drive capability using transistor circuits.
Some TTL gates use parallel configurations of transistors to perform logic
functions. ECL gates use transistors as current switches to achieve very high
speed.
There are further classifications of the bipolar logic family in two types
SATURATED
In this logic, the bipolar junction transistors(BJTs) used are operated in
saturated regions.
This means that both the emitter-base and collector-base junctions are
forward-biased, allowing maximum current flow through the transistor.
Characteristics of Saturated Logic Families
Can allow relatively higher current through transistors
Very fast state switching
Higher power consumption than non-saturated logic families.
Better noise immunity
Examples include Transistor-Transistor Logic (TTL), Diode Transistor Logic
(DTL), and Resistor Transistor Logic (RTL). TTL is the most popular category in
this classification.
TRANSISTOR-TRANSISTOR LOGIC (TTL)
Transistor-transistor logic (TTL) is a digital logic family employing bipolar
junction transistors (BJTs) to uphold logic states and facilitate switching
operations..
CHARACTERISTICS OF TTL
Logic Voltage Levels: TTL logic inputs are classified as logical high when they
fall between 2V and 5V, and logical low when within the range of 0V to 0.8V.
Propagation Delay: TTL stands out for having the minimal propagation delay
among digital integrated circuits (ICs).
Power Dissipation: A standard TTL device consumes approximately 10mW of
power.
Noise Margin: TTL boasts a noise margin of about 0.4V
Fan Out: Typically, TTL exhibits a fan-out capability of 10.
Supply Voltage: TTL necessitates a supply voltage ranging between 4.75 V and
5.25 V.
Speed: TTL is renowned for its rapid switching speed.
Compatibility: TTL devices are compatible with other TTL devices.
DIODE TRANSISTOR LOGIC (DTL)
In Diode Transistor Logic, diodes are used for AND and OR operations while
transistors are used for logical inversion and amplification.
DTL is used to design and fabricate digital circuits that use diodes in the input
stage and BJTs at the output stage.
DTL is a type of circuit used in current digital electronics for processing
electrical signals.
CHARACTERISTICS OF DTL
Noise margin: DTL circuits have better noise performance than that of RTL due
to high noise margin
Fan-out: DTL circuits typically have High fan-out.
Logic low level: 0 or 0.2V
Logic high level: 5V
Average propagation delay: Average delay is of 9ns which lies between that of
RTL and TTL
Power dissipation: A few milliwatts to about 50 mW
Comparatively lower current flow than the saturated logic family’s transistors
Slower switching speed
Lower power consumption
Examples include Emitter Coupled Logic (ECL) and Schottky TTL.
EMITTER COUPLED LOGIC (ECL) FAMILY
Emitter-coupled logic (ECL) is a bipolar transistor logic family that is
considered to be the fastest logic available.
ECL is used in high-performance applications, such as: Clock-distribution
circuits, High-frequency-based applications, Fiber-optic transceiver
interfaces, Ethernet, and ATM (Asynchronous Transfer Mode) networks.
SCHOTTKY TTL
Schottky TTL employs an internal architecture akin to standard TTL, with the
notable inclusion of Schottky transistors. These transistors are essentially
conventional bipolar transistors augmented with a Schottky diode bridging the
base-collector junction.
A Schottky diode, characterized by its semiconductor-metal composition,
boasts a notably low cut-in voltage of typically 300 millivolts, in contrast to
the 600 mV threshold of other prevalent semiconductor diodes. This low cut-
in voltage restricts the base-collector voltage to approximately 400 mV,
effectively preventing the transistor from entering saturation. Consequently,
this limitation mitigates the transition time required for the transistor to shift
from saturation to cutoff state.
CHARACTERISTICS OF SCHOTTKY TTL LOGIC FAMILY
Low power consumption: They basically operate in non-saturated region so
usually have less power consumed compared to normal TTL family.
Reduced switching time: Schottky diodes have a low forward voltage drop,
often between 0.3 and 0.5 volts, which enables quicker switching time. In other
words, Schottky TTL is faster.
Reduced propagation delay time: By preventing saturation of transistors, it
reduces the propagation delay.
Simple Circuit design: It has low complexity compared to ECL family.
Characteristics of a Logic Family
Operating Speed: This refers to the time taken for the output voltage to change
in response to a change in the input voltage. It is desirable for this time to be
minimized.
Fan-in: This denotes the number of inputs connected to a logic gate. For
instance, in an AND gate, the fan-in is 2, whereas in a NOT gate, it’s 1.
Fan-out: Fan-out indicates the total number of outputs that a gate can manage
without significant alteration in output voltage.
Noise Immunity: Noise immunity gauges the capacity of a circuit to endure
noise or electrical interference without causing a notable deviation in the output.
Power Dissipation: Power dissipation refers to the power required for operation.
When a circuit transitions from one state to another, power is dissipated.
Typically, there are two forms of dissipation: static power dissipation, which is
the power consumed when the circuit’s state remains unchanged, and dynamic
power dissipation, which is the power utilized during state transitions.
Comparison of a Logic Family
The following table presents a comprehensive comparison of popular logic families
on various parameters
Parameters TTL CMOS ECL RTL
Transistors,
Basic Resistor resistor and
diodes, and MOSFETs
element and transistors transistors
resistors
Propagation
10ns 70ns 2ns 12ns
Delay
margin
Power
10mW 0.1mW 40-50mW 30mW
dissipation
Circuit moderately
complex complex simple
complexity complex
battery-powered
practically
Oscilloscopes, circuits due to low high-speed
obsolete due
Application measurement power switching
to poor noise
devices consumption, application
margin
mobile equipment
Applications of CMOS
Applications of TTL
Applications of ECL
FAQs
BOOLEAN ALGEBRA
Boolean algebra is a type of algebra that is created by operating the binary system.
This is a variant of Aristotle’s propositional logic that uses the symbols 0 and
1, or True and False. Boolean algebra is concerned with binary variables and
logic operations.
Boolean algebra is fundamental in the development of digital electronics
systems as they all use the concept of Boolean algebra to execute commands.
There are various operations that are used in Boolean algebra but the basic
operations that form the base of Boolean algebra are.
Negation or NOT Operation
Conjunction or AND Operation
Disjunction or OR Operation
These operations have their own symbols and precedence and the table added below
shows the symbol and the precedence of these operators.
Operator Symbol Precedence
OR + (or) ∨ Third
Using the NOT operation reverse the value of the Boolean variable from 0 to 1 or
vice-versa. This can be understood as:
If A = 1, then using NOT operation we have (A)’ = 0
If A = 0, then using the NOT operation we have (A)’ = 1
We also represent the negation operation as ~A, i.e if A = 1, ~A = 0
Using the AND operation satisfies the condition if both the value of the individual
variables are true and if any of the value is false then this operation gives the
negative result. This can be understood as,
If A = True, B = True, then A . B = True
If A = True, B = False, Or A = false, B = True, then A . B = False
If A = False, B = False, then A . B = False
Using the OR operation satisfies the condition if any value of the individual
variables is true, it only gives a negative result if both the values are false. This can
be understood as,
If A = True, B = True, then A + B = True
If A = True, B = False, Or A = false, B = True, then A + B = True
If A = False, B = False, then A + B = False
P + Q = R is a Boolean phrase in which P, Q, and R are Boolean variables that can only
store two values: 0 and 1.
The 0 and 1 are the synonyms for false and True and are used in Boolen Algebra,
sometimes we also use “Yes” in place of True and “No” in place of False.
Thus, we can say that statements using Boolean variables and operating on Boolean
operations are Boolean Expressions. Some examples of Boolean expressions are,
A + B = True
A.B = True
(A)’ = False
There are various terminologies related to Boolean Algebra, which are used to
explain various parameters of Boolean Algebra. That includes,
Boolean Algebra
Boolean Variables
Boolean Function
Literal
Complement
Truth Table
BOOLEAN ALGEBRA
The branch of algebra that deals with binary operations or logical operations is called
Boolean Algebra.
BOOLEAN VARIABLES
Variables used in Boolean algebra that store the logical value of 0 and 1 are called
the boolean variables. They are used to store either true or false values.
BOOLEAN FUNCTION
A function of the Boolean Algebra that is formed by the use of Boolean variables
and Boolean operators is called the Boolean function.
LITERAL
COMPLEMENT
The inverse of the Boolean variable is called the complement of the variable . The
complement of 0 is 1 and the complement of 1 is 0. It is represented by ‘ over the
variable.
TRUTH TABLE
Table containing all the possible values of the logical variables and the combination
of the variable along with the given operation is called the truth table. The number
of rows in the truth table depends on the total Boolean variables used in that
function. It is given by using the formula,
Number of Rows in Truth Table = 2 n
where “n” is the number of Boolean variables used.
A truth table represents all the combinations of input values and outputs in a
tabular manner.
All the possibilities of the input and output are shown in it and hence the
name truth table.
In logic problems, truth tables are commonly used to represent various cases.
T or 1 denotes ‘True’ & F or 0 denotes ‘False’ in the truth table.
Example: Draw the truth table of the conditions A + B and A.B where A and b are
boolean variables.
Solution:
The required Truth Table is,
X=A+B
A B Y = A.B
T T T T
T F T F
F T T F
F F F F
The basic laws of the Boolean Algebra are added in the table added below,
Identity Law
In the Boolean Algebra, we have identity elements for both AND(.) and OR(+)
operations. The identity law state that in boolean algebra we have such variables that
on operating with AND and OR operation we get the same result, i.e.
A+0=A
A.1 = A
Commutative Law
Binary variables in Boolean Algebra follow the commutative law. This law states
that operating boolean variables A and B is similar to operating boolean variables B
and A. That is,
A. B = B. A
A+B=B+A
Associative Law
Associative law state that the order of performing Boolean operator is illogical as
their result is always the same. This can be understood as,
(A.B).C=A.(B.C)
( A + B ) + C = A + ( B + C)
Distributive Law
Boolean Variables also follow the distributive law and the expression for
Distributive law is given as:
A . ( B + C) = (A . B) + (A . C)
Inversion Law
Inversion law is the unique law of Boolean algebra this law states that, the
complement of the complement of any number is the number itself.
(A’)’ = A
Apart from these other laws are mentioned below:
AND Law
AND law of the Boolean algebra uses AND operator and the AND law is,
A.0=0
A.1=A
A.A=A
OR Law
OR law of the Boolean algebra uses OR operator and the OR law is,
A+0=A
A+1=1
A+A=A
De Morgan’s Laws are also called Demorgan’s Theorem. They are the most
important laws in Boolen Algebra and these are added below under the heading
Boolean Algebra Theorem
T T F F F F
T F F T T T
F T T F T T
F F T T T T
States that: The Complement of the sum (OR) of two Boolean variables (or
expressions) is equal to the product(AND) of the complement of each Boolean
variable (or expression).
(P + Q)’ = (P)’.(Q)’
Proof:
The truth table for the same is given below:
P Q (P)’ (Q)’ (P + Q)’ (P)’.(Q)’
T T F F F F
T F F T F F
F T T F F F
F F T T T T
We can clearly see that truth values for (P + Q)’ are equal to truth values for (P)’.
(Q)’, corresponding to the same input. Thus, De Morgan’s Second Law is true.
P Q P.Q P + P.Q
T T T T
T F F T
F T F F
F F F F
In the truth table, we can see that the truth values for P + P.Q is exactly the same as
P.
Example 2: Draw Truth Table for P.Q + P + Q
Solution:
The truth table for P.Q + P + Q
P Q P.Q P.Q + P + Q
T T T T
T F F T
F T F T
F F F F
Boolean Algebra also called Logical Algebra is a branch of mathematics that deals
with Boolean Varaibles such as, 0 and 1.
Boolean Algebra has various applications. It is used to simplify logical circuits that
are the backbone of modern technology.
The “0” in Boolen Algebra represent a False condition or it represent the Switch Off
condition.
Boolean Algebra laws are rules for manipulating logical expressions with binary
variables, ensuring consistency and simplification in operations like addition,
multiplication, and complementation, crucial in fields like digital electronics and
computer science.
Boolean algebra is governed by five primary laws, which serve as the foundation for
manipulating logical expressions:
1. Identity Law for AND
2. Identity Law for OR
3. Complement Law for AND
4. Complement Law for OR
5. Idempotent Law
SOP FORM
1. K-map of 3 variables
K-map SOP form for 3 variables
Z= ?A,B,C(1,3,6,7)
F(P,Q,R,S)=?(0,2,5,7,8,10,13,15)
From red group we get product term—
QS
From green group we get product term—
Q’S’
Summing these product terms we get- Final expression (QS+Q’S’).
POS FORM
1. K-map of 3 variables
K-map 3 variable POS form
F(A,B,C)=?(0,3,6,7)
F(A,B,C,D)=?(3,5,7,8,10,11,12,13)
From green group we find terms
C’ D B
Taking their complement and summing them
(C+D’+B’)
From red group we find terms
C D A’
Taking their complement and summing them
(C’+D’+A)
From blue group we find terms
A C’ D’
Taking their complement and summing them
(A’+C+D)
From brown group we find terms
A B’ C
Taking their complement and summing them
(A’+B+C’)
Finally we express these as product –
(C+D’+B’).(C’+D’+A).(A’+C+D).(A’+B+C’)