0% found this document useful (0 votes)
15 views27 pages

unit4-part1of2

Mcq for software

Uploaded by

sakshi saini
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
0% found this document useful (0 votes)
15 views27 pages

unit4-part1of2

Mcq for software

Uploaded by

sakshi saini
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 27

1

Input-Output Organization
UNIT 4
Input-Output Interface

Asynchronous Data Transfer

Modes of Transfer

Priority Interrupt

Direct Memory Access

Input-Output Processor
2

Input Output Organization

– I/O Subsystem
• Provides an efficient mode of communication between the
central system and the outside environment

– Programs and data must be entered into computer memory for


processing and results obtained from computer must be
recorded and displayed to user.

– When input transferred via slow keyboard processor will be idle


most of the time waiting for information to arrive
– Magnetic tapes, disks
3

Peripheral Devices
• Devices that are under direct control of computer are said to be
connected on-line.

• Input or output devices attached to the computer are also called


peripherals.

• There are three types of peripherals :


• Input peripherals
• Output peripherals
• Input-output peripherals

Peripheral (or I/O Device)


Monitor (Visual Output Device) : CRT, LCD,LED
KeyBoard (Input Device) : light pen, mouse, touch screen, joy stick, digitizer
Printer (Hard Copy Device) : Daisy wheel, dot matrix and laser printer
Storage Device : Magnetic tape, magnetic disk, optical disk
Q- Input or output devices attached to the computer
are called

A- ITEMS
B- SORCES
C- PERIPHERALS
D- GADGETS
5

Input Output Organization


ASCII (American Standard Code for Information Interchange)

• I/O communications usually involvestransfer of alphanumeric


information from the device and the computer.

• Standard binary code for alphanumeric character is ASCII

• ASCII Code :
• It uses 7 bits to code 128 characters (94 printable and 34 non printing)
• 7 bit - 00 - 7F ( 0 - 127 )

• ASCII is 7 bits but most computers manipulate 8 bit quantity as


a single unit called byte.
80 - FF ( 128 - 255 ) : Greek, Italic type font

• Three types of control characters: Format effectors, Information


separators and communication control
• Format Effectors: control the layout of printing.
They include familiar typewriter controls, such as
backspace (BS), horizontal tabulation(HT), carriage
return(CR).
• Information separators: used to separate data into
divisions like paragraphs and pages. They include
characters such as record separator (RS) and file
separator(FS).
• Communication Control characters: these are
useful during the transmission of text between
remote terminals. These include STX(Start of text)
and ETX(end of text)
9

I/O Interface
• Provides a method for transferring information between internal
storage (such as memory and CPU registers) and external I/O
devices
• Resolves the differences between the computer and peripheral
devices
(1) Peripherals – Electromechanical or Electromagnetic
Devices CPU or Memory - Electronic Device
– Conversion of signal values required
(2) Data Transfer Rate
• Peripherals - Usually slower
• CPU or Memory - Usually faster than peripherals
– Some kinds of Synchronization mechanism may be needed

(3) Data formats or Unit of Information


• Peripherals – Byte, Block, …
• CPU or Memory – Word

(4) Operating modes of peripherals may differ


• must be controlled so that not to disturbed other peripherals connected to CPU
10

I/O Bus and Interface


I/O bus
Data
Processor Address
Control

Interface Interface Interface Interface

Keyboard
and Printer Magnetic Magnetic
display disk tape
terminal

Interface :
- Decodes the device address (device code)
- Decodes the commands (operation)
- Provides signals for the peripheral controller
- Synchronizes the data flow and supervises
the transfer rate between peripheral and CPU or Memory

4 types of command interface can receive : control, status, data o/p and data i/p
11

I/O Bus and Interface

•Control command : is issued to activate peripheral and to inform what to do

• Status command : used to test various status condition in the interface and
the peripherals

• data o/p command : causes the interface to respond by transferringdatafrom


the bus into one of its registers

• data i/p command : interface receives an item of data from the peripheral and
places it in its buffer register.
12

I/O Bus and Memory Bus


Functions of Buses

• MEMORY BUS is for information transfers between CPU and the MM


• I/O BUS is for information transfers between CPU and I/O devices
through their I/O interface

• 3 ways to bus can communicate with memory and I/O :

(1) use two separate buses, one to communicate with memory and
the other with I/O interfaces
- Computer has independent set of data, address and control bus one for
accessing memory and another I/O.
- done in computers that have separate IOP other than CPU.

(2) Use one common bus for memory and I/O but separate control lines
for each
(3) Use one common bus for memory and I/O with common control
lines for both
13

Isolated vs. Memory Mapped I/O


Isolated I/O

-Many computers use common bus to transfer


information between memory or I/O.
-The distinction between memory transfer and I/O
transfer is made through separate read and write
line.
-In the isolated I/O configuration , the CPU has
distinct input and output instructions and each of
these instruction is associated with the address of
an interface register.
-Distinct input and output instructions -each
associated with address of interface register
Isolated vs. Memory Mapped I/O
Memory-mapped I/O

- A single set of read/write control lines


(no distinction between memory and I/O
transfer)
-Memory and I/O addresses share the common address
space
-> reduces memory address range available
- No specific input or output instruction
-> The same memory reference instructions
can be used for I/O transfers
- Considerable flexibility in handling I/O operations
15

I/O Interface
Port A I/O data
register
Bidirectional
Bus
data bus buffers
Port B I/O data
register

Internal bus
CPU
Chip select I/O
CS
Register select
Control Control Device
RS1
Register select Timing register
RS0 and
I/O read Control
RD Status
I/O write Status
WR register

CS RS1 RS0 Register selected


0 x x None - data bus in high-impedence
1 0 0 Port A register
1 0 1 Port B register
1 1 0 Control register
1 1 1 Status register
Programmable Interface
-Information in each port can be assigned a meaning depending on the mode of operation of the
I/O device→ Port A = Data; Port B = Command;
- CPU initializes(loads) each port by transferring a byte to the Control Register
→ Allows CPU can define the mode of operation of each port
→ Programmable Port: By changing the bits in the control register, it is possible to change the
interface characteristics
The interface registers communicate with the CPU
through :-

A-address bus
B-i/o bus
C-bidirectional data bus
D-control bus
There are ….. types of commands that an interface
may receive.

A- 3
B-4
C-5
Data Transfer
Synchronous Data Transfer:

Clock pulses are applied to all registers within a unit and all data
transfer among internal registers occur simultaneously during the
occurrence of a clock pulse.

Two units such as CPU and I/O Interface are designed independently
of each other. If the registers in the interface share a common clock
with CPU registers, the transfer between the two is said to be
synchronous.
Asynchronous Data Transfer:
Internal timing in each unit (CPU and Interface) is independent.
Each unit uses its own private clock for internal registers.

Asynchronous data transfer between two independent units


requires that control signals be transmitted between the
communicating units to indicate the time at which data is being
transmitted.

One way of achieving this is by means of STROBE(Control signal


to indicate the time at which data is being transmitted) pulse
and other method is HANDSHAKING(Agreement between two
independent units).
1

2
2

1
Timeout : If the return handshake signal does not respond within a given time period,
the unit assumes that an error has occurred.
– Asynchronous Serial Transfer
• Synchronous transmission :
– The two unit share a common clock frequency
– Bits are transmitted continuously at the rate dictated by the clock
pulses
• Asynchronous transmission :
– Binary information sent only when it is available and line remain
idle otherwise
– Special bits are inserted at both ends of the character code
– Each character consists of three parts :
» 1) start bit : always “0”, indicate the beginning of a character
» 2) character bits : data
» 3) stop bit : always “1”
• Asynchronous transmission rules :
– ① When a character is not being sent, the line is kept in
the 1-state
– ② The initiation of a character transmission is detected
from the start bit, which is always “0”
– ③ The character bits always follow the start bit
– ④ After the last bit of the character is transmitted, a stop
bit is detected when the line returns to the 1-state for at
least one bit time
• Baud Rate : Data transfer rate in bits per second
– 10 character per second with 11 bit format = 110 bit per
second
26

Universal Asynchronous Receiver Transmitter


A typical asynchronous communication interface available as an IC
Transmit
Bidirectional Transmitter Shift data
data bus Bus register register
buffers

Control Transmitter Transmitter


register control clock
and clock
Internal Bus

Chip select
CS
Status Receiver Receiver CS RS Oper. Register selected
RS Timing clock
register control 0 x x None
I/O read and
RD and clock 1 0 WR Transmitter register
Control 1 1 WR Control register
I/O write Receive 1 0 RD Receiver register
WR Receiver Shift data
1 1 RD Status register
register register
Transmitter Register
- Accepts a data byte(from CPU) through the data bus
- Transferred to a shift register for serial transmission
Receiver Register
- Receives serial information into another shift
register
- Complete data byte is sent to the receiver register
Status Register Bits
- Used for I/O flags and for recording errors
Control Register Bits
- Define baud rate, no. of bits in each character,
whether to generate and check parity, and no. of stop
bits

You might also like

pFad - Phonifier reborn

Pfad - The Proxy pFad of © 2024 Garber Painting. All rights reserved.

Note: This service is not intended for secure transactions such as banking, social media, email, or purchasing. Use at your own risk. We assume no liability whatsoever for broken pages.


Alternative Proxies:

Alternative Proxy

pFad Proxy

pFad v3 Proxy

pFad v4 Proxy