Exam Booster Suggestion Series

_Subject – Digital Electronics_

Teacher Name – Soudip Harh
(BCA Sem 1)

Number System
Adder
● All types of Conversion
● Define Half adder and Full adder circuit.
● 1s,2s,9s,10s Complement
● Write about the design procedure of a
● Grey Code
combinational circuit
● Excess-3 Code
● Explain the working of Half Adder
Logic Gates ● Explain the working of Full Adder
● Derive the Sum and Carry of a Full Adder

B
● Truth Table and Block Diagram ● Draw a Full Adder Circuit Using Two Half Adder
● Universal Gates
● Realization of gates (NAND to OR, NOT, AND etc) Subtractor

HU
● Show how to connect NAND gates to get an AND
● Short Note about Half Subtractor
gate and an OR gate.
● Working principle of Half and Full Subtractors
Boolean Algebra ● Design a Full Subtractor using 2 Half Subtractor
and 1 OR Gates
● All types of Laws must be well-known ● Sketch the logic diagram and Truth table for Full
● Boolean Function simplification Adder Circuit
● State Distributive law and Duality principle.
Multiplexer & De-Multiplexer
De-Morgan Theorem
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Applying De-Morgan Theorem ER
Explain the De-Morgan Theorem with example
Duality Theorem
State Distributive law and Duality principle.
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Why is a Multiplexer called a data selector?
Design Related Question – 2×1, 8×1, 4×1, 16×1
Define Multiplexer and De-Multiplexer
Draw the Functional Truth Table of the 4×1
Multiplexer and realize it using basic
RE
●
gates(AND,OR,NOT).
Minimization Techniques ● Implement the Function using Multiplexer (V.V.I)

● SOP (Sum of Product) & POS (Product of Sum)

Example
● Define ‘minterm’ and ‘maxterm’
● F(A,B,C,D)=𝜮𝒎(𝟑, 𝟒, 𝟓, 𝟕, 𝟖, 𝟏𝟎, 𝟏𝟏, 𝟏𝟐, 𝟏𝟓)
● Convert the following function into SOP, POS or
CA

● F(A,B,C,D)=𝜮𝒎(𝟑, 𝟒, 𝟓, 𝟕, 𝟖, 𝟏𝟎, 𝟏𝟏, 𝟏𝟐, 𝟏𝟓)

Canonical form
Using any one Like 4:1 / 8:1 / 2:1 / 16:1
K-MAP (V.V.I) Design Multiplexer Using Another Multiplexer (V.V.I)
No Suggestion – any type of Function simplified using ● Design a 4:1 MUX Using a 2:1
K-Map ● Design of all types of De-Multiplexer

Example
Simplified the following Function using K-Map
H

● F(A,B,C,D) = 𝜮𝒎(𝟎, 𝟏, 𝟐, 𝟓, 𝟖, 𝟗, 𝟏𝟎)

● F(A,B,C,D) = 𝜮𝒎(𝟎, 𝟏, 𝟔, 𝟏𝟏, 𝟏𝟐) +
UT

𝒅(𝟐, 𝟑, 𝟒, 𝟓, 𝟏𝟎, 𝟏𝟑, 𝟏𝟒, 𝟏𝟓)

Code Converter
● Describe Code Converter. List their types.
YO

● How would you design a binary-to-gray code converter?

● 4 Bit Binary to Grey Code Converter
● 4 Bit Grey Code to Binary Code Converter
● Give a combinational circuit that converts a 4-bit Gray Code to a 4-bit binary number. Implement the circuit.
● How would you design a binary-to-gray code converter?

Decoder and Encoder

● Explain the working and draw the logic diagram of the Binary to Octal decoder.
● How would you design a BCD to Gray code converter?
● Develop a Full adder using the decoder.
● How would you design a 3:8 decoder using basic gates?
● Estimate the logic diagram of the BCD-Decimal decoder and explain its operations.
● With necessary diagrams, explain in detail about the working of a 4-bit look ahead carry adder.

Flip-Flops
● Bring out the difference between synchronous sequential circuits and asynchronous sequential circuits.
 ● Differences between Latch and Flipflop.
● S-R Latch Using NAND and NOR (Working/Truth Table/Circuit)
● Short note on S-R / R-S Flip Flop
● Describe the working of Clocked R-S or S-R Flip Flop
● Short Note/working of S-R, J-K, T, D Flip Flop
● What do You mean By Toggling?
● Wright Down the Operations of T, J-K, S-R, D Flip Flop
● Advantage of J-K Flip Flop Over S-R Flip Flop
● Excitation Table of all Flip-Flop
● Explain the Excitation Table.
● In electronics design, an excitation table shows the minimum inputs that are necessary to generate a particular
next state (in other words, to "excite" it to the next state) when the current state is known. They are similar to
truth tables and state tables, but rearrange the data so that the current state and next state are next to each
other on the left-hand side of the table, and the inputs needed to make that state change happen are shown on
the right side of the table. And then draw all 4 Flip Flop Excitation Tables.

B
Master Slave Flip Flop
● Explain race-around Condition in J-K Flip Flop. State various methods to overcome these conditions. (V.V.I)

HU
● Working/Short-Note of a Master-Slave Flip-Flop
● Draw and explain the Timing Diagram of Master-Slave Flip Flop

Clock Pulse
● What do you mean by ‘Triggering’ of Flip-Flop?
● Explain types of Triggering
● Explain Level Triggering and its types
● Explain edge triggering and its types
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Flip Flop Conversions

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Build
Build
a
a
ER
Difference between edge triggering vs level triggering

T Flip-flop from a D Flip-flop.

J-K Flip-flop from a T Flip-flop.
RE
● Build a J-K Flip-flop from a D Flip-flop.
● Build a S-R Flip-flop from a T Flip-flop.

Counters
● What is Counter?
CA

● What is a synchronous counter?

● What is an asynchronous counter?
● Difference between synchronous and asynchronous counter
● Write a note on propagation delay.
● Design a Ripple Counter
● Design Mod-3 Counter
● Design Mod-3 bit Synchronous Counter
● Design a 4-bit Up-down Counter
H

● Design a Ring Counter

● What do you mean by Johnson Counter?
UT

Shift Register
● What do you mean by Shift Register?
● Explain the working/ write down the short note on
○ SISO
YO

○ SIPO
○ PISO
○ PIPO
● Difference between SISO VS PIPO

Indranil Chakraborty
Soudip Harh