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MODULE – II
COMBINATIONAL CIRCUITS
 COMBINATIONAL CIRCUITS
Combinational circuits are the components in digital electronics which can provide output instantly based
on the current input. Unlike sequential circuits, a combinational circuit listens for input signal and
generates output no matter what is the past input or state as it has no feedback or memory component. It
only cares about present input and state.

The 'n' input variables come from an external source whereas the 'm' output variables go to an external
destination. In many applications, the source or destination are storage registers.
The combinational circuit that performs the addition of two bits is called a half adder and the one that
performs the addition of three bits (two significant bits and a previous carry) is a full adder.
 HALF ADDER

A Half-adder circuit needs two binary inputs and two binary outputs. The input variable shows the
augend and addend bits whereas the output variable produces the sum and carry. We can
understand the function of a half-adder by formulating a truth table. The truth table for a half-
adder is:

o 'x' and 'y' are the two inputs, and S (Sum) and C (Carry) are the two outputs.
o The Carry output is '0' unless both the inputs are 1.
o 'S' represents the least significant bit of the sum.
The simplified sum of products (SOP) expressions is:
S = x'y+xy', C = xy
OR
S =XOR of x and y and C= AND of x and y

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 FULL ADDER

This circuit needs three binary inputs and two binary outputs. The truth table for a full-adder is:

o Two of the input variable 'x' and 'y', represent the two significant bits to be added.
o The third input variable 'z', represents the carry from the previous lower significant position.
o The outputs are designated by the symbol 'S' for sum and 'C' for carry.
o The eight rows under the input variables designate all possible combinations of 0's, and 1's that
these variables may have.
o The input-output logical relationship of the full-adder circuit may be expressed in two Boolean
functions, one for each output variable.
o Each output Boolean function can be simplified by using a unique map method.
S = XOR of x, y and z, C= xy + yz+ xz

 DECODERS

The combinational circuit that changes the binary information into 2 N output lines is known
as Decoders. The binary information is passed in the form of N input lines. The output lines define
the 2N-bit code for the binary information. In simple words, the Decoder performs the reverse
operation of the Encoder. At a time, only one input line is activated for simplicity. The produced
2N-bit output code is equivalent to the binary information.

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o 3-to-8-line decoder: -
The 3-to-8-line decoder is also known as Binary to Octal Decoder. In a 3-to-8-line
decoder, there is a total of eight outputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three
outputs, i.e., A0, A1, and A2. This circuit has an enable input 'E'. Just like 2to-4line decoder,
when enable 'E' is set to 1, one of these four outputs will be 1.

The logical expression of the term Y0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 is as follows:
Y0=A0'.A1'.A2'
Y1=A0.A1'.A2'
Y2=A0'.A1.A2'
Y3=A0.A1.A2'
Y4=A0'.A1'.A2
Y5=A0.A1'.A2
Y6=A0'.A1.A2
Y7=A0.A1.A2

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 ENCODERS
The combinational circuits that change the binary information into N output lines are known
as Encoders. The binary information is passed in the form of 2 N input lines. The output lines
define the N-bit code for the binary information. In simple words, the Encoder performs the
reverse operation of the Decoder. At a time, only one input line is activated for simplicity. The
produced N-bit output code is equivalent to the binary information.

o 8-to-3-line Encoder:
The 8-to-3-line Encoder is also known as Octal to Binary Encoder. In 8-to-3-line encoder,
there is a total of eight inputs, i.e., Y 0, Y1, Y2, Y3, Y4, Y5, Y6, and Y7 and three outputs, i.e.,
A0, A1, and A2. In 8-input lines, one input-line is set to true at a time to get the respective
binary code in the output side. Below are the block diagram and the truth table of the 8-to-
3-line encoder.

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The logical expression of the term A0, A1, and A2 are as follows:
A2=Y4+Y5+Y6+Y7
A1=Y2+Y3+Y6+Y7
A0=Y7+Y5+Y3+Y1

 MULTIPLEXERS

A multiplexer is a combinational circuit that has 2 n input lines and a single output line. Simply, the
multiplexer is a multi-input and single-output combinational circuit. The binary information is
received from the input lines and directed to the output line. On the basis of the values of the
selection lines, one of these data inputs will be connected to the output.
Unlike encoder and decoder, there are n selection lines and 2 n input lines. So, there is a total of
2N possible combinations of inputs. A multiplexer is also treated as Mux.
o 4:1 multiplexer –
In the 4×1 multiplexer, there is a total of four inputs, i.e., A 0, A1, A2, and A3, 2 selection
lines, i.e., S0 and S1 and single output, i.e., Y. On the basis of the combination of inputs that
are present at the selection lines S 0 and S1, one of these 4 inputs are connected to the
output.

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The logical expression of the term Y is as follows:

Y=S1' S0' A0+S1' S0 A1+S1 S0' A2+S1 S0 A3

 SEQUENTIAL CIRCUITS

Sequential circuits are digital circuits that store and use the previous state information to determine
their next state. Unlike combinational circuits, which only depend on the current input values to
produce outputs, sequential circuits depend on both the current inputs and the previous state stored in
memory elements.

There are two types of input to the combinational logic :

1. External inputs which are not controlled by the circuit.
2. Internal inputs, which are a function of a previous output state.

 TYPES OF SEQUENTIAL CIRCUITS

 Asynchronous Sequential Circuits
These circuits do not use a clock signal but uses the pulses of the inputs. These circuits
are faster than synchronous sequential circuits because there is clock pulse and change their state
immediately when there is a change in the input signal. We use asynchronous sequential circuits
when speed of operation is important and independent of internal clock pulse.

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 Synchronous Sequential Circuits

These circuits use clock signal and level inputs (or pulsed) (with restrictions on pulse width and
circuit propagation). The output pulse is the same duration as the clock pulse for the clocked
sequential circuits. Since they wait for the next clock pulse to arrive to perform the next operation,
so these circuits are bit slower compared to asynchronous. Level output changes state at the start
of an input pulse and remains in that until the next input or clock pulse.

 CLOCK SIGNAL AND TRIGGERING

Clock signal is a kind of control signal that allows the elements of synchronous circuits to be in
phase or phenomena that occur in circuits. It is derived from the square wave that has a high and a
low level, it helps in measuring the sequential changes in the circuit states. The clock signal also
makes a pulse simultaneously on all the circuit parts that are needed for the proper work of
synchronous sequential circuits.
In Sequential circuits, triggering denotes the way, in terms of which the state changes take place.
There are two main types of triggering-

 Level Triggering - Level triggering happens when the change of state is from the level of the
clock signal is high or low. The circuit depends on the level of the clock signal rather than the
rising or the falling edge of it. There are two types of level triggering:

o Positive Level Triggering: The circuit changes state when it is high time in the clock
cycle i.e. when the clock signal is high.
o Negative Level Triggering: The circuit changes state when the clock signal is in the
low state.

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 Edge Triggering - Edge triggering occurs when the state change is initiated by the transition
(rising or falling edge) of the clock signal. The circuit responds to the clock signal’s edges
rather than its levels. There are two types of edge triggering:

o Positive Edge Triggering: The circuit changes state on the rising edge (transition from
low to high) of the clock signal.
o Negative Edge Triggering: The circuit changes state on the falling edge (transition
from high to low) of the clock signal.

 FLIP-FLOPS

A flip-flop is a simple memory storage component which stores the binary information and is
applied in a sequential circuit to maintain its state. Registers, counters and state machines cannot
work without them. The flip-flop is a circuit that maintains a state until directed by input to change
the state. A basic flip-flop can be constructed using four-NAND or four-NOR gates. Flip-flop is
popularly known as the basic digital memory circuit. It has its two states as logic 1(High) and logic
0(low) states. A flip flop is a sequential circuit which consist of single binary state of information or
data. The digital circuit is a flip flop which has two outputs and are of opposite states. It is also
known as a Bistable Multivibrator.

There are four different flip-flops:

 SR Flip Flop
 JK Flip Flop
 D Flip Flop
 T Flip Flop

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 S R FLIP-FLOP

In the flip flop, with the help of preset and clear when the power is switched ON, the states of the
circuit keep on changing, that is it is uncertain. It may come to set(Q=1) or reset(Q’=0) state. In
many applications, it is desired to initially set or reset the flip flop that is the initial state of the flip
flop that needs to be assigned. This thing is accomplished by the preset(PR) and the clear(CLR).

 Case 1(PR=CLR=1): The asynchronous inputs are inactive and the flip flop responds freely to
the S,R and the CLK inputs in the normal way.
 Case 2(PR=0 and CLR=1):This is used when the Q is set to 1.
 Case 3(PR=1 and CLR=0):This is used when the Q’ is set to 1.
 Case 4(PR=CLR=0): This is an invalid state.
Characteristics Equation for SR Flip Flop
QN+1 = QNR’ + SR’

 J K FLIP-FLOP

In JK flip flops, The basic structure of the flip flop which consists of Clock (CLK), Clear (CLR),
Preset (PR).

 Case 1 (PR=CLR=0 ):This condition is in its invalid state.

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 Case 2 (PR=0 and CLR=1):The PR is activated which means the output in the Q is set to 1.
Therefore, the flip flop is in the set state.
 Case 3 (PR=1 and CLR=0):The CLR is activated which means the output in the Q’ is set to 1.
Therefore, the flip flop is in the reset state.
 Case 4 (PR=CLR=1):In this condition the flip flop works in its normal way whereas the PR and
CLR gets deactivated.
Characteristics Equation for JK Flip Flop
QN+1 = JQ’N + K’QN

 Race Around Condition in J-K Flip Flop

When the J and K both are set to 1, the input remains high for a longer duration of time, then the
output keeps on toggling. Toggle means that switching in the output instantly i.e. Q=0, Q’=1 will
immediately change to Q=1 and Q’=0 and this continuation keeps on changing. This change in
output leads to race around condition.

 D FLIP-FLOP (Data/Delay Flip-flop)

The D Flip Flop Consists a single data input(D), a clock input(CLK),and two outputs: Q and Q’
(the complement of Q).

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 Case 1 (PR=CLR=0):This conditions is represents as invalid state where both PR(present) and
CLR(clear) inputs are inactive.
 Case 2 (PR=0 and CLR=1):This state is set state in which PR is inactive (0) and CLR is
active(1) and the output Q is set to 1.
 Case 3 (PR=1 and CLR=0):This state is reset state in which PR is active (1) and CLR is inactive
(0) and the complementary output Q’ is set to 1.
 Case 4 (PR=CLR=1):In This state the flip flop behaves as normal, both PR and CLR inputs are
active(1).

Characteristics Equation for D Flip Flop

QN+1 = D

 T FLIP-FLOP (Toggle Flip-flop)

The T Flip Flop consists of data input (T), a clock input (CLK), and two outputs: Q and Q’ (the
complement of Q).

 Case 1 (T=0):In this condition the flip-flop remains in its current state regardless of clock input,
Also the Output Q will remain unchanged unit the value of T will not change.
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 Case 2 (T=1):In this condition the flip flop will change when T input is 1,At each rising or falling
edge of the clock signal the output Q will be in complementary state.
Characteristics Equation for T Flip Flop
QN+1 = Q’NT + QNT’ = QN XOR T

 INTEGRATED CIRCUITS
An integrated circuit is electronic circuit or device that has electronic components on a small
semiconductor chip. It has functionality of logic AND or amplifying of a signal. These are mainly
two types of circuits: Digital or Analog. Analog ICs handle continuous signals such as audio signals
and Digital ICs handle discrete signals such as binary values.

There are different types of integrated circuits based various criteria. Based on intended application,
the Integrated Circuit (IC) can be classified as following:

 Digital Integrated Circuits handle discrete signals such as binary values (0 and 1). These
circuits use digital logic gates, multiplexers, flip-flops, etc. These circuits are easier to design
and economical.
 Analog Integrated Circuits handle contiguous signals. These are two types: linear integrated
circuits (Linear ICs) and Radio frequency integrated circuits (RF ICs).
 Mixed Integrated Circuits are obtained by the combination of analog and digital integrated
circuits. Therefore, it has digital to analog (A/D) converter, digital to analog (D/A) converter,
and clock/timing integrated circuits.

 REGISTERS
Registers are a type of computer memory used to quickly accept, store, and transfer data and instructions
that are being used immediately by the CPU.
A group of flip flops which is used to store multiple bits of data and the data is moved from one flip flop
to another is known as Shift Register. The bits stored in registers shifted when the clock pulse is applied
within and inside or outside the registers. To form an n-bit shift register, we have to connect n number of
flip flops. So, the number of bits of the binary number is directly proportional to the number of flip flops.
The flip flops are connected in such a way that the first flip flop's output becomes the input of the other
flip flop.
Types of Shift Registers
 Serial In Serial Out shift register
 Serial In parallel Out shift register
 Parallel In Serial Out shift register
 Parallel In parallel Out shift register
 Bidirectional Shift Register

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 Universal Shift Register

 Serial-In Serial-Out Shift Register (SISO)

The shift register, which allows serial input (one bit after the other through a single data line) and
produces a serial output is known as a Serial-In Serial-Out shift register. Since there is only one
output, the data leaves the shift register one bit at a time in a serial pattern, thus the name Serial-In
Serial-Out Shift Register. The logic circuit given below shows a serial-in serial-out shift register. The
circuit consists of four D flip-flops which are connected in a serial manner. All these flip-flops are
synchronous with each other since the same clock signal is applied to each flip-flop.

The above circuit is an example of a shift right register, taking the serial data input from the left side of
the flip flop. The main use of a SISO is to act as a delay element.
 Serial-In Parallel-Out Shift Register (SIPO)
The shift register, which allows serial input (one bit after the other through a single data line) and
produces a parallel output is known as the Serial-In Parallel-Out shift register. The logic circuit given
below shows a serial-in-parallel-out shift register. The circuit consists of four D flip-flops which are
connected. The clear (CLR) signal is connected in addition to the clock signal to all 4 flip flops in order to
RESET them. The output of the first flip-flop is connected to the input of the next flip flop and so on. All
these flip-flops are synchronous with each other since the same clock signal is applied to each flip-flop.

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The above circuit is an example of a shift right register, taking the serial data input from the left side of
the flip-flop and producing a parallel output. They are used in communication lines where demultiplexing
of a data line into several parallel lines is required because the main use of the SIPO register is to convert
serial data into parallel data.
 Parallel-In Serial-Out Shift Register (PISO)
The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and produces a serial output is known as a Parallel-In Serial-Out shift register. The
logic circuit given below shows a parallel-in-serial-out shift register. The circuit consists of four D flip-
flops which are connected. The clock input is directly connected to all the flip-flops but the input data is
connected individually to each flip-flop through a multiplexer at the input of every flip-flop. The output
of the previous flip-flop and parallel data input are connected to the input of the MUX and the output of
MUX is connected to the next flip-flop. All these flip-flops are synchronous with each other since the
same clock signal is applied to each flip-flop.

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A Parallel in Serial Out (PISO) shift register is used to convert parallel data to serial data.

 Parallel-In Parallel-Out Shift Register (PIPO)

The shift register, which allows parallel input (data is given separately to each flip flop and in a
simultaneous manner) and also produces a parallel output is known as Parallel-In Parallel-Out shift
register. The logic circuit given below shows a parallel-in-parallel-out shift register. The circuit consists of
four D flip-flops which are connected. The clear (CLR) signal and clock signals are connected to all 4
flip-flops. In this type of register, there are no interconnections between the individual flip-flops since no
serial shifting of the data is required. Data is given as input separately for each flip flop and in the same
way, output is also collected individually from each flip flop.

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A Parallel in Parallel out (PIPO) shift register is used as a temporary storage device and like SISO Shift
register it acts as a delay element.

 Bidirectional Shift Register

If we shift a binary number to the left by one position, it is equivalent to multiplying the number by 2 and
if we shift a binary number to the right by one position, it is equivalent to dividing the number by 2. To
perform these operations, we need a register which can shift the data in either direction. Bidirectional
shift registers are the registers that are capable of shifting the data either right or left depending on the
mode selected. If the mode selected is 1(high), the data will be shifted toward the right direction and if the
mode selected is 0(low), the data will be shifted towards the left direction. The logic circuit given below
shows a Bidirectional shift register. The circuit consists of four D flip-flops which are connected. The
input data is connected at two ends of the circuit and depending on the mode selected only one gate is in
the active state.

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 Universal Shift Register

Universal Shift Register is a type of register that contains the both right shift and the left shift. It has also
parallel load capabilities. Generally, these types of registers are taken as memory elements in computers.
But, the problem with this type of register is that it shifts only in one direction. In simple words, you
mean that the universal shift register is a combination of the bidirectional shift register and
the unidirectional shift register.

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N-bit universal shift register consists of flip-flops and multiplexers. Both are N in size. In this, all the n
multiplexers share the same select lines and this select input selects the suitable input for flip-flops.

 APPLICATIONS OF SHIFT REGISTER

 The shift registers are used for temporary data storage.

 The shift registers are also used for data transfer and data manipulation.
 The serial-in serial-out and parallel-in parallel-out shift registers are used to produce time delay to
digital circuits.
 The serial-in parallel-out shift register is used to convert serial data into parallel data thus they are
used in communication lines where demultiplexing of a data line into several parallel lines is
required.
 A Parallel in Serial out shift register is used to convert parallel data to serial data.

 COUNTERS
A Counter is a device which stores (and sometimes displays) the number of times a particular event or
process has occurred, often in relationship to a clock signal. Counters are used in digital electronics for
counting purpose, they can count specific event happening in the circuit. For example, in UP counter a
counter increases count for every rising edge of clock. Not only counting, a counter can follow the certain
sequence based on our design like any random sequence 0,1,3,2…They can also be designed with the
help of flip flops. They are used as frequency dividers where the frequency of given pulse waveform is
divided. Counters are sequential circuit that count the number of pulses can be either in binary code or
BCD form. The main properties of a counter are timing, sequencing, and counting. Counter works in two
modes
 Up counter
 Down counter

 CATEGORIES OF COUNTERS
 Asynchronous counter
 Synchronous counter

 Asynchronous Counter
In asynchronous counter we don’t use universal clock, only first flip flop is driven by main clock and the
clock input of rest of the following flip flop is driven by output of previous flip flops.
 Synchronous Counter
Unlike the asynchronous counter, synchronous counter has one global clock which drives each flip flop so
output changes in parallel. The one advantage of synchronous counter over asynchronous counter is, it

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can operate on higher frequency than asynchronous counter as it does not have cumulative delay because
of same clock is given to each flip flop. It is also called as parallel counter.

 4-BIT BINARY COUNTER

A 4-bit binary up/down counter cycles through a sequence that ranges from 0000 to 1111 and then
reverses from 1111 back to 0000. If the external input labelled 'UP' is set to 1, irrespective of the 'DOWN'
input status, the circuit functions as a UP counter, iterating through a sequence from 0000 to 1111.
Conversely, when the 'DOWN' input is set to 1 and 'UP' is at 0, the circuit acts as a DOWN counter,
cycling from 1111 to 0000. Should both 'UP' and 'DOWN' inputs register as 0, the flip-flop output retains
its current state.
 4-bit Binary Synchronous Counter
The 4-bit binary synchronous counter comprises four JK flip-flops and represents an M=2 4-bit binary
synchronous counter. The counting pulse N is simultaneously applied to the clock pulse input CP terminal
of each flip-flop. When the counting pulse arrives, all the flip-flops are triggered simultaneously. The
state of each subsequent flip-flop is determined by the current state of its preceding flip-flop. Flip-flops
that need to toggle do so simultaneously, eliminating the issue of accumulated time delays between
stages.

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 4-bit Binary Ripple Counter

A 4-bit Binary Ripple Counter is a specialized digital counting mechanism comprising a chain of flip-
flops, often of the J-K or D type. These flip-flops are arranged such that the output of one serve as the
clock signal for its successor. In a typical 4-bit layout, four flip-flops enable the counter to cycle through
binary numbers from 0000 to 1111 or 0 to 15 in decimal terms.
Each flip-flop changes its state during its operation in response to an incoming clock pulse. Because every
flip-flop is clocked by the output of its predecessor (except the first, which is triggered by an external
clock), changes propagate—or "ripple"—from the least significant bit (LSB) to the most significant bit
(MSB), which is the reason behind the term "ripple" counter.

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 DESIGNING A 4-BIT BINARY COUNTER USING D FLIP-FLOP

The steps for designing a 4-bit binary counter are as follows-
 Deciding the number of flip-flops needed.
 Deciding the flip-flop needed and drawing the excitation table of D- flip
 Deciding the counting cycles.
 K-map simplification

 Deciding the Number of flip-flops needed –

For designing an N-bit counter, N bits are needed. Hence, for designing a 4-bit binary counter, the number
of flip-flops needed will be 4.
 Deciding the type of flip-flop needed
The T flip-flop can be used in conjunction with other digital logic gates to create binary counters that can
count up or down depending on the design. T flip-flops, also known as toggle flip-flops, are used in
counters because they can increment binary numbers by toggling their output on each clock pulse.
Here, it is constructed using D flip-flop

module -2-ca prof. anjali soman

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 Counter Cycles –
Since the number of flip-flops used is 4, the cycles will be 24. i.e., 16 (0-15).

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 Constructing the Truth Table –

Present State Next State

D3 D2 D1 D0
(Q3 Q2 Q1 Q0) (Q3+ Q2+ Q1+ Q0+)

0000 0001 0 0 0 1

0001 0010 0 0 1 0

0010 0011 0 0 1 1

0011 0100 0 1 0 0

0100 0101 0 1 0 1

0101 0110 0 1 1 0

0110 0111 0 1 1 1

0111 1000 1 0 0 0

1000 1001 1 0 0 1

1001 1010 1 0 1 0

1010 1011 1 0 1 1

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1011 1100 1 1 0 0

1100 1101 1 1 0 1

1101 1110 1 1 1 0

1110 1111 1 1 1 1

1111 0000 0 0 0 0

 Constructing K-map and simplifying the equation

D3 D2

D3 = Q3Q2′ + Q3Q0′ + Q3Q1′ +

D2 = Q2Q0′ + Q2Q1′ + Q2’Q1Q0
Q3’Q2Q1Q0

D1 D0

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D1 = Q1’Q0 + Q1Q0′ = Q1 ⊕ Q0 D0 = Q0′

module -2-ca prof. anjali soman

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module -2-ca prof. anjali soman