Thank You For Taking The Week 4: Assignment 4. Week 4: Assignment 4
Thank You For Taking The Week 4: Assignment 4. Week 4: Assignment 4
Assessment submitted.
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Week 4: Assignment 4
payment status Your last recorded submission was on 2025-03-18, 19:33 Due date: 2025-03-19, 23:59 IST.
IST
For Problems 1 to 11, note the following important instructions for entering answer:
Enter answers upto two decimal places. For example: 3.00, 63.78
Course Apply rounding off. For example: enter 65.375 as 65.38 and 5.374 as 5.37
outline Solve all problems dependent on answers of previous steps, using values obtained after
rounding off upto two decimal places in previous steps.
About Do not enter the unit.
NPTEL ()
For problems 1 to 11 you need to read the datasheet of MOSFET IRF540NPbF (click here
How does an (https://storage.googleapis.com/swayam-node1-
NPTEL production.appspot.com/assets/img/noc25_ee87/IRF540NPBF_removed.pdf) for datasheet):
online
course
work? () A buck converter is designed using two MOSFETs(Manufacturer part no: IRF540NPbF). One
MOSFET is used like a switch by giving gate pulses. Second MOSFET is used like a diode i.e.
Week 0 : its body diode is only used and no gate pulse is given. The input voltage of the buck converter is
Prerequisite 50V. The value of parasitic inductance is estimated as Lp = 8.5 nH.
()
1) From the datasheet, the dv
limit for the body diode is obtained as . . . . . . (V/ns)
dt
Week 1 :
Analysis of
7.0
Power
Electronic 1 point
Converters ()
Week 2 :
2) Using the typical values of Qrr and trr given in datasheet, the reverse recovery current
Power
I rr is calculated as . . . ..... (A)
Semiconduct
or Devices () 8.78
1 point
https://onlinecourses.nptel.ac.in/noc25_ee87/unit?unit=49&assessment=181 1/4
18/03/2025, 19:33 Design Of Power Electronic Converters - - Unit 7 - Week 4 : Gate Drivers and Snubber Design
Week
Assessment 3:
submitted.
X Gate Drivers
The power electronics engineer uses the following limits to design RC snubber for the body
()
diode:
Peak voltage limit, E1 = 2 X Input voltage
Week 4 : dv dv
Gate Drivers (
dt
)av limit = half of dt
limit given in datasheet for body diode
and Snubber
3) Find value of E1
is ......
Design () E
Lec 27 :
Bootstrapping 2
(unit? 1 point
unit=49&lesso
n=50) Let the corresponding values of χo = 2 and ζ o = 0.4 are obtained using the respective curves
Lec 28 : Pulse to design snubbers by this method.
Transformer
based Gate
4) Find the value of Cs .... (pF).
Drivers (unit?
unit=49&lesso
65.52
n=51)
1 point
Lec 29 : Gate
Drivers - Few
Other 5) Find the value of Rs ....(Ω )
Requirements
(unit? 9.11
unit=49&lesso 1 point
n=52)
dv
Lec 30 : Second, design the snubber by limiting ( dt )av . C s = 2 nF is chosen for the snubber.
Introduction to
6) (
dv
)
Snubbers Calculate dt
av
: ............... A
E×ω
(unit? o
unit=49&lesso 0.29
n=53)
1 point
Lec 31 : RC
Snubber Let the corresponding values of χo = 0.9 and ζ o = 0.15 are obtained using the respective
Analysis - I curves to design snubbers by this method.
(unit?
unit=49&lesso
n=54)
7) Find the value of Rs ............(Ω )
Lec 32 : RC 0.6
Snubber 1 point
Analysis - II :
Underdamped dv
Third, do a compromised design of the snubber for limiting both peak voltage and ( dt )av .
Case (unit?
unit=49&lesso
n=55)
8) Calculate ( dv ) ×
Lp ×I rr
:
av
Lec 33 : RC dt
E
2
Snubber
0.10
Analysis - III :
Overdamped 1 point
and Critically
Damped Case Let the corresponding values of χo = 0.1 and ζ o = 0.9 are obtained using the respective
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18/03/2025, 19:33 Design Of Power Electronic Converters - - Unit 7 - Week 4 : Gate Drivers and Snubber Design
Lec 34 : RC 26.21
Snubber 1 point
Design - I
(unit?
unit=49&lesso 10) Find the value of Rs .......(Ω )
n=57)
1.02
Lec 35 : RC
1 point
Snubber
Design - II
(unit?
11) From the datasheet, the typical turn OFF time of the MOSFET is .... ns
unit=49&lesso
n=58) 74
Lec 36 : RCD 1 point
Snubbers - I
(unit?
unit=49&lesso
For the questions below select the correct option/options:
n=59)
12) Bootstrapping method has the disadvantage/disadvantages of: 1 point
Lec 37 : RCD
Snubbers - II Low noise immunity
(unit?
Applicable only where gate drive requires low power
unit=49&lesso
n=60) Cannot drive high side switch
Quiz: Week 4:
Can drive MOSFET but not IGBTs
Assignment 4
(assessment?
name=181) 13) A floating supply is required for .......... gate driver, in one leg of H-bridge converter 1 point
Feedback
High side
Form (unit?
unit=49&lesso Low side
n=183) Both Low side and High Side
Neither Low side nor high side
Week 5 :
Thermal
Design ()
14) Main role of snubbers in power electronics converter is to: 1 point
Download
Reduce spikes during turn ON and turn OFF times
videos ()
Reduce conduction losses
Problem 15) Gate driver circuits using the bootstapping method can be used in............ 1 point
Solving
Session - Buck Converters
Jan 2025 () H-Bridge converters
Any power electronics converter which has a leg-type arrangement
None of the above
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18/03/2025, 19:33 Design Of Power Electronic Converters - - Unit 7 - Week 4 : Gate Drivers and Snubber Design
Assessment submitted.
X 16) Primary differences between pulse transformer-based and Optocoupler-based gate 1 point
drivers are:
Type of isolation
Type of coupling between input and output i.e. capacitive and inductive
Requirement of additional power supply
None of the above
17) In an RCD snubber, the snubber capacitor charges during turn........ of the device 1 point
OFF
ON
18) In an RCD snubber, the snubber capacitor discharges during turn........ of the device 1 point
OFF
ON
19) Which of the following is/are true for snubbers apart from reducing spikes: 1 point
Limit dv
and di
during turn ON and OFF
dt dt
You may submit any number of times before the due date. The final submission will be
considered for grading.
Submit Answers
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