Edc Lab Manual
Edc Lab Manual
1a
CHARACTERISTICS OF PN JUNCTION DIODE
AIM:
To obtain the Volt-Ampere Characteristics of Silicon PN Junction Diode and also to
calculate static and dynamic resistance in forward bias and reverse bias condition.
COMPONENTS REQUIRED:
2 Resistor - 100 Ω 1
4 Voltmeter - (0-1) V 1
- (0-30) mA 1
5 Ammeter
(0-100) μA 1
6 Bread Board - - 1
FORMULA USED:
Io = I/[exp(V/VT)]-1
CIRCUIT DIAGRAMS:
FORWARD BIAS:-
REVERSE BIAS:-
TABULAR COLUMN:
THEORY:
Donor impurities (pentavalent) are introduced into one-side and acceptor impurities into
the other side of a single crystal of an intrinsic semiconductor to form a p-n diode with a junction
called depletion region (this region is depleted off the charge carriers). This region gives rise to a
potential barrier Vγ called Cut- in Voltage. This is the voltage across the diode at which it starts
conducting. The P-N junction can conduct beyond this Potential. The P-N junction supports uni-
directional current flow.
If +ve terminal of the input supply is connected to anode (P-side) and the –ve is
connected to cathode (N- side) then diode is said to be forward biased. In this condition the height
of the potential barrier at the junction is lowered by an amount equal to given forward biasing
voltage. Both the holes from p-side and electrons from n-side cross the junction simultaneously
and constitute a forward current (injected minority current - due to holes crossing the junction
and entering N-side of the diode, due to electrons crossing the junction and entering P-side of
the diode). Assuming current flowing through the diode to be very large, the diode can be
approximated as short-circuited switch.
If -ve terminal of the input supply is connected to anode (p-side) and +ve
terminal of the input supply is connected to cathode (n-side) then the diode is said to be
reverse biased. In this condition an amount equal to reverse biasing voltage increases the
height of the potential barrier at the junction. Both the holes on p-side and electrons on n-side
tend to move away from the junction thereby increasing the depleted region. However the
process cannot continue indefinitely, thus a small current called reverse saturation current
continues to flow in the diode. This small current is due to thermally generated carriers.
Assuming current flowing through the diode to be negligible, the diode can be approximated
as an open circuited switch.
I =I0 (ev/(ηvT) - 1)
FORWARD BIAS:
On forward biasing, initially no current flows due to barrier potential. As the applied
potential exceeds the barrier potential the charge carriers gain sufficient energy to cross the
potential barrier and hence enter the other region. The holes, which are majority carriers in the P-
region, become minority carriers on entering the N-regions, and electrons, which are the majority
carriers in the N-region, become minority carriers on entering the P-region. This injection of
Minority carriers results in the current flow, opposite to the direction of electron movement.
REVERSE BIAS:
On reverse biasing, the majority charge carriers are attracted towards the terminals due to
the applied potential resulting in the widening of the depletion region. Since the charge carriers
are pushed towards the terminals no current flows in the device due to majority charge carriers.
There will be some current in the device due to the thermally generated minority carriers. The
generation of such carriers is independent of the applied potential and hence the current is
constant for all increasing reverse potential. This current is referred to as Reverse Saturation
Current (IO) and it increases with temperature. When the applied reverse voltage is increased
beyond the certain limit, it results in breakdown. During breakdown, the diode current increases
tremendously.
RESULT:
Thus the V-I characteristics of the Si PN junction Diode is plotted and verified.
Static forward Resistance =
Dynamic forward =
Static Reverse Resistance =
Dynamic Reverse =
Ex.No.1b
COMPONENTS REQUIRED:
2 Resistor - 100 Ω 1
4 Voltmeter - (0-1) V 1
- (0-30) mA 1
5 Ammeter
6 Bread Board - - 1
FORMULA USED:
PROCEDURE:
Forward Biased Condition:
1. Connect the circuit as shown in fig.
2. Vary Vzf gradually and note down the corresponding readings of Izf.
3 Step Size is not fixed because of non linear curve and vary the X- axis variable (i.e. if
output
variation is more, decrease input step size and vice versa).
4. Tabulate different forward currents obtained for different forward voltages.
CIRCUIT DIAGRAM:
FORWARD BIAS:-
REVERSE BIAS:-
TABULAR COLUMN:
MODEL GRAPH:
THEORY:
A properly doped crystal diode, which has a sharp breakdown voltage, is known as zener
diode. An ideal P-N Junction diode does not conduct in reverse biased condition. A zener
diode conducts excellently even in reverse biased condition. These diodes operate at a precise
value of voltage called break down voltage. A zener diode when forward biased behaves like
an ordinary P-N junction diode. A zener diode when reverse biased can either undergo
avalanche break down or zener break down.
Avalanche break down:- If both p-side and n-side of the diode are lightly doped,
depletion region at the junction widens. Application of a very large electric field at the
junction may rupture covalent bonding between electrons. Such rupture leads to the
generation of a large number of charge carriers resulting in avalanche multiplication.
Zener break down:- If both p-side and n-side of the diode are heavily doped, depletion
region at the junction reduces. Application of even a small voltage at the junction ruptures
covalent bonding and generates large number of charge carriers. Such sudden increase in the
number of charge carriers results in zener mechanism.
FORWARD BIAS:
On forward biasing, initially no current flows due to barrier potential. As the applied
potential increases, it exceeds the barrier potential at one value and the charge carriers gain
sufficient energy to cross the potential barrier and enter the other region. the holes ,which are
majority carriers in p-region, become minority carriers on entering the N-regions and electrons,
which are the majority carriers in the N-regions become minority carriers on entering the P-
region. This injection of minority carriers results current, opposite to the direction of electron
movement.
REVERSE BIAS:
When the reverse bias is applied due to majority carriers small amount of current (ie)
reverse saturation current flows across the junction. As the reverse bias is increased to
breakdown voltage, sudden rise in current takes place due to zener effect.
ZENER EFFECT:
Normally, PN junction of Zener Diode is heavily doped. Due to heavy doping the
depletion layer will be narrow. When the reverse bias is increased the potential across the
depletion layer is more. This exerts a force on the electrons in the outermost shell. Because of
this force the electrons are pulled away from the parent nuclei and become free electrons. This
ionization, which occurs due to electrostatic force of attraction, is known as Zener effect. It
results in large number of free carriers, which in turn increases the reverse saturation current.
RESULT:
Thus the V-I characteristics of the Zener Diode is plotted and verified.
Static forward Resistance =
Dynamic forward =
Static Reverse Resistance =
Dynamic Reverse =
Ex.No.2(a)
SINGLE PHASE HALF WAVE RECTIFIER
AIM:
To construct a Half wave rectifier with and without filter using diode and to draw its
performance characteristics.
COMPONENTS REQUIRED:
1 Transformer 230/(6-0-6)V 1
2 Resistor - 1K 1
3 Capacitor 100µf 1
6 - (0-30) mA 1
Ammeter
(0-250) μA 1
7 Bread Board - - 1
FORMULA USED:
WITHOUT FILTER:
(i) Vrms = Vm / 2
(ii) Vdc = Vm /
(iii) Ripple Factor = (Vrms / Vdc)2 – 1
(iv) Efficiency = (Vdc / Vrms)2 x 100
WITH FILTER:
(i) Vrms = (Vrms’2 + Vdc2)
(ii) Vrms’ = Vrpp / (3 x 2)
(iii) Vdc = Vm – V rpp / 2
(iv) Ripple Factor = Vrms’/ Vdc
PROCEDURE:
WITHOUT FILTER:
1. Give the connections as per the circuit diagram.
2. Give 230v, 50HZ I/P to the step down TFR where secondary connected to the Rectifier
I/P.
3. Take the rectifier output across the Load.
4. Plot its performance graph.
WITH FILTER:
1. Give the connections as per the circuit diagram.
2. Give 230v, 50HZ I/P to the step down TFR where secondary connected to the Rectifier
I/P.
3. Connect the Capacitor across the Load.
4. Take the rectifier output across the Load.
5. Plot its performance graph.
CIRCUIT DIAGRAM:
1 Transformer
230 V / 6V
1N 4007
1K
1, 230V, 100F CRO
50Hz
AC supply
TABULAR COLUMN:
WITHOUT FILTER:
Vm Vrms Vdc Ripple factor Efficiency
WITH FILTER:
Vrms Vrpp Vdc Ripple factor Efficiency
MODEL GRAPH:
Vin
(Volts)
t (ms)
Vo
(Volts) Without Filter
t (ms)
Vo
(Volts) With Filter
t (ms)
RESULT:
Thus the performance characteristics of 1 Half wave rectifier was obtained.
Ex.No.2b
SINGLE PHASE FULL WAVE RECTIFIER
AIM:
To construct a Full wave rectifier with and without filter using diode and to draw its
performance characteristics.
COMPONENTS REQUIRED:
1 Transformer 230/(6-0-6)V 1
2 Resistor - 1K 1
3 Capacitor 100µf 1
6 - (0-30) mA 1
Ammeter
(0-250) μA 1
7 Bread Board - - 1
FORMULA USED:
WITHOUT FILTER:
(i) Vrms = Vm / 2
(ii) Vdc = 2Vm /
(iii) Ripple Factor = (Vrms / Vdc)2 – 1
(iv) Efficiency = (Vdc / Vrms)2 x 100
WITH FILTER:
(i) Vrms = Vrpp /(2* 3)
(ii) Vdc = Vm – V rpp
(iv) Ripple Factor = Vrms’/ Vdc
PROCEDURE:
WITHOUT FILTER:
1. Give the connections as per the circuit diagram.
2. Give 230v, 50HZ I/P to the step down TFR where secondary connected to the Rectifier
I/P.
3. Take the rectifier output across the Load.
4. Plot its performance graph.
WITH FILTER:
1. Give the connections as per the circuit diagram.
2. Give 230v, 50HZ I/P to the step down TFR where secondary connected to the Rectifier
I/P.
3. Connect the Capacitor across the Load.
4. Take the rectifier output across the Load.
5. Plot its performance graph.
CIRCUIT DIAGRAM:
1 Transformer 1N 4007
230 V / 6V
100F
1K
1, 230V, CRO
50Hz
AC supply
1N 4007
TABULAR COLUMN:
WITHOUT FILTER:
Vm Vrms Vdc Ripple factor Efficiency
WITH FILTER:
Vrms Vrpp Vdc Ripple factor Efficiency
MODEL GRAPH :
Vin
(Volts)
t (ms)
Vo
(Volts) Without Filter
t (ms)
Vo
(Volts) With Filter
t (ms)
RESULT: Thus the performance characteristics of 1 Full wave rectifier were obtained.
EX NO:3 CLIPPERS AND CLAMPERS
AIM:
To analyse the various clipper and clamper circuits.
COMPONENTS REQUIRED:
2 Resistor - 1K Ω 1
3 Capacitor - 0.1µF 1
4 R.P.S (0–30)V 1
7 Bread Board - - 1
PROCEDURE:
CLIPPER CIRCUIT
CLAMPER CIRCUIT:
OUTPUT WAVEFORM:
TABULAR COLUMN:
CLIPPERS:-
INPUT WAVEFORM OUTPUT WAVEFORM
TYPE
AMP (V) TIME (ms) AMP (V) TIME (ms)
POSITIVE CLIPPER
NEGATIVE CLIPPER
CLAMPERS:-
NEGATIVE CLAMPER
THEORY:
The circuit, with which the waveform is shaped by removing a certain portion of the input
signal voltage above or below a certain level, is called as clipping circuit or simply clipper. The
clipping circuit is known as amplitude limiter or simply limiter. The clipping circuits consist of 4
types namely: 1.Positive clipper 2.Negative clipper 3. Biased Clipper 4. Combination Clipper.
1. Positive Clipper:
It consists of a diode and a resistor with the output taken across the resistor. The diode
acts as an ideal switch between the source and the load. It acts a closed switch, when the input
voltage is negative and as an open switch when the input is positive or zero. The purpose of the
resistor is to limit the current through the diode, when it acts as a closed switch.
2. Negative Clipper:
Here the diode is connected in the opposite to that of a positive clipper. The function of
the resistor is to limit the current when the diode is forward biased. The diode acts as a closed
switch for a positive input voltage and as an open switch for a negative input voltage.
3. Biased Clipper:
A clipping circuit which has the provision for the adjustment of a clipping level is called
a biased clipper. The name ‘bias’ is designated because the adjustment of the clipping level is
achieved by adding a bias voltage in series with the diode or resistor.
RESULT:
Thus the output performance for the clippers and clampers circuit are verified.
EX NO:4
AIM:
To obtain the input and output characteristic of BJT in common Emitter configuration
and also calculate its h-parameters.
COMPONENTS REQUIRED:
1 Transistor BC107 - 1
2 Resistor - 1KΩ 2
4 Voltmeter - (0-2) V 1
(0-30) V 1
- (0-30) mA 1
5 Ammeter
6 Bread Board - - 1
FORMULA USED:
PROCEDURE:
INPUT CHARECTERISTICS:
1. Connect the circuit as per the circuit diagram.
2. Set VCE ,vary VBE in regular interval of steps and note down the corresponding
IB reading. Repeat the above procedure for different values of VCE.
3. Plot the graph: VBE Vs IB for a constant VCE.
OUTPUT CHARACTERISTICS:
1. Connect the circuit as per the circuit diagram.
2. Set IB, Vary VCE in regular interval of steps and note down the corresponding IC reading.
Repeat the above procedure for different values of IB.
3. Plot the graph: VCE Vs IC for a constant IB.
PIN DIAGRAM:
B
CIRCUIT DIAGRAM:
(0 – 30)mA
1 K
- +
A
C
+
(0 – 30)mA +
1 K
- + A (0-30)V
(0-30)V BC107 +V (0-30)V -
++ - B 10 KΩ - +
C
V (0-30)V
- +
INPUT CHARACTERISTICS: OUTPUT CHARACTERISTICS:
IbmA
IcA
VCE = 2V
VCE = 1V
IB=60A
IB=40A
IB=20A
0
VBE(V) 0
VCE(V)
TABULAR COLUMN:
THEORY:
A BJT is a three terminal two – junction semiconductor device in which the conduction is
due to both the charge carrier. Hence it is a bipolar device and it amplifier the sine waveform as
they are transferred from input to output. BJT is classified into two types – NPN or PNP. A
NPN transistor consists of two N types in between which a layer of P is sandwiched. The
transistor consists of three terminal emitter, collector and base. The emitter layer is the source of
the charge carriers and it is heartily doped with a moderate cross sectional area. The collector
collects the charge carries and hence moderate doping and large cross sectional area. The base
region acts a path for the movement of the charge carriers. In order to reduce the recombination
of holes and electrons the base region is lightly doped and is of hollow cross sectional area.
Normally the transistor operates with the EB junction forward biased.In transistor, the current is
same in both junctions, which indicates that there is a transfer of resistance between the two
junctions. One to this fact the transistor is known as transfer resistance of transistor.
RESULT:
Thus the input and output characteristic of BJT in common Emitter configuration and
also its h-parameters are calculated.
EX NO:5
COMPONENTS REQUIRED:
1 Transistor BC107 - 1
2 Resistor - 1K Ω,10 KΩ 2
4 Voltmeter - (0-1) V 1
- (0-30) mA 1
5 Ammeter
6 Bread Board - - 1
FORMULA USED:
PROCEDURE:
INPUT CHARACTERISTICS:
It is the curve between emitter current IE and emitter-base voltage VBE at constant collector-
base voltage VCB.
1. Connect the circuit as per the circuit diagram.
2. Set VCE=5V, vary VBE in steps of 0.1V and note down the corresponding IB. Repeat the
above procedure for 10V, 15V.
3. Plot the graph VBE Vs IB for a constant VCE.
4. Find the h parameters.
OUTPUT CHARACTERISTICS:
It is the curve between collector current IC and collector-base voltage VCB at constant emitter
current IE.
1. Connect the circuit as per the circuit diagram.
2. Set IB=20A, vary VCE in steps of 1V and note down the corresponding IC. Repeat the
above procedure for 40A, 80A, etc.
3. Plot the graph VCE Vs IC for a constant IB.
4. Find the h parameters
PIN DIAGRAM:
B
E C
CIRCUIT DIAGRAM:
TABULAR COLUMN:
VCB = VCB = IE = IE =
MODEL GRAPH:
INPUT CHARACTERISTICS:
IE(mA)
VCB2
IE2
VCB1
IE1
OUTPUT CHARACTERISTICS:
IC (mA)
IE3
IC2 IE2
IC1
IE1
THEORY:
In this configuration the base is made common to both the input and out. The emitter is
given the input and the output is taken across the collector. The current gain of this configuration
is less than unity. The voltage gain of CB configuration is high. Due to the high voltage gain, the
power gain is also high. In CB configuration, Base is common to both input and output. In CB
configuration the input characteristics relate IE and VEB for a constant VCB. Initially let VCB = 0
then the input junction is equivalent to a forward biased diode and the characteristics resembles
that of a diode. Where VCB = +VI (volts) due to early effect IE increases and so the characteristics
shifts to the left. The output characteristics relate IC and VCB for a constant IE. Initially IC
increases and then it levels for a value IC = IE. When IE is increased IC also increases
proportionality. Though increase in VCB causes an increase in , since is a fraction, it is
negligible and so IC remains a constant for all values of VCB once it levels off.
RESULT:
Thus the input and output characteristic of BJT in Common Base configuration and also
its h-parameters are calculated.
Ex.No.6
AIM:
To obtain the VI characteristics of given FET & determine Drain resistance(rd),
Transconductance(gm), Amplification factor(),Pinch of Voltage(Vp).
APPARATUS REQUIRED:
1 Transistor BFW10 - 1
2 Resistor - 1K Ω 2
4 Voltmeter - (0-30) V 2
- (0-30) mA 2
5 Ammeter
6 Bread Board - - 1
PROCEDURE:
DRAIN CHARACTERISTICS:
1. Connect the circuit as per the circuit diagram.
2. Set the gate voltage VGS = 0V.
3. Vary VDS in steps of 1 V & note down the corresponding ID.
4. Repeat the same procedure for VGS = -1V.
5. Plot the graph VDS Vs ID for constant VGS.
OBSERVATIONS
1. d.c (static) drain resistance, rD = VDS/ID.
2. a.c (dynamic) drain resistance, rd = VDS/ID.
3. Open source impedance, YOS = 1/ rd.
TRANSFER CHARACTERISTICS:
1. Connect the circuit as per the circuit diagram.
2. Set the drain voltage VDS = 5 V.
3. Vary the gate voltage VGS in steps of 1V & note down the corresponding ID.
4. Repeat the same procedure for VDS = 10V.
5. Plot the graph VGS Vs ID for constant VDS.
VDS
Drain Resistance rd = VGS
I D
I D
Transconductance gm = VDS
VGS
PIN DIAGRAM:
SPECIFICATION:
DRAIN CHARACTERISTICS:
ID (mA)
VGS = 1V
VGS = 0V
VGS = -1V
VGS = -2V
0
VDS (volts)
TRANSFER CHARACTERISTICS:
ID(mA)
VDS =1V
VGS (V)
TABULAR COLUMN:
DRAIN CHARACTERISTICS:
VGS = 1V VGS = 2V
VDS (V) ID(mA) VDS (V) ID(mA)
TRANSFER CHARACTERISTICS:
VDS = VDS =
VGS (V) ID(mA) VGS (V) ID(mA)
THEORY:
FET is a voltage operated device. It has got 3 terminals. They are Source, Drain & Gate.
When the gate is biased negative with respect to the source, the pn junctions are reverse biased &
depletion regions are formed. The channel is more lightly doped than the p type gate, so the
depletion regions penetrate deeply in to the channel. The result is that the channel is narrowed,
its resistance is increased, & ID is reduced. When the negative bias voltage is further increased,
the depletion regions meet at the center & ID is cutoff completely.
RESULT:
Thus the Drain & Transfer characteristics of given FET is Plotted.
Rd =
gm =
=
IDSS =
Pinch off voltage VP =