Sequential Circuits-II

Counters:
 Counter is basically used to count the number of clock pulses
applied to a flip-flop.
 It can also be used for Frequency divider, time measurement,
frequency measurement, distance measurement, and also for
generating square waveforms.
 The flip-flops are asynchronous counters and are supplied
with different clock signals, there may be a delay in
producing output.

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 Ripple Counter
(Asynchronous Counter)
 Ripple counter is a cascaded arrangement of flip-flops where the output of
one flip-flop drives the clock input of the following flip-flop. The number
of flip flops in the cascaded arrangement depends upon the number of
different logic states that it goes through before it repeats the sequence
a parameter known as the modulus of the counter.

 A n-bit ripple counter can count up to 2n states. It is also known as MOD-

n counter. It is known as ripple counter because of the way the clock pulse
ripples its way through the flip-flops.

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 A counter may be an up counter that counts upwards or can
be a down counter that counts downwards or can do both
i.e. count up as well as count downwards depending on the
input control.
 The sequence of counting usually gets repeated after a limit.
When counting up, for the n-bit counter the count sequence
goes from 000, 001, 010, … 110, 111, 000, 001, … etc.
 When counting down the count sequence goes in the
opposite manner: 111, 110, … 010, 001, 000, 111, 110, …
etc.

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3-Bit Ripple Up Counter

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3-Bit Ripple Down Counter

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4-Bit Ripple Up Counter

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Decade Counter

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Mod-6 Ripple up Counter

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Ripple Up/Down Counter

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 Synchronous Counter
 The synchronous counters count the number of clock pulses received at its
input. The synchronous counter uses the same clock signal from the same
source and at exactly the same time. Generally, it is constructed using either
JK flip flop or T flip flop.

Design steps:
1. Find the number of flip flops using 2𝑛 ≥ N, where N is the number of
states and n is the number of flip flops.
2. Choose the type of flip flop.
3. Draw the state diagram of the counter.
4. Draw the excitation table of the selected flip flop and determine the
excitation table for the counter.
5. Use K-map to derive the flip flop input functions.

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 3-Bit Synchronous Counter
using J-K FF
 The counter to be designed will have 3 flip-flops.

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  Design a synchronous counter with counting sequence: 000,
001, 011, 111, 110, 100, 000,…
 The counter to be designed will have 3 flip-flops.

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 Ring Counter
 A ring counter is a typical application of the Shift register. The ring counter
is almost the same as the shift counter. The only change is that the output
of the last flip-flop is connected to the input of the first flip-flop in the case
of the ring counter but in the case of the shift resister it is taken as output.

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 Johnson Counter
 Johnson counter also known as creeping counter, is an example of
synchronous counter.
 In Johnson counter, the complemented output of last flip flop is connected
to input of first flip flop and to implement n-bit Johnson counter we
require n flip-flop.
 It is one of the most important type of shift register counter. It is formed
by the feedback of the output to its own input.
 Johnson counter is a ring with an inversion.
 Another names of Johnson counter are: creeping counter, twisted ring
counter, walking counter, mobile counter and switch tail counter.

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 Total number of used and unused states in n-bit Johnson
counter:
number of used states= 2*n
number of unused states=2n – 2*n

Advantages of Johnson counter:

 The Johnson counter has same number of flip flop but it can count
twice the number of states the ring counter can count.
 It can be implemented using D and JK flip flop.
 Johnson ring counter is used to count the data in a continuous loop.
 Johnson counter is a self-decoding circuit.

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Disadvantages of Johnson counter:
 Johnson counter doesn’t count in a binary sequence.
 In Johnson counter more number of states remain unutilized than the
number of states being utilized.
 The number of flip flops needed is one half the number of timing signals.
 It can be constructed for any number of timing sequence.
Applications of Johnson counter:
 Johnson counter is used as a synchronous decade counter or divider circuit.
 It is used in hardware logic design to create complicated Finite states
machine. ex: ASIC and FPGA design.
 The 3 stage Johnson counter is used as a 3 phase square wave generator
which produces 1200 phase shift.
 It is used to divide the frequency of the clock signal by varying their
feedback.
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 Design of Registers
 A Register is a device which is used to store such information. It is a group
of flip flops connected in series used to store multiple bits of data.

Buffer Register
Buffer registers are a type of registers used to store a binary word. These
can be constructed using a series of flip-flops as each flip-flop can store a single
bit. This means that in order to store an n-bit binary word one should design
an array of n flip-flops.

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 Control Buffer Register
 LOAD=1 Load the input values
 LOAD=0 Store the FF outputs

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 Shift Registers
The information stored within these registers can be transferred with
the help of shift registers. Shift Register is a group of flip flops used to
store multiple bits of data. The bits stored in such registers can be made
to move within the registers and in/out of the registers by applying clock
pulses. An n-bit shift register can be formed by connecting n flip-flops
where each flip flop stores a single bit of data.

• The registers which will shift the bits to left are called “Shift left
registers”.
• The registers which will shift the bits to right are called “Shift right
registers”.
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Shift registers are basically of 4 types. These are:
1. Serial In Serial Out shift register (SISO)
2. Serial In parallel Out shift register (SIPO)
3. Parallel In Serial Out shift register (PISO)
4. Parallel In parallel Out shift register (PIPO)

Serial In Serial Out shift register (SISO)

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 Serial In parallel Out shift register (SIPO)

Parallel In parallel Out shift register (PIPO)

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Parallel In Serial Out shift register (PISO)

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Applications of shift Registers:
 The shift registers are used for temporary data storage.
 The shift registers are also used for data transfer and data
manipulation.
 The serial-in serial-out and parallel-in parallel-out shift registers are
used to produce time delay to digital circuits.
 The serial-in parallel-out shift register is used to convert serial data
into parallel data thus they are used in communication lines where
demultiplexing of a data line into several parallel line is required.
 A Parallel in Serial out shift register us used to convert parallel data
to serial data

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 Bi-directional Shift Register
The binary number after shifting each bit of the number to the left
by one position will be equivalent to the number produced by
multiplying the original number by 2. In the same way, the binary
number after shifting each bit of the number to the right by one
position will be equivalent to the number produced by dividing the
original number by 2.
For performing the multiplication and division operation using the
shift register, it is required that the data should be moved in both the
direction, i.e., left or right in the register. Such registers are called
the "Bidirectional" shift register.

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 In the 4-bit "bidirectional" shift register where DR is the "serial right shift data
input", DL is the "left shift data input", and M is the "mode select input".

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Operation:
1) Shift right operation (M=1):
• The first, third, fifth, and seventh AND gates will be enabled, but the second,
fourth, sixth, and eighth AND gates will be disabled.
• The data present on the data input DR is shifted bit by bit from the fourth flip
flop to the first flip flop when the clock pulse is applied. In this way, the shift
right operation occurs.
2) Shift left operation (M=0):
• The second, fourth, sixth and eighth AND gates will be enabled, but the AND
gates first, third, fifth, and seventh will be disabled.
• The data present on the data input DR is shifted bit by bit from the first flip
flop to the fourth flip flop when the clock pulse is applied. In this way, the shift
right operation occurs.

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 Universal Shift Register
A register where the data is shifted in one direction is known as the "uni-
directional" shift register. A register in which the data is shifted in both the
direction is known as "bi-directional" shift register. A "Universal" shift register is a
special type of register that can load the data in a parallel way and shift that data
in both directions, i.e., right and left.
The input M, i.e., the mode control input, is set to 1 to perform the parallel
loading operation. If this input set to 0, then the serial shifting operation is
performed. If we connect the mode control input with the ground, then the circuit
will work as a "bi-directional" register. When the input is passed to the serial input,
the register performs the "serial left" operation. When the input is passed to the
input D, the register performs the serial right operation.

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Basic connections:
1. The first input (zeroth pin of multiplexer) is connected to the output pin of
the corresponding flip-flop.
2. The second input (first pin of multiplexer) is connected to the output of the
very-previous flip flop which facilitates the right shift.
3. The third input (second pin of multiplexer) is connected to the output of the
very-next flip-flop which facilitates the left shift.
4. The fourth input (third pin of multiplexer) is connected to the individual bits
of the input data which facilitates parallel loading.
S1 S0 Operation
0 0 No change
0 1 Shift right
1 0 Shift left
1 1 Parallel load

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 Finite State Machines (FSM)
The Finite State Machine is an abstract mathematical model of a
sequential logic function. It has finite inputs, outputs and number of states.
FSMs are implemented in real-life circuits through the use of Flip Flops.
The implementation procedure needs a specific order of steps (algorithm), in
order to be carried out.

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 We know that synchronous sequential circuits change affect their states for every
positive or negative transition of the clock signal based on the input. So, this behavior of
synchronous sequential circuits can be represented in the graphical form and it is known
as state diagram.
A synchronous sequential circuit is also called as Finite State Machine FSM, if it has
finite number of states. There are two types of FSMs.
 Mealy State Machine
 Moore State Machine

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Mealy State Machine:
A Finite State Machine is said to be Mealy state machine, if outputs
depend on both present inputs & present states.

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 State diagram:

In the above figure, there are three states, namely A, B & C. These states are
labelled inside the circles & each circle corresponds to one state. Transitions
between these states are represented with directed lines. Here, 0 / 0, 1 / 0 & 1 / 1
denotes input / output. In the above figure, there are two transitions from each
state based on the value of input, x.

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State diagram

State Table

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Moore State Machine:
A Finite State Machine is said to be Moore state machine, if outputs
depend only on present states.

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State diagram:

In the above figure, there are four states, namely A, B, C & D. These states
and the respective outputs are labelled inside the circles. Here, only the input
value is labeled on each transition. In the above figure, there are two
transitions from each state based on the value of input, x.

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State diagram

State Table

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 Moore Machine Mealy Machine

Output depends only upon the present Output depends on the present state as
state. well as present input.

If input changes, the output does change. If input changes, output also changes.

More states are required. Less number of states are required.

There is less hardware requirement for There is more hardware requirement for
circuit implementation. circuit implementation.

They react slower to inputs(One clock

They react faster to inputs.
cycle later).

Synchronous output and state generation. Asynchronous output generation.

Output is placed on states. Output is placed on transitions.

Easy to design. It is difficult to design.

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