A BCD
A BCD
determines their relationship. It outputs signals indicating whether one number is greater than,
equal to, or less than the other.
Common types: 1-bit comparator, 4-bit comparator, and n-bit comparator.
Outputs typically include signals like A > B, A = B, and A < B.
Used in applications like sorting, magnitude comparison, and decision-making in digital systems.
A parity generator is a circuit that generates a parity bit for a given set of data bits. Parity bits
are used for error detection in data transmission. There are two types of parity:
Even Parity: Ensures the total number of 1s (including the parity bit) is even.
Odd Parity: Ensures the total number of 1s (including the parity bit) is odd.
Used in communication systems to detect errors in transmitted data.
A parity checker is often used at the receiving end to verify the parity.
DecoderA decoder is a combinational circuit that converts binary input data into a one-hot
output, meaning only one of the outputs will be active (high) for any given input combination. It
translates n input lines into 2ⁿ output lines.
Example: A 3-to-8 decoder has 3 input lines and 8 output lines.
common applications include memory address decoding and selection of devices in
multiplexer/demultiplexer circuits.
An encoder is the reverse of a decoder. It takes multiple input lines and encodes them into a
smaller number of output lines. It produces an n-bit binary code for 2ⁿ input lines.
Example: An 8-to-3 encoder encodes 8 input lines into 3 output lines.Used in applications like
priority encoding and data compression.
A multiplexer is a combinational circuit that selects one of several input signals and forwards
the selected input to a single output line. It uses selection lines to choose which input to send to
the output.
A 2ⁿ-to-1 multiplexer has 2ⁿ inputs and n selection lines.
Example: A 4-to-1 MUX has 4 inputs and 2 selection lines.
Used in data routing, signal selection, and resource sharing.\
demultiplexer is the reverse of a multiplexer. It takes a single input signal and distributes it to
one of several output lines based on the value of the selection lines.
Key Points:A 1-to-2ⁿ demultiplexer has 1 input and 2ⁿ outputs.Example: A 1-to-4 DEMUX has 1
input, 2 selection lines, and 4 outputs.Used in applications like data distribution and memory
access.
Sequential Logic Circuits (Theory Explanation)Sequential logic circuits store information
in the form of binary states and change states based on a clock signal. Unlike combinational
circuits, their outputs depend not only on the current inputs but also on past inputs (i.e.,
previous states).
Latches and Flip-Flops---Latches and flip-flops are the basic building blocks of sequential
circuits. Both can store a single bit of data, but they differ in how they respond to inputs.
Latches----A latch is a level-sensitive storage element. It changes its state whenever the input
changes and the enable signal (if present) is active.
SR Latch: Uses two cross-coupled NOR or NAND gates. It has two inputs: Set (S) and Reset (R).
When S = 1, it sets the output to 1, and when R = 1, it resets the output to 0.
D Latch: Has a single input D (data) and an enable signal. When enabled, the output follows the
input.
Flip-Flops---A flip-flop is an edge-triggered storage element that changes state only at the rising
or falling edge of a clock signal.
SR Flip-Flop: Similar to the SR latch but responds to clock edges. It may have an invalid state if
both S and R are 1 simultaneously.
D Flip-Flop: Eliminates the invalid state of the SR flip-flop by using a single input D. The output
changes only at the clock edge and follows the input.
T Flip-Flop: Toggles its state when the input T is 1 and the clock edge occurs.
JK Flip-Flop: A universal flip-flop with two inputs J and K. When both inputs are 1, it toggles its
output, making it more versatile than an SR flip-flop.
Master-Slave JK Flip-Flop: A combination of two JK flip-flops where one acts as the master
(operates on the clock’s rising edge) and the other as the slave (operates on the clock’s falling
edge). This design eliminates race conditions.
Asynchronous Inputs---Asynchronous inputs are special inputs to flip-flops that can directly
set or reset the output regardless of the clock signal. Common asynchronous inputs include:
Preset: Sets the output to 1 when activated.
Clear: Resets the output to 0 when activated.
Counters---Counters are sequential circuits that count pulses or events. They can be
synchronous (all flip-flops are triggered by the same clock) or asynchronous (flip-flops are
triggered by different clock signals).
Types of Counters
Binary Counter: Counts in binary (e.g., 0, 1, 2, 3…).
BCD Counter: Counts in decimal digits represented in binary (0 to 9). It resets to 0 after reaching
9.
Decade Counter: A 10-state counter (similar to BCD counter).
Up/Down Counter: Counts either upwards (increment) or downwards (decrement) based on a
control signal.
Example: A 4-bit up/down counter can count from 0 to 15 (up) or 15 to 0 (down).
Shift Registers---A shift register is a sequential circuit that shifts its stored data in a specified
direction (left or right) on each clock pulse. It is built using flip-flops connected in series.
Types of Shift Registers
Serial-In Serial-Out (SISO): Data is shifted in serially and shifted out serially.
Serial-In Parallel-Out (SIPO): Data is shifted in serially and output in parallel.
Parallel-In Serial-Out (PISO): Data is loaded in parallel and shifted out serially.
Parallel-In Parallel-Out (PIPO): Data is loaded and output in parallel.
Counters using Shift Registers---Shift registers can be used to design special types of
counters.
Ring Counter
A ring counter is a circular shift register where the output of the last flip-flop is fed back to the
input of the first flip-flop.
It has a single ‘1’ circulating through the flip-flops.
Example: A 4-bit ring counter cycles through four states (0001, 0010, 0100, 1000).
Johnson Counter
A Johnson counter (also called a twisted ring counter) is similar to a ring counter, but the
inverted output of the last flip-flop is fed back to the input of the first flip-flop.
It cycles through twice as many states as a ring counter with the same number of flip-flops.
Example: A 4-bit Johnson counter cycles through 8 states (0000, 0001, 0011, 0111, 1111, 1110,
1100, 1000).
Difference between Synchronous and Asynchronous Sequential Circuits
Feature Synchronous Sequential Circuit Asynchronous Sequential Circuit
Clock Operates based on a global clock Does not require a global clock; changes
Dependency signal. occur immediately based on inputs.
All flip-flops change state Flip-flops change state at different times
Operation
simultaneously with the clock pulse. depending on the propagation delay.
Design Easier to design and analyze due to More complex to design due to race
Complexity predictable behavior. conditions and hazards.
Slower, as it waits for clock pulses Faster, as it responds immediately to
Speed
to update states. changes in inputs.
Synchronous counters, shift Ripple counters, certain types of pulse
Example
registers. generators.
Used in systems requiring precise Used in systems with simpler
Applications
timing like CPUs. requirements, such as simple counters.
More reliable due to controlled Less reliable due to timing issues like
Reliability
timing by the clock. glitches and races.
Difference between Synchronous and Asynchronous Counter
Feature Synchronous Counter Asynchronous Counter
All flip-flops are triggered by the Flip-flops are triggered by the output of
Clock Signal
same clock signal. the previous flip-flop (ripple effect).
Propagation Minimal, as all flip-flops change state Larger, as changes propagate through flip-
Delay at the same time. flops sequentially.
Faster, as all bits update
Speed Slower, due to ripple propagation delay.
simultaneously.
More complex due to additional logic Simpler to design, as it doesn’t require
Complexity
required for synchronization. additional synchronization logic.
More accurate, as all outputs change Less accurate for high-speed operations,
Accuracy
simultaneously. as output changes ripple through.