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FSM

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SIDDHARTHA SARKAR
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4 views5 pages

FSM

Uploaded by

SIDDHARTHA SARKAR
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
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FINITE STATE MACHINE

“1010” Sequence Detector


SEQUENCE DETECTOR
Output will be ‘1’ if the sequence “1010” is found, otherwise output remains ‘0’

Input 1 1 1 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 0 0 1

Output 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 0 0 1 0 0 0 Non-Overlap

Input 1 1 1 0 0 1 0 1 0 1 1 0 1 0 1 0 1 0 0 0 1

Output 0 0 0 0 0 0 0 0 1 0 0 0 0 1 0 1 0 1 0 0 0 Overlap
MEALY MACHINE

• In Mealy machine output


depends on present state and
1/1
input
0/0 1/0
1/0 0/0 1/0
S0 S1 S2 S3
• Depending on each input next
state is decided
0/1
0/0
• Output is synchronized with the
0/1
input, so no clock cycle delay is
found at the output
Overlapping

Non-overlapping
MOORE MACHINE

• In Moore machine output


1
depends only on present state,
0 1 1
output does not depend on
input
1 0 1 0
S0 0 S1 0 S2 0 S3 0 S4 1

• Depending on each input next


1
state is decided 0

• Output is delayed behind input


0
by one clock cycle Overlapping
Non-overlapping
WAVEFORMS FROM VHDL

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