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nor boolean

The document outlines various experiments related to CMOS NOR gates and Boolean expressions, detailing procedures, simulations, and calculations. It includes information on input configurations, output characteristics, and delay times for different gate implementations. The experiments aim to evaluate the performance and functionality of digital logic gates using MOS technology.

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0% found this document useful (0 votes)
5 views6 pages

nor boolean

The document outlines various experiments related to CMOS NOR gates and Boolean expressions, detailing procedures, simulations, and calculations. It includes information on input configurations, output characteristics, and delay times for different gate implementations. The experiments aim to evaluate the performance and functionality of digital logic gates using MOS technology.

Uploaded by

vedhviraat
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as PDF, TXT or read online on Scribd
You are on page 1/ 6

.

No. ....
Experiment

Date: 6 /S (20120
Schemat+c Title: NOR qde Page No.: 36
runeriment

vad Afm :
Te cap twu the
sch ematfe o -aput
houtog slnflas dloyas that ot
eMOS NOR gate
vdd CMOs Pov t e temputed
en epulment aboe,
NOR Vou

Vout Ot t e del ay ted fo al u po ssf lble com


VSS bloalk mm
enput ve ctoss, table the esui ncrease -the dfve streng h
to X and Ax and tabult usuts,

Tco le Req utred i cadence V?stuo se.

w?d th D nmos prmos transts hfs.


dength and

Pr þertos . he NOR qale ts a fundament oad dlgltal logte gate that


eb nae prccuces an
Qutp ut o4 0 only it at least one ot 9ts
Pmos
ungh L=160nm
qpdkiso
EnputsRs 1 Sn otha wids , ft retens 1(tau ) eny when
mos , ungh l: 180 on,
Lapdkiso | u enput o(talse). he NOs eperatf on , ofth an addi4n

Prrputfe s ot Vdc,Vpulse, Cap & Gne A's commnly wsed ln da?4al euctmMes toe lm blerp en Hnq
cell ene Pputes
|8V togte functfon, such as cARatfng Pruntus, AND gates, and
Vdc DC VoLta a
analog ub oHh cembfn afon al oge ereu? ts,
(a) vpulse be sumatd bt a
analeg Persod- Q0n Pulse oPdh- 1Dn Thu NOR aate' behautou can
putp ut je al poçsfee
tuth table,chi ch oyus h
RPse tfme =fal Hme = 1ns
V2 = &V Rnput conblnatf ons.
(6) vpuwlse
analy Porfod= 40n an d othe
tocu dln a those used n cemput os
RPse +fn = fas +ne = 1ns

-B.ILE.T.-
ExperimentNo.
Data. CS p0a5-20
Page Mo. 34
Test Sche mate ExperimentTitle:

vde t.ev
Procede: Jn the VI-6- nalo Pe lde
eo eut de (n)
temlna Sn-u eomman
csh
Vdd
2
sounce /hu[Prstaul cshrc
Vout vfstuoso
Nen (a) NOR 3)

to (b) wfndow open


5)
LRbsary (USn) fs slded luthe name hor_gat

Sfmulalfen: kyboat d,
Alct the Ibray gpdkieo ’ and ula t the pmos,omg;
tnable Orgumerty
J4pe ccl s cllce hide place thm atcordra to desfom
ctf ck ( to add vdc ,vss,vfn and vout prtis.
0-100n Moderate
Jrs make coehors as p the chut
chece

Calulafons
Crecte a

20.19n
tphl =
= 40.453| h (usn) aleted elfek ok
swe yew (?bray
tpih
make
td- tphl +tpLh
Check and gave ’ close it
2

td = 30.32 10Sn
fer Tut le
t bray
mate (usn) you

-qattat
not

-B.LE.T.
Experiment No. . . . .

Date: & S 201520


Jab waed uau 5 lay |Experiment Title: Page No. 38

4phl tpo
clPct
brise n yow
wtdt MOSFET tplh (?bra4 (usn )
I60nm 20 194| 30.32 l0Sn
Pmos
n mos 180n m
3
Then
Anabg ubrany dd vdc
,vpie, Ca
4) Check & save,

Sf mulatí m
Jatent Response daunch > ADE L ’ wlnd
opey.
Analysu ehoose tranS ’ 8hp Hme z
10Dn
’ mocrte clk agply ’ ct Ok
S! G0 to eulpts ’ to be plotHed ’ Aect om oestn
vin &, veut

eny Acleet gpdk t80nmn


b Net llst & Run
waue m and calelate th
O.

Conclu? on.

Ont SPmutatfon ot & enput NDR gate s aualed aud


0.5
and calutated the delay
0.0

tme Cns)

-B.LE.T.
Experiment No..
Date: 6/ 5 (20.25-20
Symbed Page No.: 39
SchemaHe Experiment Title: Boolean Expressfon.
vAd
vdc Ao. Te construct
BooL Vout AB+CD+e
vES tthe delay td te 6ome combination
and gabulati s e t
lnput tkos

Totl Req ulrd 3 Cadence Vrtuos0

Theo4:
Te conshuct t sehmafe 4 tinu
Vout
ustng MOS loq?e ue nud to fmpemen
te Legto ases reaulre d tor te expresf on,
The exprissf on cons?st s 4 the vaaYous ogc gaty
d0 dlglt ol cert t dsfn,Pnplemen fng Boole an
npressforn wsfng cMOS techmloqy Pe a tundamenal tak
that enuw felent low po opesa Pon.

This tpsfon 4 A6t CD+¬ envolves logeal AND , OR and Nor


Pmos & nmos tranu?s tors, opes ati'oms, Sn c MOS b Pc ach bayfe qade s lmplemented
heng h & wed h ) ot PMDS ¬ NMOS tmnsfs fa
Prpufes usln comblnatfons
ungh 180n m er cunm ple AND o pesa on eallsed wfn g AND qate
Tpelk1o pMos
lovete while an bR bperah n wse e
gpelkis o
ungih z 180nm toloed by
NOR qate fellome d y an Povu i Jo hly e p ion
AB andl cD'e a Pndl?ual AND opesal?rs cemefd

eMOs cdespom Povolues cTeatfn a pull-up net0k pmos


pleeato) ust e
ahd pul-don by NMos. The Rm
- dufom h al possi b
Hod bey simutatfon
-B.I.E.T
unputsr
Tst Sthennatfe:
vde ExperimentNo. . . 8
Date: 20 -20
Experiment Title: Page Ho:to
Vout
VouH -D Procedwe:

C
D
VSs
csh 4umnal.
2) SOwrce
/honalenstau/es hrc
gnd v?rtuos
Vpulse
4) | | e l k

frmpats ubray eted ’ ent tname boolean Dk

bray nam l na me Pnputtes 6)


6) r1ek n ey bo aad brrose ’ selet apkieo LTbr a
analog °b vdc DC voltae
V|=0v , V2 -1.8 V, Pertod - 20n cells ’ bPde plaa them
analag ub vpudse(t) acording to dupon
R?se e= fall b in pulse wpdth : 10n
add VdcVss ,v?n and vout pyts
analoq Pb vpulse () V1= DV, V2 -18 V, petfod = 4On )
Rfse tfme =fall tne 1n, Pule wfd= 90n ceck ( ) te mace connecHory s p frutt
upuse () VI DV, V2 -li8v, perfod = 60n chect and Saue.
Asetfm fall me =1n, Pue dtn =30n
vI=ov, V2 = 8v, pesio d = 80n Crut e Symbd

analag ib vpuse (A) Pesod z l00 6n ceate


R?setre fal ez 1n, pul wPdn 50n Swe e ebay u ted cllck ok
cap -’ cose.
nalog b qnd
Fog Tut fele :
StulaHom
tnablu
Ple ’ new ’ n a e a a booleantut
rons 0-100n modeate.
CUPk sn(‘). bnse o yous l?bray °ct boo luon",
rm analog ibrauy addd vdc, vpulse, ceup qond
Aoit he p p t y os perthe de n.
chek sane .
Experiment No.
Date: 29 -20
Jrnitent Reupons lExperiment Title:
Page No.: A)

3fmulafon:

60 6
Aa u n h ’ ADEL
30 36
20
Anaysfs > tTans’shp He = 100n
acua ey moclerte
’ appy ’ ok
Can to-outpw s ’ to be ploted
selet on duo
yin (A, B,c,D,¬) & vo ut
4 40 -6DE L > to shup modl bratu sect qpd kis onm
5)NetIPst & Run
D 4)| nayse the wauefm & calulate the

tphl 144,909P
tpth = 602139 4P
td =

Concuf m:

canied cut & cal uleted the

-B.IE.T

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