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Question Paper DSD

The document is a question paper for II-I year ECE students on Digital System Design, featuring both descriptive questions and multiple-choice questions. Topics include flip-flops, counters, multiplexers, and logic families. It also includes answers for the multiple-choice questions and fill-in-the-blank sections.

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SrinivasDon
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11 views4 pages

Question Paper DSD

The document is a question paper for II-I year ECE students on Digital System Design, featuring both descriptive questions and multiple-choice questions. Topics include flip-flops, counters, multiplexers, and logic families. It also includes answers for the multiple-choice questions and fill-in-the-blank sections.

Uploaded by

SrinivasDon
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
Available Formats
Download as DOCX, PDF, TXT or read online on Scribd
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QUESTION PAPER

II-I year ECE(A&B)

SUBJECT: DIGITAL SYSTEM DESIGN

1. A. convert SR flip flop to JK flip flop

B. Explain the design procedure for multiplexers and de-multiplexers and draw the logic diagram of a
4-to-1 line multiplexer with logic gates.

2. A.expalin master slave JK flip-flop

B.Design a ripple up counter using negative edge triggered JK flip flop

3. A.draw and explain the working of universal shift register.

B.compare synchronous and asynchronous counters

4. A.draw and explain emitter coupled logic(ECL)

B.compare logic families of RTL, DCTL, DTL, TTL, CML, CMOS.


BIT PAPER II BTECH I SEM ECE (A&B)

SUBJECT:DSD

MULTIPLE CHOICE QUESTIONS

1.sequential circuits contain___________ ( )

a) no memory element b) at least one memory element

c) all inputs applied simultaneously d) none of the above

2.waht is characteristic equation of SR flipflop ( )

a)Qn+1= S+RQn b) Qn+1=S+ RQ n c) Qn+1= RQ n d) all of the above

3.master-slave configuration is used in flipflop to__________ ( )

a) increase its clocking rate b) reduce power dissipation

c) eliminate race-around condition d) improve its reliability

4.__________ is not the application of flip-flops. ( )

a)elimination of keyboard debounce b)as a delay element c)as a memory element


d) implementation of combinational circuit

5) .the maximum count in a 4-bit binary ripple counter is ________ ( )

a). 3 b).5

c)15 d)16

6).in s-r flip flop,s and r must not be__________ ( )

a)S=R=1 b)S=R=0 c) S=0,R=1 d) S=1,R=0

7) .the modulo of a 4 bit binary counter _________ ( )

a) 0 b) 4

c) 8 d) 16

8).which state is stored in the memory elements in case of sequential circuits ? ( )


a) past b) present c) next d) none of these

9.relation between ________,_____and output is given by the state table ( )

a) input, present state b) present state, next state

c) next state, input d) both (b) and (c)

10.mod -5 and mod-2 counter can combined to get ____counter ( )

a)mod-7 b) mod-3 c) mod -4 d) mod -10

fill in the blanks:

1.a register is a set of _____________________.

2.the characteristic equation of the T flip flop is given by______________.

3.sequential circuits are_________ than combinational circuits.

4.a twisted-ring counter consisting of 3 flip-flops will have________________.

5.a ring counter consisting of five flip-flops will have______________.

6.assignment of values to state variables is called______________.

7.the __________technique avoids the introduction of redundant states.

8. which one is fastest logic family____________.

9. power dissipation is low in __________.

10.fanout in TTL is ____________.


MCQ ANSWERS:

1.B

2.B

3.C

4.D

5.C

6.A

7.D

8.B

9.B

10.D

BLANKS:

1.FLIP FLOPS

2.Q+=TQ +T Q

3.SLOWER

4.6 STATES

5.5 STATES

6.STATE ASSIGNMENT

7.STATE REDUCTION

8.ECL (OR) CML

9.CMOS

10.10

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