Course: Electronic Engineering UEC001

Topic: Complement and Logic Gates

Presentation by

Ajay Kakkar
ajay.kakkar@thapar.edu
9781506922
Assistant Professor
Department of Electronics and Communication Engineering,
 Complements

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Example using 2’s complement

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Example using 1’s complement

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Signed Binary Numbers

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Logic Gates
• Logic gates are abstractions of electronic circuit
components that operate on one or more input
signals to produce an output signal.

2-Input AND 2-Input OR NOT (Inverter)

A A
F G A H
B B

F = A•B G = A+B H = A’

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Universal Gates

XNOR
Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Universal Gate – NAND
This presentation will demonstrate
• The basic function of the NAND gate.
• How a NAND gate can be used to replace an AND gate, an OR
gate, or an INVERTER gate.
• How a logic circuit implemented with AOI logic gates can be
re-implemented using only NAND gates.
• That using a single gate type, in this case NAND, will reduce
the number of integrated circuits (IC) required to implement a
logic circuit. AOI Logic NAND Logic

More ICs = More $$ Less ICs = Less $$

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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 NAND Gate

X
Z  XY  X Y
Y

X Y Z
0 0 1
0 1 1
1 0 1
1 1 0

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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NAND Gate as an Inverter Gate
XX  X (Before Bubble)

X ZX

X Z
0 1
1 0 Equivalent to Inverter

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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NAND Gate as an AND Gate
XY
X
Z  XY  XY
Y

NAND Gate Inverter

X Y Z
0 0 0
0 1 0
1 0 0 Equivalent to AND Gate
1 1 1

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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 NAND Gate as an OR Gate
X

X Y
Z XY XY  XY
Y

Inverters NAND Gate

X Y Z
0 0 0
0 1 1
1 0 1 Equivalent to OR Gate
1 1 1

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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NAND Gate Equivalent to AOI Gates
AND OR INVERTER

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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Process for NAND Implementation
1. If starting from a logic expression, implement the design with
AOI logic.
2. In the AOI implementation, identify and replace every
AND,OR, and INVERTER gate with its NAND equivalent.
3. Redraw the circuit.
4. Identify and eliminate any double inversions (i.e., back-to-
back inverters).
5. Redraw the final circuit.

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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 NAND Implementation
Example:
Design a NAND Logic Circuit that is equivalent to the AOI circuit shown
below.

BC A C

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 NAND Implementation
Solution – Step 2

Identify and replace every AND,OR, and INVERTER gate with its NAND
equivalent.

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
20
 NAND Implementation
Solution – Step 3

Redraw the circuit.

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
21
 NAND Implementation
Solution – Step 4

Identify and eliminate any double inversions.

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
22
 NAND Implementation
Solution – Step 5

Redraw the circuit.

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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 Proof of Equivalence

C BC

BCAC

Z BCAC
AC
Z BCA C

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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 AOI vs. NAND

IC Type Gates Gate / IC # ICs IC Type Gates Gate / IC # ICs

74LS04 1 6 1 74LS00 4 4 1
74LS08 2 4 1 Total Number of ICs → 1
74LS32 1 4 1
Total Number of ICs → 3

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
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Basic Identities of Boolean Algebra
• 1. X + 0 = X • 2. X · 1 = X

• 3. X + 1 = 1 • 4. X · 0 = 0
• 5. X + X = X • 6. X · X = X

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Basic Identities (2)
• 7. X + X’ = 1 • 8. X · X’ = 0

• 9. (X’)’ = X

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
9/15/09 - L5 Boolean Algebra
 Basic Properties (Laws)

• Commutative • Commutative
– 10. X + Y = Y + X – 11. X · Y = Y · X
• Associative • Associative
– 12. X+(Y+Z)=(X+Y)+Z – 13. X(YZ) = (XY)Z
• Distributive • Distributive
– 14. X(Y+Z) =XY+XZ – 15. X+YZ=(X+Y)(X+Z)
– AND distributes over OR – OR distributes over AND

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Basic Properties (2)
• DeMorgan’s Theorem
• Very important in simplifying equations
– 16. (X + Y)’ = X’ · Y’
– 17. (XY)’ = X’ + Y’

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Simplify, simplify
• These properties (Laws and Theorems) can be used to
simplify equations to their simplest form.
– Simplify F=X’YZ+X’YZ’+XZ

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Affect on implementation
• F = X’YZ + X’YZ’ + XZ

• Reduces to F = X’Y + XZ

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Other examples
• Examples from the text
– 1. X + XY = X·1 + XY = X(1+Y) = X·1 = X
• Use 2 14 3 2
– 2. XY+XY’ = X(Y + Y’) = X·1 = X
• Use 14 7 2
– 3. X+X’Y = (X+X’)(X+Y) = 1· (X+Y) = X+Y
• Use 15 7 2

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Further Examples
• Examples from the text
– 4. X· (X+Y)=X·X+X·Y= X+XY=X(1+Y)=X·1=X
• Use 14 6 14 3 2
– 5. (X+Y) ·(X+Y’)=XX+XY’+XY+YY’=
– X+XY’+XY+0=X(1+Y’+Y)=X·1=X
– by a slightly different reduction
– 6. X(X’+Y) = XX’+XY = 0 + XY = XY

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
 Consensus Theorem
• The Theorem gives us the relationship
– XY + X’Z + YZ = XY + X’Z

Reference Book: M. M. Mano and M.D. Ciletti, Digital Design, Pearson, Prentice Hall, 2013.
Application of Consensus Theorem
• Consider
– (A+B)(A’+C) = AA’ + AC + A’B + BC
– = AC + A’B + BC
– = AC + A’B