BEE 3113

VLSI CIRCUIT DESIGN

Chapter 1: Fabrication And Devices
By : Dr. Noraisyah Tajudin
Email: noraisyahtajudin@lincoln.edu.my
Faculty of Engineering
Lincoln University College (LUC)
LECTURE 1
DATE : 21 NOV 2023
CONTENTS
• Introduction to IC Technology
• Basic MOS Transistors
• CMOS Technology
• Fabrication Process
• BiCMOS Technology
• Layout Design
• CMOS Inverter
• Id-Vds Relationship
The IC Market
The semiconductor industry is approaching $300B/yr in sales
IC Technology

• What advantages do ICs have over discrete components?

• Size: Sub-micron vs. millimeter/centimeter.
• Speed and Power: Smaller size of IC components yields higher speed and lower
power consumption due to smaller parasitic resistances, capacitances and
inductances.
• Switching between ‘0’ and ‘1’ much faster on chip than between chips.
• Lower power consumption => less heat => cheaper power supplies => reduced
system cost.
• Integrated circuit manufacturing is versatile. Simply change the mask to change
the design.
• However, designing the layout (changing the masks) is usually the most time-
consuming task in IC design.
VLSI Introduction
Very Large Scale Integration
• Processor of creating an integrated circuit by combining thousands of transistors

• Integration : Integrated Circuits

• Multiple devices on one substrate
• Integrated Device
• SSI – Small Scale Integration 7400 series, 10-100 transistors
• MSI – Medium Scale Integration 74000 series, 100-1000 transistors
• LSI – Large Scale Integration  1000-10,000 transistors
• VLSI  > 10,000 transistors
• ULSI/SLSI  (some disagreement)
VLSI Introduction
Factors consider – VLSI Design
Why Integration?
• Integration improves Power
• Size Speed
• Speed Size
• Power Cost
• Integration reduce manufacturing costs
• (almost) no manual assembly
VLSI Introduction
VLSI Domain Circuit Design, Programming and Analysis

Design

VLSI
CAD Tools Technology

Tools use to Design for IC Manufacturing

Circuits and Layout
Basic MOS Transistors
MOS transistors, or metal-oxide-semiconductor transistors, are a type
of electronic component used in integrated circuits and semiconductor
devices. They are used to control the flow of current in electronic
circuits, and they are essential components in modern electronics.

Types of MOS Transistor

MOS transistors can be divided into two types: n-type metal-oxide-
semiconductor (NMOS) and p-type metal-oxide-semiconductor
(PMOS). NMOS transistors are used for logic circuits and have a source,
drain, and gate. PMOS transistors are used for power circuits and have
a source, drain, and gate.
MOS Transistor Structure
MOS transistors are composed of a
substrate, source, gate, and drain.
The source and drain are metal
contacts, and the gate is an oxide
layer. The substrate is a
semiconductor material, such as
silicon, and can be either n-type or
p-type. This structure determines
the type of transistor.
MOS Transistor Operation
MOS transistors operate by changing the amount of current that can
pass through the transistor. This is done by controlling the voltage at
the gate. When the gate voltage is increased, the current passing
through the transistor is increased. When the gate voltage is decreased,
the current passing through the transistor is decreased.

MOS Transistor Applications

MOS transistors are used in various applications, including logic circuits,
memory circuits, radio frequency circuits, analog circuits, and power
circuits. They are also used in solar cells, LEDs, and other
semiconductor devices. MOS transistors are essential components in
modern electronics.
CMOS Technology

• CMOS (complementary metal-oxide semiconductor) is the

semiconductor technology used in the transistors that are
manufactured into most of today's computer microchips.
• In CMOS technology, both kinds of transistors are used in a
complementary way to form a current gate that forms an effective
means of electrical control.
• The main advantage of CMOS over NMOS and BIPOLAR technology is
the much smaller power dissipation.
• Unlike NMOS or BIPOLAR circuits, a Complementary MOS circuit has
almost no static power dissipation.
• Power is only dissipated in case the circuit actually switches. This
allows integrating more CMOS gates on an IC than in NMOS or bipolar
technology, resulting in much better performance.
• Complementary Metal Oxide Semiconductor transistor consists of
Pchannel MOS (PMOS) and N-channel MOS (NMOS).
NMOS

• NMOS is built on a p-type substrate with n-type source and drain

diffused on it. In NMOS, the majority of carriers are electrons.
• When a high voltage is applied to the gate, the NMOS will conduct.
• Similarly, when a low voltage is applied to the gate, NMOS will not
conduct. NMOS is considered to be faster than PMOS, since the
carriers in NMOS, which are electrons, travel twice as fast as the
holes.
PMOS

• P- channel MOSFET consists of P-type Source and Drain diffused on an

N-type substrate.
• The majority of carriers are holes.
• When a high voltage is applied to the gate, the PMOS will not
conduct.
• When a low voltage is applied to the gate, the PMOS will conduct.
• The PMOS devices are more immune to noise than NMOS devices.
CMOS Working Principle

• In CMOS technology, both N-type and P-type transistors are used to

design logic functions.
• The same signal which turns ON a transistor of one type is used to
turn OFF a transistor of the other type.
• This characteristic allows the design of logic devices using only simple
switches, without the need for a pull-up resistor.
• In CMOS logic gates a collection of n-type
MOSFETs is arranged in a pull-down
network between the output and the low
voltage power supply rail (Vss or quite
often ground).
• Instead of the load resistor of NMOS logic
gates, CMOS logic gates have a collection
of p-type MOSFETs in a pull-up network
between the output and the higher-voltage
rail (often named Vdd)
CMOS using Pull Up & Pull Down
• Thus, if both a p-type and n-type transistor have their gates
connected to the same input, the p-type MOSFET will be ON when
the n-type MOSFET is OFF, and vice-versa.
• The networks are arranged such that one is ON and the other OFF for
any input pattern as shown in the figure below.
• CMOS offers relatively high speed, low power dissipation, high noise
margins in both states, and will operate over a wide range of source
and input voltages (provided the source voltage is fixed).
CMOS Inverter
• The inverter circuit as shown in the figure below. It
consists of PMOS and NMOS FET. The input A
serves as the gate voltage for both transistors.
• The NMOS transistor has input from Vss (ground)
and the PMOS transistor has input from Vdd.
• The terminal Y is output. When a high voltage (~
Vdd) is given at input terminal (A) of the inverter,
the PMOS becomes an open circuit, and NMOS
switched OFF so the output will be pulled down to
Vss.
• When a low-level voltage (Vdd, ~0v) applied to the inverter, the NMOS
switched OFF and PMOS switched ON.
• So the output becomes Vdd or the circuit is pulled up to Vdd.
CMOS NAND Gate

• Figure shows a 2-input Complementary MOS NAND

gate. It consists of two series NMOS transistors
between Y and Ground and two parallel PMOS
transistors between Y and VDD.
• If either input A or B is logic 0, at least one of the
NMOS transistors will be OFF, breaking the path from
Y to Ground. But at least one of the pMOS transistors
will be ON, creating a path from Y to VDD
• The output Y will be high. If both inputs are high, both of the nMOS
transistors will be ON and both of the pMOS transistors will be OFF.
Hence, the output will be logic low.
• The truth table of the NAND logic gate given in the below table.
CMOS NOR Gate
• A 2-input NOR gate is shown in the figure
below. The NMOS transistors are in parallel
to pull the output low when either input is
high.
• The PMOS transistors are in series to pull
the output high when both inputs are low,
as given in the below table.
• The output is never left floating.
The truth table of the NOR logic gate
CMOS Applications

• CMOS technology has been used for the following digital IC designs.
• Computer memories, CPUs
• Microprocessor designs
• Flash memory chip designing
• Used to design application-specific integrated circuits (ASICs)
BiCMOS Technology

• Bipolar Technology was started in 1950’s.

• CMOS Technology was started in mid 1980’s.
• Later in 1990 there was a cross over between bipolar and CMOS
Technology.
• In BiCMOS technology, both the MOS and bipolar device are
fabricated on the same chip .
• It combines BJT and CMOS logic.
 BiCMOS

CMOS BJT
Low power dissipation High speed
High packing density High output drive
• The objective of the BiCMOS is to combine BJT and CMOS so as to
exploit the advantages of both the technlogies.
• Today BiCMOS has become one of the dominant technologies used for
high speed, low power and highly functional VLSI circuits.
• The primary approach to realize high performance BiCMOS devices is
the addition of bipolar process steps to a baseline CMOS process.
• The BiCMOS gates could be used as an effective way of speeding up
the VLSI circuits.
• The applications of BiCMOS are vast.
• Advantages of BJT and CMOS circuits can be retained in BiCMOS chips.
• BiCMOS technology enables high performance integrated circuits IC’s
but increases process complexity.
BiCMOS Cross-Section
Area Comparison
Applications of BiCMOS

• Full custom ICs

• SRAM, DRAM
• Microprocessor, controller
• Semi-custom ICs
• Register , Flipflop
• Standard cells
• Adders, mixers, ADC, DAC
• Gate arrays
Id-Vds Relationship
• The ID-VDS (current-drain vs. drain-source voltage) relationship in
CMOS (Complementary Metal-Oxide-Semiconductor) transistors is a
key aspect of their behavior.
• CMOS technology utilizes both N-channel (NMOS) and P-channel
(PMOS) MOS transistors to achieve low-power and high-performance
characteristics.
• For an NMOS transistor, the ID-VDS relationship describes the drain
current (ID) as a function of the drain-to-source voltage (VDS).
In the saturation region, where the transistor operates as an amplifier, the relationship
can be approximated by the quadratic equation:
• For a PMOS transistor, a similar equation can be used
with appropriate parameter values.
• Understanding the ID-VDS relationship is crucial for
designing and analyzing CMOS circuits, especially in
digital integrated circuits where transistors are often
operated in saturation for switching applications.
VLSI Design and Fabrication
VLSI Design Cycle The designated cost of the system, its
performance, architecture, and how the system
The integration of analog and mixed-signal will communicate with the external world are to
blocks, memory management, internal and be determined.
external communication, power
requirements, and choice of process
technology and layer stacks.
To generate design a high-performance
architectural design within the cost requirements
Logic design are logic minimization, posed by the specifications.
performance enhancement, and testability.
Logic design must also consider the problems
associated with test vector generation, error
detection, and error correction. The logic blocks of the desired design are replaced
by the electronic circuits. Circuit simulation - SPICE
The actual layout of the desired system is
done, where all the components will be placed
in the circuit and all these components are Packaged types may include Dual In-Line Packaged
interconnected. (DIPs), Pin Grid Array (PGAs), and Ball Grid Arrays
(BGAs). After a die is positioned in the package
cavity, its pins are connected to the pins of the
package, e.g., with wire bonding or solider bumps
The design is sent for manufacturing
(flip-chip). The package of the desired design is
then sealed and then sent to the end-users or
clients.
VLSI Design and Fabrication
The VLSI Design Process

Idea

Simulation
VLSI Design and Fabrication
The basic fabrication processes of the
Integrated Circuits are as follows:

• Wafer Preparation
• Oxidation
• Diffusion
• Ion Implantation
• Chemical-Vapor Deposition
• Photolithography
• Metallization
• Packaging
LAYOUT DESIGN  REFER TO PDF DOCUMENT

Layout design.pdf