Soitec ultra-thin SOI substrates

enabling FD-SOI technology

July, 2015
Agenda

• FD-SOI: Background & Value Proposition

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Today Ultra-mobile & Connected Consumer
Anywhere With Anything
At Any Time With Anyone (any place, any service,
any network)

 Intensified Challenges

Outstanding Performance Longer battery life

$$$ $
Optimized cost

July 8, 2015 3
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FD SOI – Performance, Power & Cost Efficiency

$$$ $

+5h web browsing

Cost per Million Gates ($)

3 GHz demo Good trend for FDSOI
Moore’s Law
on ARM-based Thermal camera on smartphone
Apps Proc. Gets Hot | Apps Proc. Stays Cool
(High Pwr Cons.) Wrong trend
(Higher integration
= higher cost)

Bulk Silicon
0.026
0.064

28FD

14FD
90nm 65nm 40nm 28nm 20nm 16/14nm

Smartphone on Bulk FD-SOI

Bulk Silicon FD SOI

28nm FDSOI Dual A9 both running at 1.85GHz

Source: ST Source: ST Source: IBS

28nm FD-SOI provides « 20nm performance at 28nm cost »,

Quote from FD-SOI foundry offering slides shown on Samsung booth, DAC2014
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Conventional silicon technology not suitable anymore

Next Technology Gen.:

Moore’s Law : 2n Million transistors
n Million transistors
in same chip size
• For similar chip cost: Application Next-Gen
Processor App. Processor
– More functionalities
(more transistors per chip) Scaling:
– Less power per transistor ”Moore’s law” More
functions
– Faster processing

Planar bulk CMOS reaching its limits at 20nm,

Can’t go further:

– Technical challenges
(leakage, variability and short channel effects)

– Cost-efficiency challenges
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Two Scaling Paths for Alternate Device Architecture: Planar
FD-SOI or Multi-Gate Transistor
Undopped fully
depleted channel
S G D Planar FD-SOI

Planar transistor architecture

Planar Bulk
S D
Transistor Cross-section Evolution
G

Fully Depleted
Technologies
Transistor Cross-section
G D

FinFET
Not beyond S

3-D transistor architecture

20nm Buried Oxide

Base Silicon Revolution

Perspective View

Behavior controlled New paradigm :

by doping Behavior controlled by silicon geometry

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FD-SOI story:
visionary innovations and partnerships

2005 2005 2008 2010 2014 2015

Substrate Research Advanced Industrial Open Products
Supply Institute R&D Partner foundries on the market

S G D

FD-SOI transistor
Smart Cut TM technology

Silicon die
with millions of
transistors

FD-SOI processed wafer

FD-SOI substrates with multiple raw dice per wafer

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Planar FD roadmap: Scalable down to 10nm

Source: L. Mallier (Leti) at Leti Innovation Days, June 25 2013

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FD-SOI is excellent for mobile
…and many other applications

Application Benefits 9

Consumer Infrastructure Networking

• Optimized SoC integration (Mixed-signal & RF) • Energy efficient multicore

• Energy efficient SoC in all thermal conditions • Effective DVFS

• Optimized leakage in idle mode • Excellent performance on memories

Internet of Things Automotive

• Ultra-low voltage operation • Well-managed leakage in high temperature

environment
• Highly Scalable operation
• High reliability thanks to highly-efficient
• Efficient RF and analog integration memories

Source: ST, SOI Forum, San Francisco Feb 2015

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Agenda

1. FD-SOI: Background & Value Proposition

2. The FD-SOI ecosystem & markets

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A full FD-SOI ecosystem is now in place

Substrates Foundries Fabless & Products

Research
Technology
&
& licensees
IP
blocks
Tools & EDA IP & Design Services

…
May 2014 - Samsung to provide 28nm FD-SOI as open foundry, Press release here
May 2014 - Cadence ready to provide 28nm FD-SOI physical IP blocks, Press release here
June 2014 - Synopsys to collaborate with Samsung, ST to accelerate 28nm FD-SOI adoption, Press release here
June 2015 - GlobalFoundries FD-SOI technology webinar here

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Samsung at SOI Forum in San Francisco, Feb 2015

PowerPerformanceArea Benchmark (cell level) 28FDSOI Low Vdd superiority

Ideal for battery operated ultra low power applications (IoT/wearable)
8

Performance(a.u.)
Performance Power Chip Area
@same leakage @same speed 28FDSOI
4
* Relative Comparisons 28HKMG
1.64
28PSiON
1.27 1.41
1 1 1
2
0.70 0.67
0.64 0.61 0.61
0.45

0
45Bulk 28PSiON 28HKMG 28FD-SOI 45Bulk 28PSiON 28HKMG 28FD-SOI 45Bulk 28PSiON 28HKMG 28FD-SOI 1.0Vop 0.90Vop 0.80Vop 0.63Vop

Source: Samsung, SOI Forum, San Francisco Feb2015

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GlobalFoundries FD-SOI webinar June 2015

Source: GF FD-SOI Technology Webinar , June 2015, available here

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Examples of wearable application:
FD-SOI enables added functionality at ULP for IoT applications

20mW

x20

1mW

Standard Sony Next Gen

GPS on the on FD-SOI
market

x20 Power Consumption Improvement

On-Chip enabled functionality (RF, logic and SRAM) operating at 0.6V, instead of 1.1V

Source: EETimes, “Sony Joins FDSOI Club”, 30 Jan 2015

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FD-SOI benefits for automotive applications

Source: ST , SOI Forum, San Francisco, Feb2015

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SOI wafer supply ensured

Smart Cut Smart Cut

300mm SOI starting wafer licensee
licensee
production sites,
Wordlwide:
Soitec ~70% today

Bernin-2, France

800 Kwfrs/yr capacity,

fully installed, for PD- and FD-SOI.
Full conversion to FD in progress.
Close to 2 Mwfrs/yr
capacity readily available
when needed.
Pasir Ris, Singapore

1 Mwfrs/yr capacity when fully installed

Qualified for FD-SOI.
Ready to ramp according to demand
in well under a year.

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Smart CutTM Alliance – A model for growth

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Agenda

1. FD-SOI: Background & Value Proposition

2. The FD-SOI ecosystem & Markets

3. Soitec’s ultra-thin SOI wafers

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 Soitec Fully-Depleted Product Roadmap

28 nm 20/14 nm 10 nm 7 nm
Target node
“28FD” “14FD” “10FD” and beyond
R&D

UTBOX25 UTBOX20 UTBOX15s

III-V.OI
Box thickness 25nm 20nm 15nm

FD-2D
Top Si unif +/- 5A Available+/-
upon
4A request tbd GeOI
for FDSOI
technology Top Si thickness 12nm 10.5nm tbd
sSOI

Top Si stress unstrained unstrained 1.3Gpa tens.

SOI

FD-3D
for FinFET Fin14 Fin10
technology

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 FD-2D Timelines

28FD Production

FD-2D
14FD Production
Risk Prod.
for FDSOI
technology
10FD Tech Dev Sampling Production

2013 2014 2015 2016 2017

During Tech. Dev Phase, early samples are available for selected customers

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Simpler process with FD-SOI :
Transistor channel pre-defined by substrate

• FD-2D wafers provide excellent control of transistor geometry

 To make the best of FD technology

FD-SOI transistor
Soitec FD-2D wafer
Ultra-Thin Top Silicon Layer S G D

Ultra-Thin Buried Oxide

Base Silicon

Critical dimension: Enables: Critical dimension:

Top Si thickness channel thickness
• No complex channel doping required
• Critical body geometry pre-defined
by top silicon
• Simplified CMOS process

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Top silicon uniformity:
the exceptional made industrial
Silicon thickness uniformity is guaranteed to within just a few atomic layers:
Top Si uniformity = +/-5 Å at all points on all wafers, equivalent to +/- 5 mm over 3,000 km
(corresponds to ~ +/-0.2 inches over the distance between San Francisco and Chicago)

Soitec FD-2D wafer

+5Å

Target

-5Å

San Francisco - Chicago ~ 2,988 km (1,857 mi)

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Agenda

1. FD-SOI: Background & Value Proposition

2. The FD-SOI ecosystem & Markets

3. Soitec’s ultra-thin SOI wafers

4. Cost Aspects

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IBS’s view on FD-SOI market potential

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 Industry Analyst IBS demonstrates FD-SOI competitive
advantage
Use IBS costs
28nm FD-SOI 20nm FD-SOI (14FD)
vs. alternatives vs. alternatives
Relative Relative
performance/power performance/power

20nm 16nm
better 28nm 20nm better FD-SOI FinFET
FD-SOI bulk

worse 28nm worse 20nm

bulk bulk
Relative Relative
wafer cost wafer cost

Lower cost Higher cost Lower cost Higher cost

“ FD-SOI offers best power / performance /

cost trade-off for high volume portable
applications ”
- H Jones, IBS • Several studies (IC Knowledge, ST) reach similar conclusions :
FD-SOI is extremely cost-competitive vs. any alternative

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Agenda

1. FD-SOI: Background & Value Proposition

2. The FD-SOI ecosystem & Markets

3. Soitec’s ultra-thin SOI wafers

4. Cost Aspects

5. Take-Aways

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Take-Aways

• 28nm FD-SOI:
outstanding power/performance for the cost of standard 28nm low-power CMOS

• ‘14FD’ / 20nm FD-SOI:

a compelling, cost-effective alternative to FinFET

• Tight wafer specifications are fully met by Soitec in a production environment

• Open foundry offering for FD-SOI at Samsung and GF

• Full ecosystem is in place for high-volume markets

from wafer supply through IP & design environment to foundry manufacturing

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Summary - FD-SOI: confirmed adoption
Strong competitive A rapidly growing ecosystem
A considerable potential
advantages and products announcements
Best Performance/Power/Cost 28nm FD-SOI potential
DAC 2014
4.3M
“There is an opportunity to turn SOI FD-SOI 28nm
from niche into mainstream.” > 25% wafers
Kevin Low, 28nm /year
Samsung senior director foundry marketing bulk
2013 ~2017
“For cost-sensitive markets with more analog
integration, FD-SOI is the right solution.” “The 28nm technology will represent
Jamie Schaeffer, GF product line manager approximately 4.3 million wafers in 2017 and
Cost per Million Gates ($) FD-SOI could capture at least 25% of the market.”
H. Jones, IBS
FD-SOI enables following
Moore’s law
FD-SOI for COST & POWER SENSITIVE
Negative trend MARKETS: automotive, IoT,
(Higher density = higher costs) mobile and networking
Bulk Silicon

0.026
0.064
28 FD

14 FD

90nm 65nm 40nm 28nm 20nm 16/14nm

Bulk Silicon FD SOI Source: IBS Source: SOI Consortium

New products under qualification using FD-SOI

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Thank You

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