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COA Lab Manual Experiment 1 PDF

This document introduces a computer organization and architecture simulator. It describes the main features of the simulator, including that it supports logic gates, buses, memory, and CPU design. It can simulate circuits and display input-output waveforms. The interface includes a palette, toolbar, canvas, and memory/controller tools. It explains the AND, OR, and NOT gates - their truth tables, symbols, and Boolean expressions. The simulator allows implementing and testing various digital logic circuits and computer components.

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689 views5 pages

COA Lab Manual Experiment 1 PDF

This document introduces a computer organization and architecture simulator. It describes the main features of the simulator, including that it supports logic gates, buses, memory, and CPU design. It can simulate circuits and display input-output waveforms. The interface includes a palette, toolbar, canvas, and memory/controller tools. It explains the AND, OR, and NOT gates - their truth tables, symbols, and Boolean expressions. The simulator allows implementing and testing various digital logic circuits and computer components.

Uploaded by

himanshic
Copyright
© © All Rights Reserved
We take content rights seriously. If you suspect this is your content, claim it here.
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Download as PDF, TXT or read online on Scribd
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Lab Manual – Computer Organization and Architecture (KCS 352C)

Experiment 1: Introduction to Simulator. Implement different logic gates and verify the
truth table.
Introduction:
This simulator provides an interactive environment for creating and conducting simulated
experiments on computer organization and architecture. It supports gate level design to CPU
design.

Figure 1. Main interface of the simulator


Features of the simulator:
The main features of the simulators are as follows:
Logic:
The simulator supports 5 valued logic. So the simulator supports wired AND for bus based
design.
These 5 states along with their corresponding wire values are as follows:
• True (T) (wire color: blue)
• False (F) (wire color: black)
• High impedence (Z) (wire color: green)
• Unknown (X) (wire color: maroon)
• Invalid (I) (wire color: orange)

Graphical organization of the simulator:


The simulator contains:
• A pallete on the right hand side. This pallete contains all the components and tools .
Tools are used to act up on the components.

KIET Group of Institutions-CSE Department


Lab Manual – Computer Organization and Architecture (KCS 352C)

• A toolbar on the top which contains several buttons. These buttons are:
◦ save/open
◦ simulate (after creating a circuit, this button has to be pressed to simulate the circuit
and
to get output)
◦ plot graph (to plot input-output wave form)
◦ undo/redo
◦ delete
◦ zoom in/zoom out
◦ increment/decrement LED (for digital LED which can also be used as input and
display)
◦ start/stop clock pulse
◦ to check the name or pin configuration of a component
◦ changing connection types
◦ checking the user identification
• A canvas in the middle where the circuits will be designed.
• A toolbar on the left side which contains the following buttons:
◦ set port to set the number of input and output ports for a circuit.
◦ Set Label and set name to set the label contents and the name of different
components.
◦ load memory to load the memory content to the inbuilt memory(4 bit address and 12
bit
data) for performing the computer design experiment. Data can be load either from
file
or through form.
◦ Show memory to show the content of the in built memory.
◦ ASM chart to load the ASM (algorithimic state machine) chart for a controller.
Tools:
• Different tools are:
◦ Selection tool- used for selecting components
◦ Marquee tool- used for selecting many components at a time by dragging the
mouse in the design area(editor).
◦ Connection tool- used for connecting components.
◦ Clonning tool – used to create cloned components.
AND Gate
• The logic or Boolean expression given for a digital logic AND gate is that for Logical
Multiplication which is denoted by a single dot or full stop symbol, ( . ) giving us the
Boolean expression of: A.B = Q.
• Then we can define the operation of a digital 2-input logic AND gate as being:

“If both A and B are true, then Q is true”

KIET Group of Institutions-CSE Department


Lab Manual – Computer Organization and Architecture (KCS 352C)

Fig 2: AND Gate

OR Gate
• In mathematics, the number or quantity obtained by adding two (or more) numbers
together is called the sum. In Boolean Algebra the OR function is the equivalent of
addition so its output state represents the addition of its inputs. In Boolean Algebra
the OR function is represented by a “plus” sign (+) so for a two input OR gate the
Boolean equation is given as: Q = A+B, that is Q equals either A OR B.

KIET Group of Institutions-CSE Department


Lab Manual – Computer Organization and Architecture (KCS 352C)

Fig 3: OR Gate

NOT Gate

• The NOT gate, which is also known as an “inverter” is given a symbol whose shape is
that of a triangle pointing to the right with a circle at its end. This circle is known as
an “inversion bubble”.
• The NOT function is not a decision-making logic gate like the AND, or OR gates, but
instead is used to invert or complement a digital signal. In other words, its output state
will always be the opposite of its input state.

KIET Group of Institutions-CSE Department


Lab Manual – Computer Organization and Architecture (KCS 352C)

Fig 3: NOT Gate

KIET Group of Institutions-CSE Department

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