Dr. MITHUN Kr.

BHOWAL

PHN NO: 9874577633

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INTEL 8085 MICROPROCESSOR

The term microprocessor unit (MPU) is similar to the term central processing unit (CPU) used in
traditional computers. MPU is a device that communicate with peripherals, provide timing signals, direct
data flow and perform computing task as specified by the instruction in memory. Here we describe Intel
8085 as it is one of the most popular 8-bit microprocessors in India. The Intel Corporation has also
developed a large number of general purpose and special purpose peripheral devices. These devices
are very useful for the development of the microprocessor based system.

8085 MICROPROCESSOR

8085 is a 8 bit general purpose NMOS microprocessor since its data length and data bus width is 8 bits.
It has an addressing capability of 16 bits, i.e it can address 216 = 64 KB of memory (1 KB=1024 bytes). Its
has 40 pins, requires +5 v power supply and can operate with a 3 MHZ single phase clock(i.e clock
speed).It consist of three main section: 1) Arithmetic and logic unit (ALU)

2) Timing and control unit

3) A set of register.

1) ALU

It performs arithmetic and logic operation as follows:

i) Addition

ii) Subtraction

iii) Logical AND

iv) Logical OR

v) Logical EX-OR

vi) Complement (logical NOT)

vii) Increment (add 1)

viii) Decrement (subtract 1)

ix) Left shift, rotate shift , rotate right

x) Clear etc
 2) TIMING AND CONTROL UNIT :

It generates timing and control signals which are necessary for the execution of instruction. It
controls data flow between CPU and peripherals (including memory). It provides status, control and
timing signals which are required for the operation of memory and I/O device.

3) A SET OF REGISTER:

A register is a collection of eight D-type flip flops with parallel –in and parallel-out operation. A flip
flop can only store one bit at a time. Therefore , to handle eight bits at a time, eight flip flops are
required and hence the term 8-bit register. Register are used by the microprocessor for temporary
storage and manipulate of data and instruction. Data remain in the registers till they are sent to the
memory or I/O device. The register unit consists of one 8-bit accumulator or reg. A, six general
purpose data register B, C, D, E, H,L, two internal register W and Z, two 16 bit address register PC
and SP, one increment/decrement counter register.

i) ACCUMULATOR: Accumulator is an 8-bit register associated with the ALU. Being only 8 bits
long, it can only hold one byte at a time. Any previous data stored in this register will be
overwritten as soon as new data is stored. It is used to hold one of the operands of an
arithmetic and logic operation. It serves as an input to the ALU. The other operand for an
arithmetic and logic operation may be stored either in the memory or in one of the
general purpose register and final result is placed in the accumulator.

ii)GENERAL PURPOSE REGISTER: 8085 microprocessor contain six 8-bit general purpose register.
They are: B, C, D, E, H, L register. The user can use these registers to store or copy a data
temporarily during the execution of a program by using data transfer instructions. Though
these register are of 8-bits but to hold 16-bit data a combination of two 8-bit registers can
be employed. The combination of two b-bit registers is know as a register pair. The
register pairs in 8085 are: B-C, D-E, H-L. Apart from these six general purpose registers,
8085 microprocessor also has two 8-bits internal registers. These registers are named as
W and Z. These registers are only for internal operation of the microprocessor and not
available to the user. Microprocessor uses these registers internally for example in the
case of CALL an XCHG instructions.

iii)PROGRAM COUNTER: It is a 16 bit special purpose register. The function of the PC is to point to
the memory address from which the next byte is to be fetched. The microprocessor increment the
content of PC during the execution of an instruction so that it points to the address of the next
instruction.

iv)STACK POINTER(SP): The stack is a sequence of memory location set aside by a programmer to
store/ retrieve the content of accumulator, flags, PC and general purpose register during the execution
of a program. Any portion of the memory can be used as stack. Since the stacks works on LIFO (LAST IN
FIRST OUT). It is a 16 bit special purpose register which holds the address of the memory location of the
top of the stack. The range of stack memory locations must be chosen carefully so that it does not affect
the program space

v) INSTRUCTION REGISTER: the instruction register holds the opcode (operation code) of the instruction
which is being decoded and executed.

vi) TEMPORARY REGISTER: It is an 8 bit register associated with ALU. It holds data during an arithmetic/
logic operation. It is used by the microprocessor. It is not accessible to programmer.

vii) INCREMENT/ DECREMENT COUNTER: The counter register is used to increment or decrement the
contents of the various registers available in the register unit. For instant everytime microprocessor
accesses a memory, its PC register is incremented.

viii) FLAGES: There are five flip flop to serve as status flag. The flip flop are set and reset according to
the condition which arise during an arithmatic and logical operation. There are five status flags :

carry flag(CS): After the execution of an arithmetic instruction if a carry is produced, the carry flag CS is
set to 1 otherwise 0.
Parity flag (P) : If the result of an arithmetic or logical operation contain even number of 1 , the P is set
to 1. If the result contain odd number of 1s, then it is 0.

Auxiliary carry flag (AC) : A carry from 3rd bit of the result of an arithmetic or logic operation to 4th bit
then AC=1, otherwise zero.

Zero flag(Z) : If the result of an arithmetic and logic operation is zero then Z flag is set to 1, otherwise 0.

Sign flag (S): If the result of an arithmetic and logic operation is negative then S flag is set to 1, otherwise
0.

DATA AND ADDRESS BUS: 8085 is a 8 bit microprocessor. Its data bus is 8 bit wide and hence 8 bit data
can be transmitted in parallel from or to the microprocessor. The 8085 required a 16 bit wide address
bus as the memory address are of 16 bit. The 8 most significant bits of the address (A15 – A8 ) are
transmitted by the address bus and 8 LSB of the address (A7 – A0 ) are transmitted by address/ data bus.
The address and data bus transmitted data and address at different moment. At a particular moment it
transmit either data or address. Thus AD bus operates in time shared mode. This technique is known as
multiplexing.
PIN CONFIGURATION :

A8 – A15 (output): These are address bus , are used for the
most significant bits (MSB) of the memory address or 8 bit
of I/O address.

AD0 – AD15 (input/output): These are time multiplexed

address/data bus, i.e they are serve dual purpose. They are
used for the LSB 8 bits of the memory address or I/O
address during the first clock cycle of a machin cycle. Again
they are used for data during second and third clock cycles.

CONTROL AND STATUS SIGNAL: These group of signals

including two control signals (RD’ and WR’) , three status
signal (IO/M’ , S1 , S0 ) to identify the nature of the operation
and one special signal (ALE) to indicate the beginning of the
operation.

ALE(o/p): (address latch enable) this is a positive

going pulse generate every time the 8085 begins an
operation, it indicates that the bits on AD7 –AD0 are address
bus and generate a separate set of eight address line

(A7 –A0 ) .

RD’(o/p): (read) It is an active low output control signal. When this signal is low it indicates that the
microprocessor wants to read a data either from memory or IO device.

WR’(o/p): (write) This is an active low output control signal. When this signal is low, it indicates that the
microprocessor wants to write a data either into memory or IO device.

S0 , S1 (o/p): (status signal) These are the two data bus status signal. These signals sent by the
microprocessor to distinguish the various types of operation given below:

S1 S0 Operation

0 0 HALT

0 1 WRITE

1 0 READ

1 1 FETCH
EXTERNALLY INITIATED SIGNAL:

READY(I/O): It is used by the microprocessor to sense whether a peripheral is ready to transfer data or
not. A slow peripheral may be connected to the microprocessor through READY line. If READY is high
peripheral is ready. If it is low the microprocessor waits till it goes high.

HOLD(i/P): It indicates that another device is requesting for the use of address and data bus. Having
received a HOLD request the microprocessor relinquishes/resign the use of the buses as soon as the
current machine cycle is completed.

HLDA(o/p): it is a signal for HOLD acknowledgement. It indicates that’s the HOLD request has been
received.

INTR(i/p): It is a interrupt request signal. Among interrupt it is lowest priority. It is maskable interrupt.
Interrupt process is controlled by the interrupt enable flipflop, which is internal to the microprocessor
and can be set or reset by using software instruction. If the flipflop is enable and the input to the
interrupt signal INTR goes high, the microprocessor is interrupted. When INTR is high the program
counter does not increment its contents. An interrupt is used by I/O devices to transfer data to the
microprocessor without wasting its time.

INTA’(o/p): It is an interrupt acknowledgement sent by the microprocessor after INTR is received.

RST 7.5, 6.5 and 5.5(restart interrupt)(i/p) : These are vector interrupt that transfer the program control
to specific memory location and it is maskable interrupt.

TRAP (i/p): This is non maskable interrupt and has the highest priority. This is vectored interrupt. It is
edge as well as level triggered. The mask can be set to any of these interrupts by SIM instruction. RST 7.5
is edge triggered. RST 6.5 is level triggered. RST 5.5 is edge triggerd.

ORDER OF PRIORITY: TRAP (highest priority)

RST 7.5

RST 6.5

INTR (lowest priority)

INTERRUPT CALL LOCATION

TRAP 0024 H

RST 7.5 003C H

RST 6.5 0034 H

RST 5.5 002C H

RESET IN (i/p): It reset program counter to zero. It also reset interrupt enable and HLDA flip flop. It does
not affect any other flag or register except the instruction register.

RESET OUT (o/p): It indicates that the CPU is being reset.

POWER SUPPLY AND CLOCK FREQUENCY:

X1 ,X2 (i/p): These are terminals to be connected to an external crystal oscillator which produce a
suitable clock for the operation of microprocessor.

CLK (o/p): clock out for user, which can be used for other digital ICs.

Vcc : +5v power supply.

Vss : Ground.

SID (i/p): It is a data line for serial input. It is used in serial data communication. Through this pin serial
data is received by the processor. (RIM instruction is executed)

SOD(o/p): It is a data line for serial output . Through this pin, the serial data is transmitted by the
processor. The output SOD is set or reset as specified by the SIM instruction.
Opcode and operands: Each instruction contain two part: operation code (OPCODE), operand.

The first part of the instruction which specify the task to be perform by the computer is called OPCODE
and the second part of the instruction is the data to be operated on is called operand.

e.g. MOV A,B opcode of MOV is 78 H and operand is A,B.

Instruction word size: All instructions are not same length. According to the size of the instruction are
classified into the following three way : 1 byte, 2 byte, 3 byte instruction.

One byte instruction: MOV A,B → opcode is 78 H. the opcode 78 H can be written as in the binary forms
as 0111 1000.

Two byte instruction: MVI B,05 H → opcode is 06H. 1st byte is its opcode and 2nd byte is either data or
address. It can be written as in the binary forms as 0000 0110 0000 0101

Three byte instruction: LXI H, 2400 H → opcode is 21 H. 1st byte is opcode and 2nd,3rd bytes are 16 bit
data or address. It can be written as in the binary form as 0010 0001 0010 0100 0000 0000.

Instruction cycle: when an instruction of a 8085 being execute it is necessary to fetch the opcode of the
instruction from the memory and execute it. This total function is called instruction cycle. The first part
of an instruction cycle is to fetch the opcode from memory is called fetch cycle and second part is to
execute it is called execute cycle.

Machine cycle: Machine cycle is define as the time required to complete the operation of accessing
memory, I/O or acknowledge an external request. In a machine cycle one basic operation such as
opcode fetch, memory write or memory read, I/O read or I/O write. An instruction is consisting of
several machine cycle.

T-state: One subdivision of an operation performs in one clock cycle is called a state or T-state.
Addressing mode: The technique to search data from various memory location, registers etc in different
way is called addressing mode. There are five addressing modes:

Direct addressing: The direct addressing mode is used when the operand is available at some memory or
an IO location. Data is directly stored and address of the operant is given by the instruction itself.
Instruction that indicate a direct address require three-bytes of storage, one for the instruction code and
two for the 16-bit address in case of memory related operations and require two-bytes, for the
instruction code, and other for 8-bit IO address.
e.g. LDA 2000 H, STA 5000 H, IN 01 H, OUT 05 H

Register addressing: In this mode data can find out from registers. Here the operands are the general
purpose register. Most of the instructions that use register addressing deal with 8-bit values.
e.g. MOV B,C , ADD B. However, a few of these instruction deal with 16-bit register pairs. e.g. SPHL

Register indirect addressing: In this mode of addressing the address of the operand is specified by a
register pair.
LXI H,8050 H

MOV A,M here MOV A,M is an example of register indirect addressing because the

HLT address of the memory location M is specified by HL pair.

STAX r is another example of indirect addressing.

Immediate addressing: data will be supply by the user, but where operands are specified within the
instruction itself.
e.g. MVI A,05 H , ADI 06 H, LXI H,FF00 H.

Implicit addressing: The instruction which are operates on the content of the accumulator directly, these
instruction do not require specifying the operands.
e.g. CMA, RAL, RAR.

Address/data bus demultiplexing:

In 8085 the higher order address lines are dedicated to carry the higher order address but the lower
order address lines are multiplexed with data bus. This multiplexing is done to keep the number of pins
as minimum as possible. These lines are demultiplexed to generate the independent address as well as
data bus. The demultiplexing of AD0 – AD7 lines is done by using an 8-bit D-latch IC 74LS373 along with
the ALE signal as shown in fig. The ALE signal is connected to the Enable (G) pin of the latch and the
Output control (OC’) signal of the latch is grounded. When ALE is high, the address signals will get
latched in 8-bit latch and the output of latch will provide A0-A7 address contents. When ALE signal is low
for data, it will disable the latch from accepting contents from AD0-AD7 lines and the same lines can be
used as data lines.