UNIT V

Pin Diagram of 8085 Microprocessor

8085 is a 40 pin device. It works on +5V single power supply. The explanation of pin
diagram of 8085 microprocessor is given below:

1. X1 and X2 : These are the terminals connected to an external crystal or RC oscillator.

These pins are used to drive internal clock generator which produces suitable clock
for the operation of microprocessor.
2. Reset Out : It is active high signal. It indicates that the CPU is being reset. This signal
is used by the microprocessor or CPU to reset the other device connected to it.
3. Reset In: It is an active low input signal it sets program counter to 00000H, resets
interrupt enable and HLDA(Hold Acknowledgement).
4. SID: It sis active high signal and it is used to send data to the microprocessor serially.
5. SOD: It is an active high signal and it is used to send data from microprocessor to any
other O/P device.

6. TRAP, RST7.5, RST 6.5, RST 5.5: These are the interrupts when an interrupt comes
microprocessor executes the next instruction from a fixed location in the memory.
7. INTR: It is called interrupt request. It is of the lowest priority. The INTR is enabled or
disabled. It gets disabled by reset or immediately after an interrupt is accepted.
8. INTA: This is active low signal and it is known as interrupt acknowledge. When an
interrupt request is accepted then the microprocessor sends interrupt acknowledge
INTA.
9. AD0 AD7 : Multiplexed Address /Data Bus: These signals are Bi-directional. These
are time multiplexed address and data bus. During 1st clock cycle, it acts as a least
significant 8 bits of memory address. For 2nd and 3rd clock cycle, it acts as a data bus.
10. A8 to A15 : These are unidirectional signals which carry the most significant bit i.e. 8
bits of the memory address.
11. ALE(Address Latch Enable):This is an O/P signal used to demultiplex the
address/data bus. In other words ALE is used to separate AD0 ---AD7 are addresses and
when it is low it indicates that the contents on AD0 AD 7 is data.
12. S1 and S0: These are two output status signals generated by microprocessor. These
indicates type of operation performed by microprocessor.
13. IO/M : Input Output/Memory : It is an O/P control signal. These signal tells whether
the operation is related to memory or to I/o device. In other words IO/M separated
memory and I/O devices. If the signal on this pin is low then microprocessor is
performing memory related operation and if signal on this pin is high then
microprocessor will perform I/O perform I/O related operation.
14. Read(RD): It is an active low output control signal. When the signal on this pin is low
it indicates that cpu read the data form selected memory or I/O location.
15. Write(WR): It is an active low O/P control signal. When the signal on this pin is slow
it indicates that the CPU will write data in the selected memory or I/O location.
16. Ready: It is an active high input control signal with the help of this pin
microprocessor checks he readiness of I/O device for data transfer. i.e. whether the
I/O signal is ready to receive or send data. If the signal on this pin is high, CPU will
perform data transfer but if the signal on this pin is low then it will wait till the signal
goes high.
17. Hold and HLDA: Hold is an active high input signal and HLDA is an active high
output signal. Signal at hold pin indicates that another device is requesting for the use
of address, data and control to other device. HLDA is hold acknowledgement. It

indicates microprocessor has received the hold request and will transfer the control of
address, data and control bus in the next clock cycle.
18. Vcc: It is used to provide +5v power supply.
19. GND or Vss: This pin always connected to ground. I.e. ve charge.

FUNCTIONAL DIAGRAM OF 8085 MICROPROCESSOR

Accumulator:-It is a 8-bit register which is used to perform airthmetical and logical

operation. It stores the output of any operation. It also works as registers for i/o accesses.
Temporary Register:-It is a 8-bit register which is used to hold the data on which the
acumulator is computing operation. It is also called as operand register because it provides
operands to ALU.
Registers:-These are general purposes registers. Microprocessor consists 6 general purpose
registers of 8-bit each named as B,C,D,E,H and L. Generally theses registers are not used
for storing the data permanently. It carries the 8-bits data. These are used only during the
execution of the instructions.These registers can also be used to carry the 16 bits data by
making the pair of 2 registers. The valid register pairs available are BC,DE HL. We cannot
use other pairs except BC,DEand HL. These registers are programmed by user.

ALU:-ALU performs the airthmetic operations and logical operation.

Flag Registers:-It consists of 5 flip flop which changes its status according to the result
stored in an accumulator. It is also known as status registers. It is connected to the ALU.
There are five flip-flops in the flag register are as follows:
1.Sign(S)
2.zero(z)
3.Auxiliary carry(AC)
4.Parity(P)
5.Carry(C)
The bit position of the flip flop in flag register is:

All of the three flip flop set and reset according to the stored result in the accumulator.
1.Sign- If D7 of the result is 1 then sign flag is set otherwise reset. As we know that a number
on the D7 always desides the sign of the number.
if D7 is 1: the number is negative.
if D7 is 0: the number is positive.

2.Zeros(Z)-If the result stored in an accumulator is zero then this flip flop is set otherwise it
is reset.
3.Auxiliary carry(AC)-If any carry goes from D3 to D4 in the output then it is set otherwise
it is reset.
4.Parity(P)-If the no of 1's is even in the output stored in the accumulator then it is set
otherwise it is reset for the odd.
5.Carry(C)-If the result stored in an accumulator generates a carry in its final output then it

is set otherwise it is reset.

Instruction registers(IR):-It is a 8-bit register. When an instruction is fetched from memory
then it is stored in this register.
Instruction Decoder:- Instruction decoder identifies the instructions. It takes the
informations from instruction register and decodes the instruction to be performed.
Program Counter:-It is a 16 bit register used as memory pointer. It stores the memory
address of the next instruction to be executed. So we can say that this register is used to
sequencing the program. Generally the memory have 16 bit addresses so that it has 16 bit
memory.
The program counter is set to 0000H.
Stack Pointer:-It is also a 16 bit register used as memory pointer. It points to the memory
location called stack. Generally stack is a reserved portion of memory where information can
be stores or taken back together.
Timing and Control Unit:-It provides timing and control signal to the microprocessor to
perform the various operation.It has three control signal. It controls all external and internal
circuits. It operates with reference to clock signal.It synchronizes all the data transfers.
There are three control signal:
1.ALE-Airthmetic Latch Enable, It provides control signal to synchronizethe components of
microprocessor.
2.RD- This is active low used for reading operation.
3.WR-This is active low used for writing operation.
There are three status signal used in microprocessor S0, S1 and IO/M. It changes its status
according the provided input to these pins.

Serial Input Output Control-There are two pins in this unit. This unit is used for serial data

communication.
Interrupt Unit-There are 6 interrupt pins in this unit. Generally an external hardware is
connected to these pins. These pins provide interrupt signal sent by external hardware to
microprocessor and microprocessor sends acknowledgement for receiving the interrupt
signal. Generally INTA is used for acknowledgement.
--------------------------------------------------------------------------------------------------------ADDRESSING MODES:
The various ways of specifying data (or operands) for instructions are called as addressing
modes.
The 8085 addressing modes are classified into following types:
1. Immediate addressing mode
2. Direct addressing mode
3. Register addressing mode
4. Register indirect addressing mode
5. Implicit addressing mode
Immediate Addressing mode
In this mode operand is a part of the instruction itself is known as Immediate Addressing
mode. If the immediate data is 8-bit, the instruction will be of two bytes. If the immediate
data is 16 bit, the instruction is of 3 bytes.
Ex: (1). ADI DATA : Add immediate the data to the contents of the accumulator.
(2).LXIH 8500H ; Load immediate the H-L pair with the operand 8500H
(3). MVI 08H

: Move the data 08 H immediately to the accumulator

(4). SUI 05H

:Subtract immediately the data 05H from the accumulator

Direct Addressing mode

The mode of addressing in which the 16-bit address of the operand is directly available in the
instruction itself is called Direct Addressing mode. i.e., the address of the operand is available
in the instruction itself. This is a 3-byte instruction.
Ex: (1). LDA 9525H: Load the contents of memory location into Accumulator.
(2). STA 8000H: Store the contents of the Accumulator in the location 8000H
(3). IN 01H: Read the data from port whose address is 01H.

Register addressing modes

In this mode the operands are microprocessor registers only. i.e. the operation is performed
within various registers of the microprocessor.
Ex: (1). MOV A, B: Move the contents of B register to A register.
(2). SUB D:

Subtract the contents of D register from Accumulator.

(3). ADD B, C: Add the contents of C register to the contents of B register.

Register indirect addressing modes
The 16-bit address location of the operand stored in a register pair (H-L) is given in the
instruction. The address of the operand is given in an indirect way with the help of a register
pair. So it is called Register indirect addressing mode.
Ex: (1). LXIH 9570H : Load immediate the H-L pair with the address of the location 9570H
MOV A, M

: Move the contents of the memory location pointed by the H-L pair to

accumulator
Implicit Addressing mode
The mode of instruction which do not specify the operand in the instruction but it is
implicated, is known as implicit addressing mode. i.e., the operand is supposed to be present
generally in accumulator.
Ex: (1).CMA: complement the contents of Accumulator
(2).CMC: Complement carry
(3). RLC: Rotate Accumulator left by one bit
(4). RRC: Rotate Accumulator right by one bit
(5). STC: Set carry.
------------------------------------------------------------------------------------------------------------INSTRUCTIONS
An instruction is a binary pattern designed inside a microprocessor to perform a specific
function. Each instruction is represented by 8 bit binary value.
Types of instruction set:

1)

Data transfer instructions:

Instructions, which are used to transfer data from one register to another register, from
memory to register or register to memory, come under this group. Examples are: MOV, MVI,
LXI, LDA, STA etc. When an instruction of data transfer group is executed, data is
transferred from the source to the destination without altering the contents of the source. For
example, when MOV A, B is executed the content of the register B is copied into the register
A, and the content of register B remains unaltered. Similarly, when LDA 2500 is executed the
content of the memory location 2500 is loaded into the accumulator. But the content of the
memory location 2500 remains unaltered.
EXAMPLES:
1. MOV r1, r2 (Move Data; Move the content of the one register to another). [r1] <-- [r2]
2. MOV r, m (Move the content of memory register). r <-- [M]
2) Arithmatic instructions:
The instructions of this group perform arithmetic operations such as addition, subtraction;
increment or decrement of the content of a register or memory.
Examples:
1). ADD r. (Add register to accumulator) [A] <-- [A] + [r].
2) .ADD M. (Add memory to accumulator) [A] <-- [A] + [[H-L]].
3).ADC r. (Add register with carry to accumulator). [A] <-- [A] + [r] + [CS].
4). ADC M. (Add memory with carry to accumulator) [A] <-- [A] + [[H-L]] [CS].
5) .ADI data (Add immediate data to accumulator) [A] <-- [A] + data.
6) .ACI data (Add with carry immediate data to accumulator). [A] <-- [A] + data + [CS].
7).DAD rp. (Add register paid to H-L pair). [H-L] <-- [H-L] + [rp].
3) Logical instructions:
The Instructions under this group perform logical operation such as AND, OR, compare,
rotate etc.
Examples:
1). ANA r. (AND register with accumulator) [A] <-- [A] ^ [r].
2).ANA M. (AND memory with accumulator). [A] <-- [A] ^ [[H-L]].
3).ANI data. (AND immediate data with accumulator) [A] <-- [A] ^ data.
4).ORA r. (OR register with accumulator) [A] <-- [A] v [r].
4) Branching Instructions:

This group includes the instructions for conditional and unconditional jump, subroutine call
and return, and restart.
Examples:
1. MP addr (label). (Unconditional jump: jump to the instruction specified by the
address). [PC] <-- Label.
2. Conditional Jump addr (label): After the execution of the conditional jump instruction
the program jumps to the instruction specified by the address (label) if the specified
condition is fulfilled. The program proceeds further in the normal sequence if the
specified condition is not fulfilled. If the condition is true and program jumps to the
specified label, the execution of a conditional jump takes 3 machine cycles: 10 states.
If condition is not true, only 2 machine cycles; 7 states are required for the execution
of the instruction.
1. JZ addr (label). (Jump if the result is zero)
2. JNZ addr (label) (Jump if the result is not zero)
3. JC addr (label). (Jump if there is a carry)
4. JNC addr (label). (Jump if there is no carry)
5. JP addr (label). (Jump if the result is plus)
6. JM addr (label). (Jump if the result is minus)
7. JPE addr (label) (Jump if even parity)
5). Stack,I/O and Machine control instructions:
1. N port-address. (Input to accumulator from I/O port) [A] <-- [Port]
2. OUT port-address (Output from accumulator to I/O port) [Port] <-- [A]
3. PUSH rp (Push the content of register pair to stack)
4. PUSH PSW (PUSH Processor Status Word)
5. POP rp (Pop the content of register pair, which was saved, from the stack)
6. POP PSW (Pop Processor Status Word)
7. HLT (Halt)
SIMPLE PROGRAMS

ADDITION OF TWO 8 BIT NUMBERS:

PROGRAM:
MVI C, 00

'Initialize C register to 00

LDA 4150

'Load the value to Accumulator.

MOV B, A

'Move the content of Accumulator to B register.

LDA 4151

'Load the value to Accumulator.

ADD B

'Add the value of register B to A

JNC LOOP

'Jump on no carry.

INR C

'Increment value of register C

LOOP: STA 4152

'Store the value of Accumulator (SUM).

MOV A, C

'Move content of register C to Acc.

STA 4153

'Store the value of Accumulator (CARRY)

HLT

'Halt the program.

SUBTRACTION OF TWO 8 BIT NUMBERS

MVI C, 00I Initialize C to 00
LDA 4150

Load the value to Acc.

MOV B, A Move the content of Acc to B register.

LDA 4151

Load the value to Acc.

SUB B
JNC LOOP Jump on no carry.
CMA

Complement Accumulator contents.

INR A

Increment value in Accumulator.

INR C

Increment value in register C

LOOP: STA 4152 Store the value of A-reg to memory address.

MOV A, C

Move contents of register C to Accumulator.

STA 4153

Store the value of Accumulator memory address.

HLT

Terminate the program.

TIMING DIAGRAM:
The P operates with reference to clock signal.The rise and fall of the pulse of the clock gives
one clock cycle.
Each clock cycle is called a T state and a collection of several T states gives a machine cycle.

Important machine cycles are :

Op-code fetch.
Memory read.
Memory write.
I/Op-read.
I/O write.
Op-code Fetch:It basically requires 4 T states from T1-T4

The ALE pin goes high at first T state always.

AD0-AD7 are used to fetch OP-code and store the lower byte of Program Counter.

A8-A15 store the higher byte of the Program Counter while IO/M will be low since
it is memory related operation.

RD will only be low at the Op-code fetching time.

WR will be at HIGH level since no write operation is done.

S0=1,S1=1 for Op-code fetch cycle.

Memory write Cycle: It basically requires 3T states from T1-T3 .

The ALE pin goes high at first T state always.

AD0-AD7 are used to fetch data from CPU and store the lower byte of address.

A8-A15 store the higher byte of the address while IO/M will be low since it is
memory related operation.

RD will be HIGH since no read operation is done.

WR will be at LOW level only when data fetching is done.

S0=1,S1=0 for Memory write cycle

-------------------------------------------------------------------------------------------------------------------------------------PLD (Programmable Logic Device)

The basic PLD architecture involves combining arbitrary numbers of input lines (or their
inverse) with a logical AND to form product terms. A number of independent product terms
(usually up to 8) are then added together (logical OR) to produce a single output line. This is
shown graphically in the figure below.

The logic algorithm is defined by choosing which input lines are connected to which product
terms in the programmable array. While this architecture may seem rather limiting, in a 16V8
there are 8 independent product terms for each output line, and each product term can include
all 16 available input lines. These chips can typically handle all but the most extremely
complex algorithms, provided there are enough input and output lines available.
A PLC is a Programmable Logic Controller is a complete product (made by several
manufacturers) intended to accept inputs from switches (and sometimes analog sources) and
control various devices. These systems are used as part of industrial control systems, and

normally deal with 24 volt input and output signal levels. They are usually programmed using
ladder logic