MALLA REDDY ENGINEERING COLLEGE (AUTONOMOUS)

II B.Tech I Semester(MR 22) I Mid Question Bank 2024-25 (Subjective)

Subject: Computer Organization and Architecture (C0509) Branch: CSE-AIML

Name of the Faculty: T. KISHORE, CH.V.S SURYANARAYAN
S BT
Questions Marks CO
NO. Level

Module-1
1 Sketch a neat diagram and explain in detail the functional units of a computer. 5 2 1

2 Describe Bus and Memory Transfers 5 2 1

3 Explain the one stage of arithmetic logic shift unit with a neat sketch. 5 3 1

4 Classify different logic micro operations with the functional table. 5 2 1

5 Demonstrate different shift micro operations in detail. 5 2 1

6 Write about Computer Design and Computer Architecture 5 3 1

7 Explain the different memory reference instructions 5 2 1

8 Explain Input – Output and Interrupt 5 2 1

S BT
Questions Marks CO
NO. Level
Module-2
1 Explain briefly about control memory 5 3 2

2 Describe Micro Program with an example 5 2 2

3 Explain about address sequencing capabilities in control memory. 5 2 2
4 Distinguish between data transfer and data manipulation instructions. 5 2 2
5 Use different instruction format and evaluate the expression Y=(A-B)/(C+D*E) 5 2 2
Explain about Addressing Modes with an Numerical Example? 2
6 5 2

7 Illustrate about General Register Organization 5 2 2

8 Define an instruction? Explain the instruction cycle. 5 2 2

S BT
Questions Marks CO
NO. Level
 Module-3
Explain the fixed point representation and floating point representation? 5 2 3
1
Design the flow chart for Booths Multiplication algorithm with an example? 5 2 3
2

3 Write about Computer Arithmetic Addition with neat flow chart. 5 2 3

4 Illustrate Decimal Arithmetic Unit and Operations 5 2 3

Prepared By Name: T. Kishore, Ch.V.S Suryanarayan

Signature: HOD Signature
 MALLA REDDY ENGINEERING COLLEGE (AUTONOMOUS)
II B.Tech I Semester(MR 22) II Mid Question Bank 2024-25 (Subjective)

Subject: Computer Organization and Architecture (C0509) Branch: CSE-AIML

Name of the Faculty: T. KISHORE, CH.V.S SURYANARAYAN

S BT
Questions Marks CO
NO. Level
Module-3
Evaluate multiplication of two numbers using Multiplication algorithm with a 5 2 3
1 numerical example.

Write an algorithm to add the magnitudes and attach the sign of A to the result, when 5 2 3
2 the signs of A and B are different.

Use the flow chart for division algorithm and solve AQ=0111000000 divided by 5 2 3
3
B=10001
Using flowchart discuss the hardware algorithm for subtraction. 5 2 3
4

S BT
Questions Marks
Level
CO
NO.
Module-4
1 Analyze the 3 different mapping processes used in cache memory organization. 5 2 4
Explain Daisy Chaining and Parallel Priority Interrupt with the help of a neat sketch 2 4
2 5
Interpret the Memory Connection to CPU by using Memory Address Mapping of RAM 3 4
3 5
Chip and ROM Chip
Explain a) Auxiliary
4 Memory 5 2 4
b) Associate Memory
5 Sketch the block diagram of DMA using DMA Controller 5 2 4

6 Explain the different types of modes of transfer in detail 5 3 4

7 Describe the asynchronous data transfer 5 2 4

S NO. Questions Marks BT CO
8 Explain memory hierarchy in memory organization 5 2
Level 4
Module-5

1 Write a brief note on interprocessor arbitration 5 2 5

2 Difference between RISC and CISC 5 2 5

3 Write about Interprocessor communication and Synchronization 5 2 5
4 List out the important stages of Instruction Pipeline 5 2 5
5 Illustrate about Flynn’s Classification of parallel processing. 5 2 5
6 What is parallel processing? Explain any parallel processing mechanism 5 2 5
7 Explain the interconnection structure for multiprocessor systems 5 2 5
What is multiprocessor system? Explain the advantages of multi processors over 2
8 5 5
uniprocessors.
Prepared By Name: T. Kishore, Ch.V.S Suryanarayan
Signature: HOD Signature