BM-407 Linear Integrated circuits Applications Lab Practice

LAB MANUAL
(C-23 Regulations)

II /IV Semester Diploma (BM-407)

Department of Diploma Bio-Medical Engineering

SGPR Government Polytechnic
Kurnool-518 007

i
 INSTRUCTIONS TO BE FOLLOWED IN MAINTAINING
THE RECORD BOOK

The Record should be written nearly with ink on the right-hand page only. The left-hand page
being reserved for diagrams.

The Record should contain:

1. The date
2. The number and name of the experiment
3. The aim of the experiment
4. Characteristic tables of the circuit
5. On the left hand side, circuit should be designed
6. Index must be filled in regularly
7. You must get your record certified by the concerned staff on the every next class after completing
the experiment
8. You must get your record certified by the concerned staff at the end of every semester

INSTRUCTIONS TO BE FOLLOWED IN THE LABORATORY

1. You must bring record observations notebook, while coming to the practical class without you
may not be allowed to the practical.
2. Don’t touch the equipment which is not connected with our experiment.
3. When the apparatus is issued, you are advised to check their condition.
4. You should not leave the laboratory without obtaining the signature of the concerned lecturer
after completing the practical.

Note:

1. Damaged caused to the property of the laboratory will be recovered.

2. If 75% of the experiments prescribed are not completed the candidate will not be allowed for
attending examinations.

ii
 BM-407 Linear Integrated circuits Applications Lab Practice

Course Category: Program Core lab

Course Type: Lab Lecture - Tutorial - Practice: 0 - 0- 3
Prerequisites: - Continuous Evaluation: 40
Semester end Evaluation: 60
Total Marks: 100
Course Upon successful completion of the course, the student will be able to:
outcomes
CO1 To construct wave shaping circuits
CO2 To Construct different oscillator circuits and observer the wave forms
CO3 To construct various circuits using 741Op-amp
CO4 To Construct A/D and D/A circuits
CO5 Simulate various Electronics circuits using P-spice or equivalent.

Contribution PO 1 PO 2 PO 3 PO 4 PO 5 PO 6 PO 7 PSO1 PSO2 PSO3

of Course
Outcomes 3 3 3
CO1 3 2
towards
achievement
CO2 3 2 2
of Program
Outcomes (1 CO3 3 2 2 3 2 3 3 2 2
– Low, 2 -
Medium, 3 – CO4 1 2 1 3
High)
CO5 2 2 1 1 2

Average 2.4 1.6 1.2 2 1.2 1 2.6 2 1

Course List of Experiments

Content Analog ICs Experiments using discrete components
1. Analysis of Clamper Circuits
2. Analysis of Clipper Circuits
3. Design and Implementation of RC Phase Shift Oscillator Using Transistor
4. Design and Implementation of Hartley Oscillator
5. Open-Loop Comparator Using Op-Amp: Analysis for A = B, A < B, and A > B
6. Design and Simulation of Inverting and Non-Inverting Amplifiers Using Op-Amp
7. Design and Verification of Adder and Subtractor Circuits Using Op-Amp
8. Implementation of Integrator and Differentiator Circuits Using IC 741 with Practical Condition
Derivation
9. Design of Active Low-Pass and High-Pass Filters (2 kHz Cutoff) and Roll-Off Analysis
10. Construction and Analysis of Monostable Multivibrator Using IC 555
11. Design and Testing of Astable Multivibrator Using IC 555 With Duty Cycle Calculation
12. Design of Schmitt Trigger Circuit Using Op-Amp and Determination of UTP and LTP
13. Square and Triangular Waveform Generation Using Op-Amp
14. Implementation of Wien Bridge Oscillator Using Operational Amplifier IC 741
15. Design and Testing of 8-bit Digital-to-Analog Converter (DAC) Using Op-Amp
16. Design and Testing of 8-bit Analog-to-Digital Converter (ADC) Using Op-Amp
Note: Any 10 of the experiments in the above list need to be completed by the student to be eligible
to write University Practical Examinations.

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iv
v
 LABCODE
1. Students should report to the concerned labs as per the timetable schedule.
2. Students who turn up late to the labs will in no case be permitted to perform the experiment
schedule for the day.
3. After completion of the experiment certification of the concerned staff in charge in the observation
book is necessary.
4. Students should bring a notebook of about 100 pages and should enter the readings/observations
into the notebook while performing the experiment.
5. The record of observations along with the detailed experimental procedure of the experiment
performed in the immediate last session should be submitted and certified by the staff in- charge.
6. Not more than three students in a group are permitted to perform the experiment on a setup.
7. The group – wise division made in the beginning should be adhered to, and no mix up of student
among different groups will be permitted later.
8. When the experiment is completed, student should shut down the computer.
9. Any damage of the equipment or burnout will be viewed seriously either by putting penalty or by
dismissing the total group of students from the lab for the semester/year.
10. Student should present in the labs for the total scheduled duration.
11. Students are required to prepare thoroughly to perform the experiment before coming to laboratory.
12. Procedure sheets/data sheets provided to the student’s groups should be maintained neatly and to
be returned after the experiment.

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 List of Experiments
(To perform any ten experiments)

Page
S. No. Name of the Experiment
No.

1 Analysis of Clamper Circuits 8

2 Analysis of Clipper Circuits 11

3 Design and Implementation of RC Phase Shift Oscillator Using Transistor 14

4 Design and Implementation of Hartley Oscillator 17

Open-Loop Comparator Using Op-Amp: Analysis for A = B, A < B, and A

5 19
>B
Design and Simulation of Inverting and Non-Inverting Amplifiers Using
6 24
Op-Amp

7 Design and Verification of Adder and Subtractor Circuits Using Op-Amp 29

Implementation of Integrator and Differentiator Circuits Using IC 741 with

8 34
Practical Condition Derivation
Design of Active Low-Pass and High-Pass Filters (2 kHz Cutoff) and Roll-
9 42
Off Analysis

10 Construction and Analysis of Monostable Multivibrator Using IC 555 48

Design and Testing of Astable Multivibrator Using IC 555 With Duty

11 52
Cycle Calculation
Design of Schmitt Trigger Circuit Using Op-Amp and Determination of
12 59
UTP and LTP

13 Square and Triangular Waveform Generation Using Op-Amp 63

Implementation of Wien Bridge Oscillator Using Operational Amplifier IC

14 65
741
Design and Testing of 8-bit Digital-to-Analog Converter (DAC) Using Op-
15 68
Amp
Design and Testing of 8-bit Analog-to-Digital Converter (ADC) Using Op-
16 71
Amp

1
 Study of OP AMPs - IC 741 and IC 555
OP-Amp IC 741: General Description:

The IC 741 is a high performance monolithic operational amplifier constructed using

the planer epitaxial process. High common mode voltage range and absence of latch-up
tendencies make the IC 741 ideal for use as voltage follower. The high gain and wide range of
operating voltage provide superior performance in integrator, summing amplifier and general
feedback applications.
Block Diagram of Op-Amp:

Figure 1. Block Diagram of Op-Amp

Input stage
➢ It is a dual input balanced output differential amplifier.
➢ Provides high voltage gain and high input resistance.
Intermediate stage
➢ It is a dual input unbalanced output differential amplifier.
➢ Provides additional voltage gain (required voltage gain)
Level shifting stage: It shifts the dc level of the output of the intermediate stage down to zero
volts with reference to ground.
Output stage
➢ It is a class B complementary symmetry power amplifier.
➢ It is used to increase the output voltage swing and the current swing.
➢ It also provides low output resistance.
Symbol and Pin Configuration of OPAMP

2
 Figure 2. Symbol of IC 741 OP-Amp

Figure 3. Pin diagram of IC 741 OP-Amp

Specifications of an Op-amp:

S. No Parameter of Op-Amp Ideal Practical (IC741C)

1 Open loop voltage gain (Ao) ∞ 2 x 105
2 Input resistance (Ri) ∞ 2 MΩ
3 Output resistance (Ro) 0 75 Ω
4 Input offset current (𝐼𝑜𝑠 ) 0 10 nA – 200nA
5 Input offset voltage (𝑉𝑖𝑜𝑠 ) 0 2 mV
6 Input bias current (𝐼𝐵 ) 0 80nA-500 nA
7 Bandwidth (BW) ∞ 1 MHz
8 CMRR (𝞀) ∞ 90 dB
9 Slew rate (S) ∞ 0.5 v/µsec
10 Power supply rejection Ratio (PSRR) 0 30 µv/V

Electrical Characteristics of LM741C

1. Input voltage range= - 15V to +15V
2. Supply voltage: ±10 V(min), ±15V(normal), ±18V(max)
3
 In lab +Vcc (pin7) is connected to +15V and -VEE (pin4) is connected to -15V.
3. supply current: 1.7 to 2.8mA
4. Supply voltage rejection ratio =150 μV/V
5. Output voltage swing: + 15V and – 15V
6. Power dissipation:50mW to 85mW
7. Operating temperature: 0 to 70 ˚C

Applications:
Open loop configuration (Without feedback) Applications
1. Comparator
2. Zero crossing detector
Closed loop configuration (With feedback) Applications
1. Adder
2. Subtractor
3. Differentiator
4. Integrator
5. Filters
6. Instrumentation amplifier
7. Schmitt Trigger
8. oscillator
9. Wave form generators
10. A to D and D to A converters.

IC 555 Timer:
Block Diagram of IC 555:

4
 Figure 4. Block Diagram of IC 555
• 555 Timer IC consists of
1. two comparators: an Upper Comparator (UC) and a Lower Comparator (LC)
2. SR flipflop,
3. two transistors (𝑇1 , 𝑇2 ), 𝑇1 is npn and 𝑇2 is pnp transistor
4. Resistor divider network(5K,5K,5K).
1
• When the trigger input < 3 𝑉𝐶𝐶 ,then lower comparator output is +𝑉𝑠𝑎𝑡 (i.e 1), S=1,
flipflop is set (Q=1,𝑄 ′ = 0),Transistor 𝑇1 is OFF, output of timer is HIGH
2
• When the threshold input > 3 𝑉𝐶𝐶 ,then upper comparator output is +𝑉𝑠𝑎𝑡 (i.e 1), R=1,
flipflop is reset (Q=0,𝑄 ′ = 1),Transistor 𝑇1 is ON, output of timer is LOW
1 2
• When the trigger input > 3 𝑉𝐶𝐶 and the threshold input < 3 𝑉𝐶𝐶 , then lower comparator
and upper comparator output is -𝑉𝑠𝑎𝑡 (i.e 0), S=0 & R=0, flipflop output is same as
previous state and no change in the timer output

Pin Configuration of IC 555:

5
 Figure 5. Pin diagram of IC 555
Function of Various Pins of 555 IC:
Pin (1) of 555 is the ground terminal; all the voltages are measured with respect to this pin.
Pin (2) of 555 is the trigger terminal, If the voltage at this terminal is held greater than one-third
of VCC, the output remains low. A negative going pulse from Vcc to less than Vcc/3 triggers the
output to go high. The amplitude of the pulse should be able to make the comparator (inside
the IC) change its state. However, the width of the negative going pulse must not be greater
than the width of the expected output pulse.
Pin (3) is the output terminal of IC 555. There are 2 possible output states. In the low output
state, the output resistance appearing at pin (3) is very low (approximately 10 Ω). As a result,
the output current will go to zero, if the load is connected from Pin (3) to ground, sink a current
I Sink (depending upon load) if the load is connected from Pin (3) to ground, and sinks zero
current if the load is connected between +VCC and Pin (3).
Pin (4) is the Reset terminal. When unused it is connected to +Vcc. Whenever the potential of
Pin (4) is drives below 0.4V, the output is immediately forced to low state. The reset terminal
enables the timer over-ride command signals at Pin (2) of the IC.
Pin (5) is the Control Voltage terminal. it controls the width of the output pulse
Pin (6) is the threshold terminal. In both Astable as well as mono-stable modes, a capacitor is
connected from Pin (6) to ground. Pin (6) monitors the voltage across the capacitor when it
charges from the supply and forces the already high output to Low when the capacitor reaches
+2/3 VCC.
Pin (7) is the discharge terminal. It presents an almost open circuit when the output is high and
allows the capacitor charge from the supply through an external resistor and presents an almost
short circuit when the output is low.
Pin (8) is the +Vcc terminal. 555 can operate at any supply voltage from +3 to +18V.
Applications
6
The 555 Timer IC can be used in a variety of circuits like Time Delays, Oscillation, Pulse
Generation, Pulse Width Modulation etc
The SE 555 is designed for the operating temperature range from – 55°C to 125° while the NE
555 operates over a temperature range of 0° to70°C.
NOTE
Precautions:
1. Check the connections before switching ON the power supply.

7
 Cycle:
Date: CLAMPER CIRCUITS
Experiment No:

Aim:
To design and construct the clipper circuits using diodes.
Apparatus:
1. Resistor
2. RPS
3. Diode
4. CRO
5. Function Generator
6. Bread Board
7. Connecting Wires

THEORY:
A Clipper is a circuit that removes either the positive or negative part of a waveform.
For a positive clipper only the negative half cycle will appear as output.
WORKING:
During the positive half cycle, the diode turns on and looks like a short circuit across the
output terminals. Ideally, the output voltage is zero. But practically, the diode voltage is 0.7 V
while conducting. On the negative half cycle, the diode is open and hence the negative half
cycle appear across the output.

SERIES POSITIVE CLIPPER:

CIRCUIT DIAGRAM:

MODEL GRAPHS:
Input Waveform:

8
Output waveform:

SERIES NEGATIVE CLIPPER:

CIRCUIT DIAGRAM:

MODEL GRAPHS:
Input Waveform:

Output Waveform:

9
PROCEDURE:
1. Connect as per the circuit diagram.
2. Set the signal voltage (say 5V, 1 KHz) using signal generator.
3. Observe the output waveform using CRO.
4. Sketch the output waveform.

RESULT:
Thus the output waveforms for Clippers was observed

VIVA QUESTIONS:
1. What are the other names of clipper circuits?
2. What is combinational clipper?
3. Why clippers are used in TV receivers.

10
 Cycle:
Date: CLIPPER CIRCUITS
Experiment No:

Aim:
To design and construct the clamper circuits using diodes.
Apparatus:
1. Resistor
2. Capacitor
3. Diode
4. CRO
5. Function Generator
6. Bread Board
7. Connecting Wires

THEORY:

A Clamper circuit is a circuit that adds a dc voltage to the signal. A positive clamper shifts the
ac reference level up to a dc level.
DESIGN:

Given f=1 kHz,

T=t=1/f=1x10-3 sec=RC
Assume, C=1uF
Then, R=1K

CIRCUIT DIAGRAM:
Positive clamper

11
MODEL GRAPHS:
Input Waveform:

Output Waveform:

Negative clamper:

MODEL GRAPHS:
Input Waveform:

12
Output Waveform:

PROCEDURE:
1. Connect as per the circuit diagram.
2. Set the signal voltage (say 5V, 1 KHz) using signal generator.
3. Observe the output waveform using CRO.
4. Sketch the output waveform.

RESULT:
Thus the output waveform of Clampers was observed.

VIVA QUESTIONS:
1. Give one application of clamper.
2. What are the differences between clippers and clampers?
3. What are biased clampers?

13
 Cycle:
Date: STUDY OF RC PHASE SHIFT OSCILLATOR
Experiment No: USING TRANSISTOR

Aim:
To design and study the working of a RC Phase Shift Oscillator using a
transistor
APPARATUS:
S. No. Component Specification Quantity
1 Regulated Power Supply 0–30 V DC 1
2 Function Generator Sine wave output 1
Cathode Ray Oscilloscope
3 Dual channel 1
(CRO)
4 Transistors BC107 2
5 Resistors 47 kΩ, 2.2 kΩ, 1 kΩ 1 each
6 Resistors 10 kΩ 3
7 Capacitors 10 µF, 100 µF 1 each
8 Capacitors 1 nF or 10 nF 3
Breadboard, Connecting
9 - As needed
Wires

CIRCUIT DIAGRAM:
VCC
12V

R5
R4 2.2kΩ XSC1
47kΩ C2

Ext Trig

10µF
Q1
C5 C4 C1 _

1nF 1nF 1nF

BC107BP

R3 R6
10kΩ R2 10kΩ
10kΩ R7 C3100µ
1kΩ F

14
 Theory:
An RC Phase Shift Oscillator produces a sinusoidal output without any
external input signal. It uses a single transistor in common emitter
configuration and an RC feedback network that provides a phase shift of
180°.

The transistor itself provides an additional 180°, making the total phase
shift 360° (or 0°), which satisfies the Barkhausen criterion for sustained
oscillations.
1
Frequency of Oscillation: 𝑓=2𝜋𝑅𝐶√6
Where:
𝑅 is the resistance in the phase shift network
C is the capacitance in the phase shift network

Procedure:
1. Assemble the circuit on the breadboard using the given values of
resistors and capacitors.

2. Connect the regulated power supply (typically 12V DC) to the

circuit.

3. Switch on the power and observe the output at the collector

terminal using a CRO.

4. Adjust component values if necessary to obtain sustained

oscillations.

5. Measure the frequency and peak-to-peak voltage of the output

waveform.
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 MODEL GRAPH:

Tabular Form:
Theoretical T = Experimental
R C Frequency l t
S.No. l × t Frequency
(Ω) (µF) 1 (div) (sec/div) 1
𝑓=2𝜋𝑅𝐶√6 (Hz) (sec) 𝑓= (Hz)
𝑇

Result:

16
 Cycle:
Date: STUDY OF HARTLEY OSCILLATOR
Experiment No:

AIM:

To design and set up a Hartley oscillator using BJT

and to observe the sinusoidal output waveform.

APPARATUS REQUIRED:

S.NO APPARATUS SPECIFICATION QUANTITY

1. Transistor BC 107 1
2. Resistors 2.74 KΩ, 1,2,1
1.76KΩ,10.58KΩ
3. Capacitors 0.1µF, 0.1µF Each 2
4. Inductor 0.1mH,0.33mH Each 1
5. RPS ±12V 1
6. CRO 1MHz 1
7. Connecting wires - Req.
CIRCUIT DIAGRAM:

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 THEORY:
The Hartley oscillator is an electronic oscillator circuit in which the oscillation
frequency is determined by a tuned circuit consisting of capacitors and inductors, that
is, an LC oscillator. The Hartley oscillator is distinguished by a tank circuit consisting
of two series-connected coils (or, often, a tapped coil) in parallel with a capacitor, with
an amplifier between the relatively high impedance across the entire LC tank and the
relatively low voltage/high current point between the coils. The Hartley oscillator is
the dual of the Colpitts oscillator which uses a voltage divider made of two capacitors
rather than two inductors. Although there is no requirement for there to be mutual
coupling between the two coil segments, the circuit is usually implemented using a
tapped coil, with the feedback taken from the tap, as shown here. The optimal tapping
point (or ratio of coil inductances) depends on the amplifying device used, which may
be a bipolar junction transistor.

PROCEDURE:
• Hook up the circuit as shown in the circuit diagram.
• Switch on the power supply.
• Slight modification in value of L1 and L2 can be made to get perfect sinewave
output.
• Observe the output waveform in CRO.

MODEL GRAPH:

TABULATION:

Amplitude(Volts) Time(ms) Frequency (KHz)

RESULT:
Thus the Hartley oscillator was designed and its output waveform was verified.

18
 Cycle:
Date:
Open Loop Comparator using Op Amp and draw the
Experiment No: comparison results of A=B, A<B, A>B.

Aim: To design Inverting and Non-inverting comparator using IC 741 and verify its
functionality.
Apparatus required:

S. No Equipment/Component name Specifications/Value Quantity

1 IC 741 - 1
2 Digital multi output DC Regulated power (0 – 30V) 2
supply
3 Function Generator (1 – 1MHz) 1
4 Cathode Ray Oscilloscope (0 – 20MHz) 1
5 Bread Board 1

Theory:
Comparator: A comparator compares a signal voltage on one input of an op-amp with a known
reference voltage on the other input.
Circuit Diagram:
Non- inverting comparator:

Figure 3.1. Non-inverting comparator

1. If Vin>Vref, then Vo = +Vsat

2. If Vin<Vref, then Vo = -Vsat

Example
Case1: Vin=5v and Vref=1v ,Vcc=15v,- 𝑉𝐸𝐸 =-15v,then Vo=+Vsat=+Vcc=+15v

19
 Case2: Vin=-5v and Vref=1v ,Vcc=15v,- 𝑉𝐸𝐸 =-15v,then Vo=-Vsat=-Vcc=-15v

Figure 3.2. Input and Out wave forms for non-inverting comparator

Inverting comparator:

Figure 3.3. Inverting comparator

1. If Vin>Vref, then Vo = -Vsat
2. If Vin<Vref, then Vo = +Vsat
Example
Case1: Vin=5v and Vref=1v ,Vcc=15v,-𝑉𝐸𝐸 =-15v,then Vo=-Vsat=-Vcc=-15v
Case2: Vin=-5v and Vref=1v ,Vcc=15v,- 𝑉𝐸𝐸 =-15v,then Vo=+Vsat=+Vcc=+15v

20
 Figure 3.4. Input and output waveforms
➢ Zero crossing detector: A Zero Crossing Detector (ZCD) is a type of voltage
comparator, with the reference voltage set to zero volts.
➢ It is used for detecting the zero crossings of an ac signal.
Circuit Diagram:

Figure 3.5. Inverting Zero crossing detector

1. If Vin>0V, Vo = -Vsat
2. If Vin<0V, Vo = +Vsat

21
 Figure 3.6. Input and output waveforms.
Procedure:
1. Insert IC741 on the bread board.
2. Connect pin7 of IC741 to +15V DC voltage source in Digital multi output DC Regulated
power supply.
3. Connect pin4 of IC741 to -15V DC source in Digital multi output DC Regulated power
supply.
4. For non-inverting comparator a fixed reference voltage Vref (DC voltage) is applied to the
(-) input (inverting input terminal), and a sinusoidal input Vin is applied to the (+) input
(Noninverting input terminal).
or
For Inverting comparator, a fixed reference voltage Vref (DC voltage) is applied to the (+)
input (Noninverting input terminal), and a sinusoidal input Vin is applied to the (-) input
(Inverting input terminal).
or
For Inverting zero crossing detector, Noninverting input terminal of Op-Amp is connected
to ground and a sinusoidal input Vin is applied to the (-) input (Inverting input terminal).
5. Connect input to +ve terminal (RED pin) of a probe connected to channel 1 of CRO and -
ve terminal (Black pin) of a probe to common ground in the bread board.
6. Connect pin6 of IC741 to +ve terminal (RED pin) of a probe connected to channel 2 of
CRO and -ve terminal (Black pin) of a probe to common ground in the bread board.
7. Observe the sine wave input and square wave output on CRO.
8. Measure the Amplitude and time period of the square wave.
22
Result:

VIVA Questions:
1. What are the Applications of comparator?
2. What are the limitations of comparator using OP-Amp?
3. Draw the comparators circuit that uses -ve reference voltage and also draw the input and
output wave forms.
4. What are the applications of Zero crossing detector?
5. If the input to the ideal comparator shown in the figure is a sinusoidal signal of 8 volts
peak to peak 1kHz without any DC component, then draw the corresponding output wave
form and find the duty cycle of the output signal.

6. For the inverting comparator, vin=1Vpp sine wave at 500Hz and supply voltages=±15V.
Draw the output waveform if
Vref =0.2V b) Vref =-0.2V c) Vref =0V

23
 Cycle:
Date:
Design an Inverting and Non-inverting Amplifier
Experiment No: using Op Amp and calculate gain

Aim: To design Inverting and Non-inverting Amplifier using IC 741 and calculate gain.

Apparatus required:

S. No Equipment/Component name Specifications/Value Quantity

1. 1 IC 741 - 1
2. 2 Resistor 1KΩ,2 KΩ,10KΩ 3
3. 3 Digital multi output DC Regulated power supply (0 – 30V),1A 1
4. Function generator (1Hz – 1MHz) 1
5. 4 CRO 0-20MHz 1
6. 5 Digital Voltmeter 0-20V 1
7. 6 Bread Board - 1
Theory:
Amplifier: An amplifier is an electronic device that increases the voltage, current, or power of
a signal.
Voltage amplifier: A voltage amplifier is an electronic device that increases the voltage of a
signal.
Inverting amplifier: In the inverting amplifier circuit, the signal is applied at the inverting input
and the non-inverting input is connected to the ground. In this type of amplifier, the output is
180⁰ out of phase to the input, i.e. when positive signal is applied to circuit, the output of the
circuit will be negative. If Vin is the input voltage, then the output voltage Vout is given by
R
Vout = − R f V𝑖𝑛
1
Rf
The gain of inverting amplifier is given by ACL = R
1
Non-Inverting amplifier: When the signal is applied at the non-inverting input, the resulting
circuit is known as Non-Inverting Op-Amp. In this amplifier the output is exactly in phase with
the input i.e. when a positive voltage is applied to the circuit, the output will also be positive.
If Vin is the input voltage, then the output voltage Vout is given by
R
Vout = (1 + R f ) V𝑖𝑛
1
R
The gain of non-inverting amplifier is given by ACL = 1 + R f
1

24
Procedure:
1. Insert IC 741 on the bread board.
2. Connect the circuit as per the circuit diagram shown in the Figure.
3. Connect pin7 of IC741 to +15V DC voltage source in Digital multi output DC Regulated
power supply.
4. Connect pin4 of IC741 to -15V DC source in Digital multi output DC Regulated power
supply.
5. Case1: Connect Vin input to DC voltage sources in Digital multi output DC Regulated
power supply. Measure the output at pin 6 of the IC 741 using Digital Multimeter or Digital
Voltmeter.
Case2: Connect Vin input to the function generator and measure the input and output voltage
from the input and output waveform in the CRO.
Circuit Description:
1. Inverting amplifier:

Figure 1.1. Inverting amplifier

Example1: Design inverting amplifier with a gain -10.
Rf
ACL =
R1
Let us assumeR1 = 1KΩ, then R f =10KΩ
1. Input Voltage: 1V
2. Output Voltage: -10V
Example2: Design inverting amplifier with a gain 5.
Let us assume R1 = 2KΩ, then R f =10KΩ
1. Input Voltage: 1V, Frequency: 50Hz
3. Output Voltage: -5V, Frequency: 50Hz
Theoretical calculations
R
1. Vout = − R f V𝑖𝑛
1

25
 R
2.gain = R f
1
Observations
S. No Vin (V) Vout (V) 𝑉𝑜𝑢𝑡
Gain = 𝑉𝑖𝑛

MODEL WAVE FORM:

Non-Inverting amplifier:

Figure 1.2. Non-Inverting amplifier

Example1: Design Non-inverting amplifier with a gain 6.
Rf
ACL = (1 + )
R1
26
Let us assumeR1 = 2KΩ, then R f =10KΩ
1. Input Voltage: 1V
2. Output Voltage: 6V
Example2: Design Non-inverting amplifier with a gain 6.
Let us assume R1 = 2KΩ, then R f =10KΩ
1. Input Voltage: 1V, Frequency: 50Hz
3. Output Voltage: 6V, Frequency: 50Hz
Theoretical calculations
Rf
1. Vout = (1 + ) V𝑖𝑛
R1
R
2.gain =1+ R f
1
Observations
S. No Vin (V) Vout (V) 𝑉𝑜𝑢𝑡
Gain = 𝑉𝑖𝑛

Result:

VIVA Questions:
1. Find the gain of the circuit shown in the below fig.

27
2. An Op-Amp is connected in inverting amplifier mode using R1=20 kΩ, Rf = 100 kΩ
and Vi =10 mV. Find Vo
3. What is the gain of non- inverting amplifier if R f =1KΩ and R1 =1KΩ?
4. In the circuit below, the 𝑅2 value is given as 50 KΩ then calculate the value of 𝑅1 with
gain of 4. Assume ideal Op-Amp.

5. Calculate Vo if the input voltage is 2mV.

6. For the circuit shown, R1 = 33 kΩ, R2 = 47 kΩ. The op-amp is ideal. Determine the
closed-loop gain, and output voltage if Vi = 35mV.

7. Design a non-inverting amplifier using an Op-amp with a gain of 101 and find the
output voltage for the input voltage Vin = 10mV.
8. If Rf =120KΩ and R1 =56 KΩ. Calculate gain and output voltage of inverting
amplifier for the input Vin = 10mV
9. Find the output voltage(V0) for the circuit shown in the figure below.

28
 Cycle:
Date:
Design Adder and Subtractor using Op Amp and
Experiment No:
verify addition and subtraction process

Aim: To design Adder and Subtractor circuits using IC 741.

Apparatus required:
S. No Equipment/Component name Specifications/Value Quantity
1 IC 741 - 1
2 Resistor 1KΩ,2 KΩ,3KΩ 6
3 Digital multi output DC Regulated power supply (0 – 30V),1A 1
4 Digital Multimeter 3 ½ digit display 1
5 Digital Voltmeter 0-20V 1
6 Bread Board - 1
Theory:
Adder: An adder is an electronic circuit that produces an output, which is equal to the sum of
the applied inputs. The output voltage is proportional to the algebraic sum of input voltages.
Inverting Adder output: If V1 and V2 are the input voltages, then the output voltage Vo is
given by Vo = - (V1+V2).
If V1, V2 and V3 are the input voltages, then the output voltage Vo is given by Vo = - (V1+V2
+V3)
Non-Inverting Adder output: If V1 and V2 are the input voltages, then the output voltage V0
is given by V0 = (V1+V2).
If V1, V2 and V3 are the input voltages, then the output voltage V0 is given by V0 = (V1+V2 +V3)
Subtractor: A subtractor is an electronic circuit that produces an output, which is equal to the
difference of the applied inputs.
If V1 and V2 are the input voltages, then the output voltage Vo is given by V0 = V1 − V2 .

Procedure:

1. Insert IC741 on the bread board.

2. Connect the circuit as per the circuit diagram shown in the Figure.
3. Connect pin7 of IC741 to +15V DC voltage source in Digital multi output DC Regulated
power supply.
29
4. Connect pin4 of IC741 to -15V DC source in Digital multi output DC Regulated power
supply.
5. Connect V1 and V2 inputs to DC voltage sources in Digital multi output DC Regulated
power supply.
6. Measure the output at pin 6 of the IC 741 using Digital Multimeter or Digital Voltmeter.

Circuit Description:
Adders: Two types of Adders

Inverting Adder:

Figure 2.1. Inverting adder

Theoretical calculations:
1. Design a adder circuit whose output voltage
V0 = −5V1 − 2V2
The output voltage
Rf Rf
V0 = − V1 − V
R1 R2 2
Assume R f = 10 KΩ, then R1 = 2 KΩ and R 2 = 5 KΩ.
2. Design a adder circuit whose output voltage
V0 = −(V1 + V2 )
The output voltage
Rf Rf
V0 = − V1 − V
R1 R2 2
Assume R f = 1 KΩ, then R1 = 1 KΩ and R 2 = 1 KΩ.

30
Procedure:
➢ Connect V1 input to +1V voltage source in Digital multi output DC Regulated power
supply.
➢ Connect V2 input (+1 V) to +Ve terminal (RED pin) of channel 1 in Digital multi output
DC Regulated power supply and -Ve terminal (Black pin) of channel 1 to common
ground in bread board.
➢ Connect +Ve terminal (RED pin) of Digital Multimeter to pin6 of IC 741 and -Ve
terminal (Black pin) of Digital Multimeter to common ground in bread board.

S No V1(V) V2(V) Vo (v) =-( V1+ V2) (Theoretical) Vo (v) (Practical)

Non-Inverting Adder:

Figure 2.2. Non-Inverting adder

Theoretical calculations:
Design an non inverting adder whose output voltage 𝑉0 = 𝑉1 + 𝑉2

The output voltage is

V1 V2
Rf R2 + R3
V0 = (1 + ) ( )
R1 1 1
R2 + R3
31
Assume that R f = 10 KΩ,
For V0 = V1 + V2 ,
Rf
R1 = R 2 = R 3 = R1 = R 2 = R 3 = 5 KΩ
2

Example: Consider V1 =5V, V2 =3V

V0 = (V1+ V2) = (5+3) = 8V

➢ Connect V1 input to +5V voltage source in Digital multi output DC Regulated power
supply
➢ Connect V2 input to +Ve terminal (RED pin) of channel 1 in Digital multi output DC
Regulated power supply and -Ve terminal (Black pin) of channel 1 to common ground
in bread board. Adjust channel 1 Knob to set 3V.
➢ Connect +Ve terminal (RED pin) of Digital Multimeter to pin6 of IC 741 and -Ve
terminal (Black pin) of Digital Multimeter to common ground in bread board.

S. No V1(V) V2(V) Vo (v) = V1+ V2 (Theoretical) Vo (v) (Practical)

Subtractor: Output Vo =V1 -V2

Figure 2.3. Subtractor

Theoretical calculations
Design a Subtractor such that the output voltage V0 = V1 − V2
The output equation is
Rf R3 Rf
V0 = (1 + ) V1 − V
R1 R 3 + R 2 R2 2
Assume that R f = 1 KΩ, therefore the values of R1 = R 2 = R 2 = 1 KΩ
Example-1: Vo = V1 -V2 = 9 - 5= 4V
Procedure:
32
 ➢ Connect V1 input to +9V DC voltage source in Digital multi output DC Regulated power
supply.
➢ Connect V2 input to +5V DC voltage source in Digital multi output DC Regulated power
supply.
➢ Connect +Ve terminal (RED pin) of Digital Multimeter to pin6 of IC 741 and -Ve
terminal (Black pin) of Digital Multimeter to common ground in bread board.

S. No V1(V) V2(V) Vo (v) = 𝑉1 − 𝑉2 (Theoretical) Vo (v) (Practical)

Result:

33
 Cycle:
Date:
Design an Integrator and Differentiator Circuits using
Experiment No: IC741 and derive the required condition practically.

Aim: To design and verify the operation of an integrator and differentiator for a given input
using IC 741C.
Apparatus required:
S. No Equipment/Component name Specifications/Value Quantity
1 IC 741 1
2 Capacitors 0.1μf, 0.01μf Each one
3 Resistors 159Ω, 1.5kΩ Each one
4 Digital multi output DC Regulated power supply (0 – 30) V,1A 1
5 Function generator (1Hz – 1MHz) 1
6 Cathode Ray Oscilloscope (0 – 20MHz) 1
7 Bread Board 1

Theory:
Integrator: In an integrator circuit, the output voltage is integral of the input signal. The output
1
voltage of an integrator is given by 𝑉𝑜 = − 𝑅 ∫ 𝑉𝑖 𝑑𝑡
1 𝐶𝑓

At low frequencies the gain becomes infinite, so the capacitor is fully charged and behaves like
an open circuit. The gain of an integrator at low frequency can be limited by connecting a
resistor in shunt with capacitor.
Differentiator: In the differentiator circuit the output voltage is the differentiation of the input
𝑑𝑉𝑖
voltage. The output voltage of a differentiator is given by 𝑉𝑜 = −𝑅𝑓 𝐶1 𝑑𝑡
The input impedance of this circuit decreases with increase in frequency, thereby making the
circuit sensitive to high frequency noise. At high frequencies circuit may become unstable.

34
Circuit Diagrams:
Integrator:

Figure Integrator

Differentiator:

Figure . Differentiator

Design equations:
Integrator:
1
fb = 2𝜋𝑅 ----(1) where fb is the frequency at which the gain is 0dB
1 𝐶𝑓
1
fa = 2𝜋𝑅 ----(2) where fa is gain limiting frequency
𝑓 𝐶𝑓

fa< fb
𝑓
For example, fa = 10𝑏 ,then 𝑅𝑓 =10𝑅1

35
The input signal is integrated properly if the time period T of the input signal is larger than or
equal to 𝑅𝑓 𝐶𝑓
T ≥ 𝑅𝑓 𝐶𝑓 -----(3)
From equation (2)
1
𝑅𝑓 𝐶𝑓 = 2𝜋𝑓 -----(4)
𝑎
Design an integrator that integrates a signal whose frequencies are between 1 kHz and 10
kHz
The circuit acts as integrator for frequencies between fa and fb
Generally, fa < fb [ Ref. Frequency response of the integrator]
Therefore, choose fa = 1kHz
fb = 10 kHz
1
fb = 2𝜋𝑅 𝐶
1 𝑓
Let Cf = 0.1 µF
1
10x103 = 2𝜋𝑅 −6
1 𝑥0.1𝑥10
Therefore R1= 159Ω≅ 150Ω
1
fa = 2𝜋𝑅 𝐶
𝑓 𝑓
3 1
1x10 = 2𝜋𝑅 −6
1 𝑥0.1𝑥10
Rf = 15 KΩ
Differentiator
1
fa = 2𝜋𝑅 ----(1) where fa is the frequency at which the gain is 0dB
𝑓 𝐶1
1
fb = 2𝜋𝑅 ----(2) where fb is gain limiting frequency
1 𝐶1
fc is the unity gain bandwidth of the Op-Amp
fa < fb < fc
𝑓
For example, fa = 10𝑏 ,then 𝑅𝑓 =10𝑅1
The input signal is differentiated properly if the time period T of the input signal is larger than
or equal to 𝑅𝑓 𝐶1
T ≥ 𝑅𝑓 𝐶1 -----(3)
Select fa equal to highest frequency of the input signal to be differentiated, Assume C1 and
find Rf.
Select fb = 10 fa and find R1 and Cf so that R1 C1 = Rf Cf.
Design a differentiator to differentiate an input signal that varies in frequency from 10Hz
to 1kHz
Step1: fa = 1KHz
Let us choose 𝐶1 =0.1µf
1
fa = 2𝜋𝑅
𝑓 𝐶1
1 1
𝑅𝑓 = 2𝜋 𝑓 𝐶 = 2𝜋 x1000x0.1x10−6 = 1.59𝐾𝛺 ≅ 1.5𝐾𝛺
𝑎 1
Step2: Select fb = 10 fa
36
 fb = 10x1KHz =10KHz
1
fb = 2𝜋𝑅
1 𝐶1
1 1
𝑅1 = 2𝜋𝑓 = 2𝜋 x10000x0.1x10−6 = 159𝛺 ≅ 150𝛺
𝑏 𝐶1
We know R1 C1 = Rf Cf.
150 𝑥 0.1x10−6 = 1.5x103 x Cf
Cf = 0.0055 µf ≅ 0.01µf
Procedure
1. Insert IC741 on the bread board.
2. Connect the circuit as per the circuit diagram shown in the Figure.
3. Connect pin7 of IC741 to +15V DC voltage source in Digital multi output DC Regulated
power supply.
4. Connect pin4 of IC741 to -15V DC source in Digital multi output DC Regulated power
supply.
5. Apply a square wave/sinewave as input of 2V(p-p) at 10KHz to an Integrator circuit.
Apply a square wave/sinewave as input of 2V(p-p) at 1KHz to a Differentiator circuit.
6. Connect the probe to channel 1 and channel 2.
7. Connect the input to +ve terminal (RED pin) of a probe connected to channel 1 of CRO
and -ve terminal (Black pin) of a probe to common ground in the bread board.
8. Connect pin6 of IC741 to +ve terminal (RED pin) of a probe connected to channel 2 of
CRO and -ve terminal (Black pin) of a probe to common ground in the bread board.
9. Note down the Amplitude and Time period of input, output signals. Draw the input and
output signal waveforms.
Wave Forms:
Integrator

37
 Figure 4.3. Input and output waveforms of Integrator

Differentiator

Figure 4.4. Input and output waveforms of Differentiator

Sample readings:
Integrator
Input –Square wave Output - Triangular
Amplitude(VP-P) Time period Amplitude (VP-P) Time period
(V) (ms) (V) (ms)

38
 Input –sine wave Output - cosine
Amplitude(VP-P) Time period Amplitude (VP-P) Time period
(V) (ms) (V) (ms)

Differentiator
Input –square wave Output - Spikes
Amplitude (VP-P) Time period Amplitude (VP-P) Time period
(V) (ms) (V) (ms)

Input –sine wave Output - cosine

Amplitude (VP-P) Time period Amplitude (VP-P) Time period
(V) (ms) (V) (ms)

Model Calculations:
Integrator:
For T= 1 msec
fa= 1/T = 1 KHz
fa = 1 KHz = 1/(2πRfCf)
Assuming Cf= 0.1μf, Rf is found from Rf=1/(2πfaCf)
Rf=1.59 KΩ
Rf = 10 R1
R1= 159Ω

Differentiator
For T = 1 msec
f= 1/T = 1 KHz
fa = 1 KHz = 1/(2πRfC1)
Assuming C1= 0.1μf, Rf is found from Rf=1/(2πfaC1)
Rf=1.59 KΩ
39
 fb = 10 fa = 1/2πR1C1
for C1= 0.1μf;
R1 =159Ω
Precautions: Check the connections before giving the power supply.
Readings should be taken carefully.

Result:

VIVA Questions:
1. What are the limitations of the ideal differentiator?
2. State the limitations of an ideal integrator?
3. What are the applications of differentiator and integrator?
4. How the practical Integrator circuit overcomes the drawbacks of Ideal integrator.
5. How the practical differentiator circuit overcomes the drawbacks of Ideal differentiator?
6. If V1(t)=10cos(2t) mV and V2(t)=0.5tmV below, find Vo(t) fort>0. Assume that the
voltage across the capacitor is zero at t=0.

7. Sketch the output voltage waveform Vo(t) for the circuit shown, given the input voltage
waveform below.

40
8. In the circuit shown below, R1 = 1kΩ, Cf = 1μF, and Vi= sin (2000t). Assuming V0(0) =0,
find V0 for t> 0.

9. The integrator has R=100kΩ, C=20μF.Determine the output voltage when a dc voltage of
2.5mV is applied at t=0.Assume that the Op-Amp is initially nulled.

10. A differentiator has R=100kΩ and C=0. 1μF.Given that Vi=5t V, determine the output Vo.

41
 Cycle:
Date: Design an Active LPF, HPF cut off frequency of 2 KHZ
and find the roll off of it.
Experiment No:

Aim: To design and obtain the frequency response of

1. First order Low Pass Filter (LPF)

2. First order High Pass Filter (HPF)

Apparatus required:

S. No Equipment/Component name Specifications/Value Quantity

1 IC 741 1
2 Resistors 10KΩ, 2
8 KΩ 1
3 Capacitors 0.01μf 1
4 Cathode Ray Oscilloscope (0 – 20MHz) 1
5 Digital multi output DC Regulated power supply (0 – 30V),1A 1
6 Function Generator (1Hz – 1MHz) 1

Theory:
a) Low Pass Filter: Low pass filter allows low frequencies upto a cut-off frequency, fH and
attenuates (stops) high frequencies above cut-off frequency
At fH the gain is 0.707 Amax, and after fH gain decreases at a constant rate with an increase in
frequency. The gain decreases 20dB each time the frequency is increased by 10. Hence the
rate at which the gain rolls off after fH is 20dB/decade.
b) High Pass Filters: High pass filter attenuates low frequencies below cut-off frequency fL
and allows high frequencies above cut-off frequency
At fL the gain is 0.707 Amax, and after fL gain increases at a constant rate with an increase in
frequency. The gain increases 20dB each time the frequency is increased by 10. Hence the rate
at which the gain rolls off after fL is 20dB/decade
➢ First order low pass filter and high pass filter consists of amplifier, RC network
connected to the non-inverting input terminal of OP-Amp.
➢ Capacitor allows high frequencies through it and blocks low frequencies.
➢ only low frequency signal reaches the input terminal.
➢ Resistors 𝑅1 and 𝑅𝑓 determines the gain.

42
Circuit diagrams:

Figure First Order Low pass filter

Figure First Order High pass filter

43
Design of filters:
First Order Low pass filter:
To design a Low Pass Filter for higher cut off frequency fH = 2 kHz and pass band gain of 2
1
𝑓𝐻 =
2𝜋𝑅𝐶
Assuming C = 0.01 µF, the value of R is found from
1 1
𝑅= = = 7.94 KΩ
2𝜋𝑓𝐻 𝐶 2𝜋𝑥2𝑥103 𝑥 0.01𝑥10−6
The pass band gain of LPF is given by
𝑅𝑓
AF = (1+ )
𝑅1

Given pass band gain AF =2

Assuming R1=10 KΩ, the value of RF is found from
RF = (AF -1) R1 = (2 -1) 10KΩ =10KΩ
First Order High pass filter:
To design a High Pass Filter for lower cutoff frequency fL = 2 kHz and pass band gain of 2.
1
𝑓𝐿 =
2𝜋𝑅𝐶
Assuming C = 0.01 µF, the value of R is found from
1
𝑅 = 2𝜋𝑓 = 7.94 KΩ
𝐿𝐶

𝑅𝑓
The pass band gain of HPF is given by AF = (1+ )
𝑅1

Given pass band gain AF = 2

Assuming R1=10 KΩ, the value of RF is found from
RF = (AF -1) R1 = (2 -1) 10KΩ =10KΩ
Procedure:
1. Insert IC741 on the bread board.
2. Connect the circuit as per the circuit diagram shown in the Figure.
3. Connect pin7 of IC741 to +15V DC voltage source in Digital multi output DC Regulated
power supply.
4. Connect pin4 of IC741 to -15V DC source in Digital multi output DC Regulated power
supply.

44
5. Apply sinusoidal wave of constant amplitude as the input such that op-amp does not go into
saturation.
6. Connect pin6 of IC741 to +ve terminal (RED pin) of a probe connected to channel 1 of
CRO and -ve terminal (Black pin) of a probe to common ground in the bread board.
7. Vary the input frequency and note down the output amplitude at each step as shown in Table
4.3.
8. Plot the frequency response.

Model graphs:

Figure-5.3. Frequency response of Low pass filter Figure-5.4. Frequency response of

High pass filter
Theoretical calculations
a) First Order Low pass filter b) First Order High pass filter
𝑓
𝑉0 𝐴𝐹 𝑉0 𝐴𝐹
𝑓𝐿
Magnitude of Gain | 𝑉 | = Magnitude of Gain | 𝑉 | =
𝑖 𝑓 𝑖 𝑓
√( 𝑓 )2 +1 √( 𝑓 )2+1
𝐻 𝐿
𝑓
𝑉0 2 𝑉0 2
4000
|𝑉 |= 𝑓
|𝑉 |=
𝑖 √( )2 +1 𝑖 √( 𝑓 )2 +1
2000 2000

Table 5.1
a) First Order Low pass filter b) First Order High pass filter

45
 Input Output 𝑉 Gain in dB Input Output 𝑉 Gain in dB
Gain=|𝑉0 |= Gain=| 𝑉0 |
𝑖 Frequency Voltage 𝑖
Frequency Voltage 2
= =
(Vo) =
(Vo) √( 𝑓 )2 +1
20 2
𝑓 20
2000 2000
log10 𝐺𝑎𝑖𝑛 log10 𝐺𝑎𝑖𝑛
√( 𝑓 )2 +1
2000
100Hz 100Hz

200Hz 200Hz

300Hz 300Hz

400Hz 400Hz

500Hz 500Hz

600Hz 600Hz

700Hz 700Hz

800Hz 800Hz

900Hz 900Hz

1KHz 1KHz

2KHz 2KHz

3KHz 3KHz

4KHz 4KHz

5KHz 5KHz

10KHz 50KHz

50KHz 100KHz

Result:

Inferences: By interchanging R and C in a low-pass filter, a high-pass filter can be obtained.

VIVA Questions:
1. Depending on the type of elements used in their construction, filters are classified as?

46
2. What are the differences between active and passive filters?
3. List types of filters according to their frequency response?
4. What are the limitations of active filters?
5. Design a first order high pass filter at cutoff frequency of 400Hz and a pass band gain of 1.
6. Design a wide band reject filter with cutoff frequencies 200Hz and 800Hz respectively.
7. Find the cutoff frequency of each section.

Exercise
1. Design the second order Butterworth low pass filter with cut off frequency 1kHz and draw
the frequency response.
2.Design the second order Butterworth high pass filter with cutoff frequency of 1kHz and draw
the frequency response.
3. Design a wide band pass filter with fL=400Hz and fH=2kHz respectively.
4. If R1=10kΩ, R2, R3=1.6kΩ, RF=5.86kΩ, C2, C3=0.1 μF. draw the frequency response of
the filter shown in the figure.

47
 Cycle:
Date:
Construct Mono-stable Multivibrator using IC555
Experiment No:
and draw its output waveform.
Aim: To generate a pulse using Monostable Multivibrator by using IC555.
Apparatus required:
S.No Equipment/Component name Specifications/Value Quantity
1 555 IC - 1
2 Capacitors 0.1μf,0.01μf Each one
3 Resistor 10KΩ 1
4 Digital multi output DC Regulated power supply (0 – 30V),1A 1
5 Function Generator (1HZ – 1MHz) 1
6 Cathode ray oscilloscope (0 – 20MHz) 1
7 Bread broad 1

Theory:
➢ Mono stable multivibrator is also called one-shot Multivibrator.
➢ It has one stable state and other is quasi stable state.
➢ Mono stable multivibrator generates a pulse.
➢ The duration of the pulse is determined by the RC network connected externally to the 555
timer.
➢ When a trigger input is applied, a pulse is produced at the output and return to the stable
state after a time interval.

Fig. Block diagram representation of Mono multivibrator using 555 IC.

48
Working

• Initially, the flip-flop is RESET (i.e Q =0,Q′ = 1)

• When Q′ = 1, the discharge transistor T1 is driven to saturation (i.e T1 is ON).

• The capacitor starts discharging through transistor T1 and hence the output (at pin3) of the
timer is low.
1 1
• The output remains low until the trigger input is greater than 3 Vcc (i.e Vin > 3 Vcc ),

1 1
• When trigger input falls below Vcc (Vin < Vcc ) then comparator2 output becomes +Vsat
3 3
′
(i.e logic 1), S=1 ,flipflop is set (Q=1,Q = 0), and hence the output (at pin3) of the timer
goes to HIGH.

• when Q′ = 0 Transistor T1 enter into cutoff region (i.e T1 is OFF)

• The capacitor starts charging through R towards Vcc with time constant RC.
2
• The output remains High until voltage across the capacitor = 3 Vcc

2 2
• When the voltage across the capacitor becomes more than Vcc (i.e Vc > Vcc ), then
3 3
′
comparator1 output becomes +Vsat (i.e logic 1), R=1 ,flipflop is reset (Q=0,Q = 1), and
hence the output (at pin3) of the timer goes to Low.

• When Q′ = 1, he discharge transistor T1 is driven to saturation (i.e T1 is ON ). The

capacitor will discharge completely.
1
• When the trigger input becomes < 3 Vcc , the output voltage is HIGH

2
• When the threshold voltage is > 3 𝑉𝑐𝑐 , the output voltage is LOW until the occurrence of
next trigger pulse.

• When output is LOW, the state is considered as stable state

• When output is HIGH, the state is considered as quasi stable state (Unstable state)

• The trigger input causes the transition from stable state to quasi stable state

The pulse width of an output signal=1.1RC

The time during which output remains high is given by THigh=1.1RC

49
Circuit Diagram:

Fig.6.2. Monostable Circuit using IC555.

\ Procedure:
1. Insert 555 IC on the bread board.

2. Connect pin8 of 555 IC to +5V DC voltage source in Digital multi output DC Regulated
power supply.

3. Connect pin1 of 555 IC to Ground

4. Connect pin7 and pin6 of 555 IC with a wire

5. Connect the resistor RA = 10KΩ in between pin7 and pin8 of 555IC
6. Connect the capacitor C = 0.1μf in between pin6 and GND
7. Connect the capacitor C = 0.01μf in between pin5 and GND
8. Apply Negative triggering pulses at pin 2
9. Connect pin6 to +ve terminal (RED pin) of a probe connected to channel 1 of CRO and -
ve terminal (Black pin) of a probe to common ground in the bread board

10. Connect pin3 of IC555 to +ve terminal (RED pin) of a probe connected to channel 2 of
CRO and -ve terminal (Black pin) of a probe to common ground in the bread board.

50
11. Pin3 of 555 IC generates the square wave output. Observe the square wave output on CRO.

12. Measure the Amplitude, width of the output pulse and time period of the square wave.

Waveforms:

Figure 6.3. (a) Trigger signal (b) Capacitor Voltage (c) Output signal
Theoretical calculations:
If C=0.1 µF, RA = 10KΩ
The pulse width of an output signal=1.1RC =1.1x0.1x10-6 x10x103 =1.1x10-3 =1.1msec
Observations:
The pulse width of an output signal=
Result:

VIVA Questions:
1. What are the applications of Monostable Multivibrator?
Exercise

1..Design a mono stable multivibrator for pulse width period of 2ms using 555 IC

51
 Cycle:
Date:
Construct Astable Multivibrator using IC555 and
Experiment No:
draw its output waveform and also find its duty cycle.

Aim: To generate unsymmetrical square and symmetrical square waveforms using IC555.
Apparatus required:

S. No Equipment/Component name Specifications/Value Quantity

1 IC 555 - 1
2 Resistors 10KΩ 2
3 Capacitors 0.1μf,0.01μf Each one
4 Diode OA79 1
5 Digital multi output DC Regulated power supply (0 – 30V),1A 1
6 Cathode Ray Oscilloscope (0 – 20MHz) 1

Theory:
➢ Astable multivibrator is also called as Free Running Multivibrator.
➢ It has no stable states and continuously switches between the two states without
application of any external trigger.
➢ The IC 555 can be made to work as an astable multivibrator with the addition of three
external components: two resistors (RA and RB) and a capacitor (C)

Figure . Block diagram representation of Astable multivibrator using 555 IC

52
Working
▪ Initially, on power-up, the flip-flop is RESET (i.e. Q=0,Q′ = 1)and hence the output (at
pin3) of the timer is low.
▪ Q′ = 1, the discharge transistor T1 is driven to saturation (i.e T1 is ON).
▪ The capacitor starts discharging through transistor T1
1 1
▪ While discharging, if voltage across the capacitor is less than Vcc (i.e Vc < 3 Vcc ), then
3
comparator2 output becomes +Vsat (i.e logic 1), S=1 ,flipflop is set (Q=1,Q′ = 0), and
hence the output (at pin3) of the timer goes to HIGH.
▪ when Q′ = 0 transistor T1 enter into cut-off region (i.e. T1 is OFF)
▪ The capacitor starts charging through RA and RB towards Vcc with time constant (RA+RB)
C
2 2
▪ While charging, if voltage across the capacitor is greater than Vcc (i.e Vc > 3 Vcc ), then
3
comparator1 output becomes +Vsat (i.e logic 1), R=1 ,flipflop is reset (Q=0,Q′ = 1), and
hence the output (at pin3) of the timer goes to Low.
▪ When Q′ = 1, The discharge transistor T1 is driven to saturation (i.e T1 is ON).
▪ The capacitor starts discharging through transistor T1 towards ground with time constant
RB C
▪ When the capacitor is charging, the voltage across the capacitor rises exponentially, and
the output voltage is HIGH
▪ When the capacitor is discharging, the voltage across the capacitor falls exponentially,
and the output voltage is LOW
2 1
▪ The capacitor charges and discharges between 3 Vcc and 3 Vcc respectively
Time period T = 0.69 (RA + 2 RB) C
1
The frequency of oscillations is given by f = T
1
f = 0.693(R + 2RB ) C
A
1.45
f= (R
A + 2RB ) C
Duty cycle: The ratio of ON time-to-time period
TON
Duty cycle = where t
ON =0.693(R A + R B ) C
T
0.693(RA + RB ) C
= 0.693(R
A + 2RB ) C
RA + RB
=R
A + 2RB
R A + RB
% Duty cycle = R X 100
A + 2RB

53
Circuit Diagram:

Figure 7.2. Astable multivibrator Circuit using 555 IC (Un symmetrical square wave
generator)

Figure 7.3. Astable multivibrator Circuit using 555 IC (symmetrical square wave
generator)
Procedure:
Unsymmetrical Square wave generator
1. Insert 555 IC on the bread board.
2. Connect pin8 of 555 IC to +5V DC voltage source in Digital multi output DC Regulated
power supply.
3. Connect pin1 of 555 IC to Ground
4. Connect pin2 and pin6 of 555 IC with a wire.
54
 5. Connect the resistor RA = 10KΩ in between pin7 and pin8 of 555IC
6. Connect the resistor RB = 10KΩ in between pin6 and pin7 of 555IC
7. Connect the capacitor C = 0.1μf in between pin6 and GND
8. Connect the capacitor C = 0.01μf in between pin5 and GND
9. Connect pin6 to +ve terminal (RED pin) of a probe connected to channel 1 of CRO and
-ve terminal (Black pin) of a probe to common ground in the bread board.
10. Connect pin3 of IC555 to +ve terminal (RED pin) of a probe connected to channel 2 of
CRO and -ve terminal (Black pin) of a probe to common ground in the bread board.
Pin3 of 555 IC generates the square wave output.
11. Observe the square wave output on CRO.
12. Measure the Amplitude and time period of the square wave.
13. Measure the frequency of oscillations and duty cycle.
II) Symmetrical square waveform generator:
Connect the diode OA79 in between pin6 and pin7 of 555IC to generate Symmetrical square
waveform.
Theoretical calculations:
I) Un Symmetrical square waveform
t ON =0.693( R A +R B )C =
t OFF =0.693 R B C =
Time period T = 0.69 (RA + 2 RB) C =
1
The frequency of oscillations is given by f=T
1.45
F = (R =
A + 2RB ) C

Duty cycle:
R +R
Duty cycle = R A+ 2RB =
A B

R +R
% Duty cycle = R A+ 2RB X 100
A B

II) For Symmetrical square waveform

t ON = 0.693 R A C =
t OFF = 0.693 R B C =
Time period T = 0.693(R A + R B ) C =

55
 𝟏
The frequency of oscillations is given by F = 𝐓
1.45
F = (R
A + RB ) C
TON 0.693 RA C RA
Duty cycle = =0.693(R =R
T A + RB ) C A + RB
RA
% Duty cycle = R X 100
A + RB

Observations
I) Un Symmetrical square waveform generator
t ON =
t OFF =
Time period T =
1
The frequency of oscillations is given by f = T

Duty cycle:
tON
Duty cycle = =
T

% Duty cycle = Duty cycle X 100

II) Symmetrical square waveform generator
t ON =
t OFF =
Time period T =
𝟏
The frequency of oscillations is given by f = 𝐓
TON
Duty cycle = =
T

% Duty cycle = Duty cycle X 100

Waveforms:

56
 Fig.7.4. Capacitor voltage. (b) Unsymmetrical square wave output

Fig.7.5. Capacitor voltage. (b) Symmetrical square wave output

Result:

VIVA Questions:
2. What are the applications of Astable Multivibrator?

57
 3. Design an astable multivibrator having an output frequency of 10KHz with a duty
cycle of 25%.

4. Design a 555 timer as an astable multivibrator with an output signal frequency f= 800
Hz and 60 % duty cycle.

5. An Astable multivibrator using 555 timer is constructed using the following

components 𝑅𝐴 = 1𝐾𝛺 , 𝑅𝐵 =2 𝐾𝛺 and capacitor c=0.1µf
Calculate i) 𝑡𝐻𝑖𝑔ℎ ii) 𝑡𝐿𝑜𝑤 iii) Time period(T)
iv) frequency of oscillations(f) v) %Duty cycle
6. Determine the positive pulse width, negative pulse width and free running frequency
for an astable multivibrator using 555 timer. RA=4.7KΩ, RB = 1Ω, C=1uf, C1=0.01
uf. What is the duty cycle of output waveform?
7. The timer IC555 is used as astable multivibrator. It is desired to have square-wave
output with 50% duty cycle of 1 kHz. The timing capacitor is of 0.01uF. Find the
values of resistors required and draw the circuit.
8. An IC 555 chip has been used to construct a pulse generator. Typical pin connections
with components are shown below. It is desired to generate a square pulse of 10 kHz.
Evaluate values of RA and RB if the capacitor C has the value of 0.01 µF for the
configuration chosen.

Exercise
1.Design an Astable multivibrator using 555 timer which will generate a symmetrical square
wave of frequency 1KHz

58
 Cycle:
Date: Design a Schmitt trigger using IC 741 Op-Amp and
Experiment No: find its LTP and UTP

Aim: To design the Schmitt trigger circuit using IC 741. Measure the LTP and UTP.
Apparatus required:
S. No Equipment/Component name Specifications/Value Quantity
1 IC 741 - 1
2 Cathode Ray Oscilloscope (0 – 20MHz) 1
3 Function generator 1Hz-1MHz 1
4 Resistors 1KΩ 3
5 Capacitors 0.1μf, 0.01μf Each one
6 Digital multi output DC Regulated power supply (0 -30V),1A 1
7 Bread Board 1
Theory:
The purpose of the Schmitt trigger is to convert any regular or irregular shaped input waveform
into a square wave output.
The input signal is applied to the inverting input terminal and feedback voltage is applied to
non-inverting input terminal.
1.When 𝑽𝒐 = +𝑽𝒔𝒂𝒕
The voltage at non-inverting input terminal (i.e 𝑽𝒇 ) is called upper threshold voltage
𝑽𝑼𝑻
𝑅2
𝑉𝑈𝑇 = 𝑉
𝑅1 + 𝑅2 𝑠𝑎𝑡
➢ as long as 𝑽𝒊𝒏 𝒊𝒔 𝒍𝒆𝒔𝒔𝒕𝒉𝒂𝒏 𝑉𝑈𝑇 , the output 𝑽𝒐 remains at +𝑽𝒔𝒂𝒕

When 𝑽𝒊𝒏 𝒊𝒔 𝒈𝒓𝒆𝒂𝒕𝒆𝒓𝒕𝒉𝒂𝒏 𝑉𝑈𝑇 , the output 𝑽𝒐 switches from +𝑽𝒔𝒂𝒕 to −𝑽𝒔𝒂𝒕
2.When 𝑽𝒐 = −𝑽𝒔𝒂𝒕
The voltage at non-inverting input terminal (i.e 𝑽𝒇 ) is called lower threshold voltage
𝑽𝑳𝑻
𝑅2
𝑉𝐿𝑇 = − 𝑉
𝑅1 + 𝑅2 𝑠𝑎𝑡
➢ As long as 𝑽𝒊𝒏 𝒊𝒔 𝒈𝒓𝒆𝒂𝒕𝒆𝒓𝒕𝒉𝒂𝒏 𝑉𝐿𝑇 , the output 𝑽𝒐 remains at −𝑽𝒔𝒂𝒕
➢ When 𝑽𝒊𝒏 𝒊𝒔 𝒍𝒆𝒔𝒔𝒕𝒉𝒂𝒏 𝑉𝐿𝑇 , the output 𝑽𝒐 switches from −𝑽𝒔𝒂𝒕 to +𝑽𝒔𝒂𝒕

59
➢ The difference between upper threshold voltage and lower threshold voltage is called
Hysteresis width.
• 𝑉𝐻 = ( 𝑉𝑈𝑇 − 𝑉𝐿𝑇 )

2𝑅2
• 𝑉𝐻 = 𝑅 𝑉𝑠𝑎𝑡
1 +𝑅2

Circuit Diagrams:

Figure 8.1. Schmitt trigger circuit using IC 741

Procedure:
1. Insert IC741 on the bread board.
2. Connect the resistor R1 =1KΩ in between pin3 and pin6 of IC741.
3. Connect the resistor R2 =1KΩ in between pin3 and ground
4. Connect one end of resistor R =1KΩ to pin2 and apply a sinusoidal input of amplitude 14V
peak to peak, frequency 1KHz at another end.
5. Connect pin7 of IC741 to +15V DC voltage source in Digital multi output DC Regulated
power supply.
6. Connect pin4 of IC741 to -15V DC source in Digital multi output DC Regulated power
supply.
7. Connect input to +ve terminal (RED pin) of a probe connected to channel 1 of CRO and -
ve terminal (Black pin) of a probe to common ground in the bread board
8. Connect pin6 of IC741 to +ve terminal (RED pin) of a probe connected to channel 2 of
CRO and -ve terminal (Black pin) of a probe to common ground in the bread board.
9. Observe the sine wave input and square wave output on CRO.
10. Measure the Amplitude and time period of the square wave.
60
11. To see Hysteresis loop on CRO Keep Time division knob in XY mode and Channel1 &
Channel2 voltage division knobs at position.
12. Measure the UTP, LTP and Hysteresis width.

Wave forms:

Figure 8.2. Schmitt trigger input wave form (b) Schmitt trigger output wave form

Figure 8.3. Hysteresis

Theoretical calculations
𝑅2
Upper threshold voltage 𝑉𝑈𝑇 = 𝑅 𝑉𝑠𝑎𝑡 =
1 +𝑅2
𝑅2
Lower threshold voltage 𝑉𝐿𝑇 = − 𝑅 𝑉𝑠𝑎𝑡 =
1 +𝑅2
2𝑅2
Hysteresis width 𝑉𝐻 = 𝑅 𝑉𝑠𝑎𝑡
1 +𝑅2
Practical calculations
Upper threshold voltage 𝑉𝑈𝑇 =

61
Lower threshold voltage 𝑉𝐿𝑇 =
Hysteresis width 𝑉𝐻 =
Result:

UTP and LTP of the Schmitt trigger are obtained by using IC 741 as shown in Table

Inferences: Schmitt trigger produces square waveform from a given signal.

VIVA Questions:
1. Which type of feedback is used in Schmitt trigger.
2. Define UTP and LTP and write the formula to calculate LTP and UTP.
3. Define hysteresis in Schmitt trigger.
4. How can we reduce Hysteresis?
5. For the operational amplifier circuit shown, the output saturation voltages are ±15V.
Determine the upper and lower threshold voltages for the circuit.

6. In the circuit shown in figure, find the output voltage Vo .

62
 Cycle:
Date:
WAVEFORM GENERATION USING OP-AMP
Experiment No: (SQUARE & TRIANGULAR)

Aim: To generate square wave and Triangular wave form by using OPAMPs.
Apparatus required:

S.No Equipment/Component name Specifications/Value Quantity

1 741 IC Refer Appendix A 2
2 Capacitors 0.01µf,0.001µf Each one
3 Resistors 86kΩ ,68kΩ ,680kΩ Each one
Resistors 100kΩ 2
4 Regulated Power supply (0 – 30V),1A 1
5 Cathode Ray Oscilloscope (0 -20MHz) 1

Theory: Function generator generates waveforms such as sine, triangular,

square waves and so on of different frequencies and amplitudes. The circuit
shown in Fig1 is a simple circuit which generates square waves and triangular
waves simultaneously. Here the first section is a square wave generator and
second section is an integrator. When square wave is given as input to integrator
it produces triangular wave.

Circuit Diagram:

Fig Function Generator

63
 Wave Forms:

Precautions: Check the connections before

giving the power supply. Readings should be
taken carefully.

Result: Square wave and triangular wave are generated

and the output waveforms are observed.

Inferences: Various waveforms can be generated.

64
 Cycle:
Date:
Wien Bridge Oscillator using Operational Amplifier
Experiment No: 741

Aim:
To construct a Wien Bridge Oscillator using an Operational Amplifier 741,
measure its oscillation frequency, and compare it with the theoretical value.
Apparatus
S.No. Apparatus Quantity
1 Operational Amplifier IC 741 1
2 CRO (Cathode Ray Oscilloscope) 1
3 Variable Capacitors (C1, C2) 2
4 Variable Non-Inductive Resistors (R1, R2, R3) 3
5 Fixed Resistor 1
6 DC Power Supply (+12V, -12V) 2
As
7 Connecting Wires
required
Circuit Diagram :

65
Theory:
An oscillator generates continuous waveform without external input. A Wien
Bridge Oscillator uses an operational amplifier and a lead-lag RC network
to produce sine waves.
It satisfies the Barkhausen Criteria:
• Loop gain 𝐴𝛽=1
• Total phase shift around the loop = 0° or 360°

Lead-Lag Network:

High Frequency: Capacitors act as short circuits; output drops to zero →

Lag Circuit

Low Frequency: Capacitors act as open circuits; output drops to zero →

Lead Circuit

At Resonant Frequency: Maximum output observed; 𝑅=𝑋𝐶

Frequency of Oscillation:
1
𝑓=2𝜋𝑅𝐶
where: 𝑅=𝑅1=𝑅2 and 𝐶=𝐶1=𝐶2

66
Procedure:
1. Connect the Wien Bridge Oscillator circuit as shown in the diagram.
2. Set values: 𝑅=𝑅1=𝑅2 and 𝐶=𝐶1=𝐶2
3. Power the op-amp using +12V and -12V DC supplies.
4. Connect the output of the op-amp to the Y-input of the CRO.
5. Adjust the time-base and voltage sensitivity on the CRO to observe a
stable sine wave.
6. Vary the resistor 𝑅3 until a stable output waveform is observed.
7. Measure the horizontal length 𝑙 (in divisions) of one complete sine
wave.
8. Multiply 𝑙 by the time-base setting 𝑡 to get the time period 𝑇.
9. Calculate experimental frequency 𝑓=1/𝑇
1
10. Compare with theoretical frequency using 𝑓=
2𝜋𝑅𝐶
11. Repeat with different values of R or C.

Tabular Form:

Theoretical T = Experimental
R C 1 l t
S.No. Frequency 𝑓= l × t Frequency
(Ω) (µF) 2𝜋𝑅𝐶 (div) (sec/div) 1
(Hz) (sec) 𝑓= (Hz)
𝑇

Result:

67
 Cycle:
Date:
8-bit DAC using OP AMP
Experiment No:

Aim: To design 1) weighted resistor DAC 2) R-2R ladder Network DAC

Apparatus required:

S.No Equipment/Component Specifications/Val Quantity

name ue
1 D to A converter 1
trainer Kit

Circuit Diagram :

THEORY:
A Digital to Analog Converter (DAC) converts binary (digital) signals into
equivalent analog voltages. An 8-bit DAC takes an 8-bit digital input
(00000000 to 11111111) and produces a proportional analog output voltage.

68
The output voltage 𝑉out is given by
𝐷
𝑉𝑂𝑢𝑡 = 28 −1 𝑉𝑟𝑒𝑓

where D is the digital input (0 to 255), and 𝑉𝑟𝑒𝑓 is the reference voltage (5V in this case).

𝑉𝑟𝑒𝑓
Resolution =
28 −1
TABULAR FORM :

Expected
Digital
Decimal Analog Measured
S.No Input Error
Value (D) Output Output (V)
(Binary)
(V)
1 00000000 0 0
2 00000001 1 0.0196
3 00000010 2 0.0392
4 00000100 4 0.0784
5 00001000 8 0.1569
6 00010000 16 0.3137
7 00100000 32 0.6274
8 01000000 64 1.2549
9 10000000 128 2.5098
10 11111111 255 5

RESULT:
The analog output voltage increased linearly with the increase in digital
input, confirming the correct working of the DAC.
Maximum output observed: ___ V

Resolution: ~0.0196 V/step

69
CONCLUSION:
The experiment successfully demonstrated the conversion of 8-bit digital
data into analog voltage using a DAC. The measured values closely
matched the theoretical values.

VIVA QUESTIONS:
1. What is a DAC?

2. What is the function of the Op-Amp in a DAC circuit?

3. Define resolution and step size.

4. What is the importance of the reference voltage in DAC?

5. How would the output change if V_ref was changed?

70
 Cycle:
Date:
8-bit ADC using OP AMP
Experiment No:

Aim: To study the working of an 8-bit Analog to Digital Converter

(ADC) and observe the digital output corresponding to various analog input
voltages.
Apparatus required:
S.No Equipment/Component Specifications/Val Quantity
name ue
1 D to A converter 1
trainer Kit

Functional Block Diagram :

71
THEORY:
An Analog to Digital Converter (ADC) converts continuous analog signals
into discrete digital numbers. An 8-bit ADC converts an analog voltage into
a digital value ranging from 0 to 255 (since 2⁸ = 256 levels). The resolution
of the ADC determines how finely it can divide the analog input range.

𝑅𝑒𝑠𝑜𝑙𝑢𝑡𝑖𝑜𝑛 𝑜𝑓 𝐴𝐷𝐶 = (𝑉𝑟𝑒𝑓 / 2ⁿ)

Where:
Vref = Reference voltage (maximum input voltage the ADC can measure)
n = Number of bits (8 in this case)
For example, with Vref = 5V and 8-bit ADC:
Resolution = 5 / 256 ≈ 0.0195V (≈ 19.5 mV per step)
So, each increase of 1 in digital output corresponds to an analog increase of
~19.5 mV.
PROCEDUCER:
1. Connect the 8-bit ADC to the power supply (typically +5V).

2. Connect the analog input (Vin) to a variable DC source or

function generator.

3. Connect the start conversion and end of conversion (EOC) pins

as per the datasheet (e.g., ADC0804).

4. Provide a clock pulse using an external oscillator or RC circuit.

5. Monitor the digital output either using:

6. LEDs connected to output pins, or

7. A microcontroller/display system.

72
 8. Gradually vary the analog input voltage from 0 to Vref
(typically 5V) and note the corresponding digital output.

9. Record the analog input and digital output in a table.

10. Compare the observed values with theoretical values

based on the resolution.

TABULAR FORM :

Actual Actual Displayed Displayed

Analog Error
Digital Digital Digital Digital
S.No Input (Displayed
Value Value Value Value
(V) - Actual)
(Decimal) (Binary) (Decimal) (Binary)
1 0 0 00000000
2 0.5 26 00011010
3 1 51 00110011
4 2.5 128 10000000
5 5 255 11111111

Calculations:
Resolution = Vref / 2⁸ = 5V / 256 ≈ 0.0195V/step
Therefore, Digital Output = (Vin / Resolution)
Example:
If Vin = 1V,
Digital Output = 1 / 0.0195 ≈ 51 (decimal) = 00110011 (binary)

73
Result:
The 8-bit ADC successfully converted various analog input voltages into
corresponding 8-bit digital values. The observed outputs matched closely
with the theoretical calculations.

VIVA QUESTIONS:
1. What is a ADC?

2. What is the function of the Op-Amp in a ADC circuit?

3. Define resolution and step size.

4. What is the importance of the reference voltage in ADC?

5. How would the output change if V_ref was changed?

74