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U2.2_Intro to ARM Cortex-M3

The document provides an overview of the ARM Cortex-M3 architecture, detailing its classification into three profiles: A, R, and M, each targeting different application needs. It discusses the evolution of ARM processor architecture, the instruction set development focusing on Thumb-2 instructions, and highlights the features of the Cortex-M3, including its 32-bit microprocessor design and Harvard architecture. The Cortex-M3 is optimized for low-cost applications with an emphasis on processing efficiency and real-time control systems.

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3 views6 pages

U2.2_Intro to ARM Cortex-M3

The document provides an overview of the ARM Cortex-M3 architecture, detailing its classification into three profiles: A, R, and M, each targeting different application needs. It discusses the evolution of ARM processor architecture, the instruction set development focusing on Thumb-2 instructions, and highlights the features of the Cortex-M3, including its 32-bit microprocessor design and Harvard architecture. The Cortex-M3 is optimized for low-cost applications with an emphasis on processing efficiency and real-time control systems.

Uploaded by

kkulothungan3
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Unit - III

Introduction to ARM Cortex-M3

Reference:
Yiu, Joseph, The Definitive Guide to ARM® Cortex®-M3 and Cortex®-M4 Processors, Newnes,
Elsevier Inc., 3rd Edition, 2013
Introduction to ARM Cortex
• ARM extended its product portfolio by diversifying its CPU development, which
resulted in the architecture version 7 or v7.
• In this version, the architecture design is divided into three profiles:
• The A profile: high-performance open application platforms.
• The R profile: high-end embedded systems with real-time performance.
• The M profile: deeply embedded microcontroller-type systems.
• A Profile (ARMv7-A): Application processors designed to handle complex applications
such as high-end embedded operating systems (Eg: mobile phones and e- wallets.)
• R Profile (ARMv7-R): Real-time, high-performance processors targeted at higher end
of the real-time market. (Eg: high-end breaking systems and hard drive controllers, in
which low latency is important.)
• M Profile (ARMv7-M): Processors targeting low-cost applications in which processing
efficiency is important cost, power consumption, low interrupt latency, and ease of
use are critical, as well as industrial control applications, including real-time control
systems.
Evolution of ARM Processor Architecture

• With version 7 of the architecture, ARM has migrated away from these complex
numbering schemes that needed to be decoded 2
• For example, the ARM7TDMI is not a v7 processor but was based on the v4T
architecture
• A synthesizable core design is available in the form of a hardware description
language (HDL) such as Verilog or VHDL and can be converted into a design netlist
using synthesis software
Instruction Set Development

• Historically (since ARM7TDMI), two different instruction sets are supported


on the ARM processor:
• ARM instructions (32 bits)
• Thumb instructions (16 bits)
• During program execution, the processor can be dynamically switched
between the ARM state and the Thumb state to use either one of the
instruction sets.
• The Thumb instruction set provides only a subset of the ARM instructions,
but it can provide higher code density.
• It is useful for products with tight memory requirements.
• In 2003, ARM announced the Thumb-2 instruction set, which is a new
superset of Thumb instructions that contains both 16-bit and 32-bit
instructions.
Instruction Set Development

• Focused on small memory system devices such as microcontrollers and


reducing the size of the processor, the Cortex-M3 supports only the
Thumb-2 (and traditional Thumb) instruction set
• Instead of using ARM instructions for some operations, as in traditional
ARM processors, it uses the Thumb-2 instruction set for all operations.
• As a result, the Cortex-M3 processor is not backward compatible with
traditional ARM processors.
• A binary image for ARM7 processors cannot run on the Cortex-M3
processor.
• Nevertheless, the Cortex-M3 processor can execute almost all the 16-bit
Thumb instructions, including all 16-bit Thumb instructions supported on
ARM7 family processors, making application porting easy.
Cortex – M3 Features
• The Cortex™-M3 is a 32-bit microprocessor.
• It has a 32-bit data path, a 32-bit register bank, and 32-bit memory
interfaces
• The processor has a Harvard architecture, it has a separate instruction bus
and data bus.
• This allows instructions and data accesses to take place at the same time
• The performance of the processor increases because data accesses do not
affect the instruction pipeline
• The instruction and data buses share the same memory space (a unified
memory system)
• The Cortex-M3 processor includes a number of fixed internal debugging
components such as breakpoints and watchpoints

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